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Searched full:pllp_out4 (Results 1 – 19 of 19) sorted by relevance

/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Dnvidia,tegra20-pinmux.yaml64 pllm_out1, pllp_out2, pllp_out3, pllp_out4, pwm, pwr_intr,
/openbmc/u-boot/arch/arm/mach-tegra/tegra20/
H A Dpinmux.c290 PIN(CDEV2, OSC, AHB_CLK, APB_CLK, PLLP_OUT4),
/openbmc/linux/arch/arm/boot/dts/nvidia/
H A Dtegra20-trimslice.dts66 nvidia,function = "pllp_out4";
H A Dtegra20-tamonten.dtsi61 nvidia,function = "pllp_out4";
H A Dtegra20-paz00.dts74 nvidia,function = "pllp_out4";
H A Dtegra20-ventana.dts77 nvidia,function = "pllp_out4";
H A Dtegra20-colibri.dtsi178 nvidia,function = "pllp_out4";
H A Dtegra20-harmony.dts75 nvidia,function = "pllp_out4";
H A Dtegra20-seaboard.dts75 nvidia,function = "pllp_out4";
H A Dtegra20-asus-tf101.dts132 nvidia,function = "pllp_out4";
H A Dtegra20-acer-a500-picasso.dts118 nvidia,function = "pllp_out4";
/openbmc/u-boot/arch/arm/dts/
H A Dtegra20-tamonten.dtsi50 nvidia,function = "pllp_out4";
H A Dtegra20-paz00.dts90 nvidia,function = "pllp_out4";
H A Dtegra20-ventana.dts96 nvidia,function = "pllp_out4";
H A Dtegra20-harmony.dts96 nvidia,function = "pllp_out4";
H A Dtegra20-seaboard.dts106 nvidia,function = "pllp_out4";
/openbmc/u-boot/arch/arm/mach-tegra/
H A Dclock.c754 * and then switch back to PLLP_OUT4, which has an appropriate divider in tegra30_set_up_pllp()
/openbmc/linux/drivers/pinctrl/tegra/
H A Dpinctrl-tegra20.c1929 FUNCTION(pllp_out4),
2052 MUX_PG(cdev2, OSC, AHB_CLK, APB_CLK, PLLP_OUT4, 0x14, 5, 0x88, 4, 0xa8, 2),
/openbmc/u-boot/drivers/usb/host/
H A Dehci-tegra.c593 /* set up ULPI reference clock on pllp_out4 */ in init_ulpi_usb_controller()