Searched +full:phy +full:- +full:rescode +full:- +full:offset +full:- +full:bot (Results 1 – 4 of 4) sorted by relevance
| /openbmc/linux/Documentation/devicetree/bindings/display/msm/ |
| H A D | dsi-phy-10nm.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/dsi-phy-10nm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Display DSI 10nm PHY
10 - Krishna Manikandan <quic_mkrishn@quicinc.com>
13 - $ref: dsi-phy-common.yaml#
18 - qcom,dsi-phy-10nm
19 - qcom,dsi-phy-10nm-8998
23 - description: dsi phy register set
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| /openbmc/linux/arch/arm64/boot/dts/qcom/ |
| H A D | sc7180-trogdor-wormdingler-rev1-boe.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 * - bits 11..8: Panel ID: 0x4 (BOE)
11 /dts-v1/;
13 #include "sc7180-trogdor-wormdingler.dtsi"
17 compatible = "google,wormdingler-sku1024", "qcom,sc7180";
21 qcom,phy-rescode-offset-top = /bits/ 8 <31 31 31 31 (-32)>;
22 qcom,phy-rescode-offset-bot = /bits/ 8 <31 31 31 31 (-32)>;
23 qcom,phy-drive-ldo-level = <450>;
27 compatible = "boe,tv110c9m-ll3";
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| H A D | sc7180-trogdor-quackingstick-r0.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 * - bits 11..8: Panel ID: 0x6 (AUO)
11 #include "sc7180-trogdor-quackingstick.dtsi"
15 compatible = "google,quackingstick-sku1537", "qcom,sc7180";
19 qcom,phy-rescode-offset-top = /bits/ 8 <(-13) (-13) (-13) (-13) (-13)>;
20 qcom,phy-rescode-offset-bot = /bits/ 8 <(-13) (-13) (-13) (-13) (-13)>;
21 qcom,phy-drive-ldo-level = <375>;
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| /openbmc/linux/drivers/gpu/drm/msm/dsi/phy/ |
| H A D | dsi_phy_10nm.c | 2 * SPDX-License-Identifier: GPL-2.0
7 #include <linux/clk-provider.h>
15 * DSI PLL 10nm - clock diagram (eg: DSI0):
20 * +---------+ | +----------+ | +----+
21 * dsi0vco_clk ---| out_div |--o--| divl_3_0 |--o--| /8 |-- dsi0_phy_pll_out_byteclk
22 * +---------+ | +----------+ | +----+
26 * | | +----+ | |\ dsi0_pclk_mux
27 * | |--| /2 |--o--| \ |
28 * | | +----+ | \ | +---------+
29 …* | --------------| |--o--| div_7_4 |-- dsi0_phy_pll_…
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