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Searched full:phases (Results 1 – 25 of 164) sorted by relevance

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/openbmc/qemu/hw/core/
H A Dresettable.c134 !!rc->phases.enter); in resettable_phase_enter()
135 if (rc->phases.enter) { in resettable_phase_enter()
136 rc->phases.enter(obj, type); in resettable_phase_enter()
160 trace_resettable_phase_hold_exec(obj, obj_typename, !!rc->phases.hold); in resettable_phase_hold()
161 if (rc->phases.hold) { in resettable_phase_hold()
162 rc->phases.hold(obj, type); in resettable_phase_hold()
183 trace_resettable_phase_exit_exec(obj, obj_typename, !!rc->phases.exit); in resettable_phase_exit()
184 if (rc->phases.exit) { in resettable_phase_exit()
185 rc->phases.exit(obj, type); in resettable_phase_exit()
214 * During these phases, the reset subtree being updated is partly in reset in resettable_change_parent()
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/openbmc/qemu/scripts/coccinelle/
H A Dreset-type.cocci22 // either by directly assigning it to phases.hold or by calling
32 rc->phases.hold = holdfn;
65 rc->phases.exit = exitfn;
104 - rc->phases.phase(obj)@p
105 + rc->phases.phase(obj, RESET_TYPE_COLD)
114 - rc->phases.hold(obj)@p
115 + rc->phases.hold(obj, type)
121 - rc->phases.exit(obj)@p
122 + rc->phases.exit(obj, type)
/openbmc/qemu/include/hw/
H A Dresettable.h63 * for the phases.enter, phases.hold and phases.exit methods, which
79 * @phases.enter: This phase is called when the object enters reset. It
85 * @phases.hold: This phase is called for entry into reset, once every object
86 * in the system which is being reset has had its @phases.enter method called.
89 * @phases.exit: This phase is called when the object leaves the reset state.
120 ResettablePhases phases; member
227 * Save @rc current reset phases into @parent_phases and override @rc phases
230 * override a subset of phases.
/openbmc/qemu/docs/devel/
H A Dreset.rst116 of an object is split into three well defined phases.
119 startup), all first phases of all objects are executed, then all second phases
120 and then all third phases.
122 The three phases are:
137 count is used to ensure phases are executed only when required. *enter* and
138 *hold* phases are executed only when asserting reset for the first time
147 during either 'enter' or 'hold' phases. IOMMUs are expected to reset during
164 phase of the reset; they are name ``phases.enter()``, ``phases.hold()`` and
165 ``phases.exit()``. They all take the object as parameter. The *enter* method
230 In the above example, we override all three phases. It is possible to override
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/openbmc/phosphor-power/phosphor-regulators/docs/config_file/
H A Dlog_phase_fault.md9 A regulator may contain one or more redundant phases:
11 - An "N+2" regulator has two redundant phases
23 | n | Regulator has lost all redundant phases. The regulator is now at redundancy level N. …
H A Dphase_fault_detection.md8 one or more phases that perform the actual voltage regulation.
10 A regulator may have redundant phases. If a redundant phase fails, the regulator
/openbmc/phosphor-power/phosphor-regulators/src/
H A Dphase_fault.hpp29 * controls one or more phases that perform the actual voltage regulation.
31 * A regulator may have redundant phases. If a redundant phase fails, the
41 * Regulator has lost all redundant phases. The regulator is now at
H A Dphase_fault_detection.hpp43 * controls one or more phases that perform the actual voltage regulation.
45 * A regulator may have redundant phases. If a redundant phase fails, the
/openbmc/qemu/hw/sensor/
H A Disl_pmbus_vr.c250 rc->phases.exit = isl_pmbus_vr_exit_reset; in isl69260_class_init()
259 rc->phases.exit = raa228000_exit_reset; in raa228000_class_init()
268 rc->phases.exit = isl_pmbus_vr_exit_reset; in raa229004_class_init()
277 rc->phases.exit = isl69259_exit_reset; in isl69259_class_init()
/openbmc/qemu/hw/uefi/
H A Dvar-service-guid.c67 * mm_header.guid values that the guest DXE/BDS phases use for
82 * mm_header.guid values that the guest DXE/BDS phases use for
/openbmc/qemu/include/hw/virtio/
H A Dvhost-user-blk.h47 * those initialization phases by using two fields.
/openbmc/phosphor-power/phosphor-regulators/docs/
H A Dphase_fault_monitoring.md5 Some voltage regulators contain redundant phases. If a redundant phase fails,
/openbmc/qemu/hw/usb/
H A Dxlnx-versal-usb2-ctrl-regs.c210 rc->phases.enter = usb2_ctrl_regs_reset_init; in usb2_ctrl_regs_class_init()
211 rc->phases.hold = usb2_ctrl_regs_reset_hold; in usb2_ctrl_regs_class_init()
/openbmc/qemu/hw/pci-host/
H A Dfsl_imx8m_phy.c86 rc->phases.hold = fsl_imx8m_pcie_phy_reset_hold; in fsl_imx8m_pcie_phy_class_init()
/openbmc/qemu/hw/misc/
H A Dnpcm_gcr.c442 rc->phases.enter = npcm7xx_gcr_enter_reset; in npcm7xx_gcr_class_init()
446 rc->phases.enter = npcm7xx_gcr_enter_reset; in npcm7xx_gcr_class_init()
458 rc->phases.enter = npcm8xx_gcr_enter_reset; in npcm8xx_gcr_class_init()
H A Dxlnx-versal-xramc.c234 rc->phases.enter = xram_ctrl_reset_enter; in xram_ctrl_class_init()
235 rc->phases.hold = xram_ctrl_reset_hold; in xram_ctrl_class_init()
H A Dxlnx-zynqmp-apu-ctrl.c234 rc->phases.enter = zynqmp_apu_reset_enter; in zynqmp_apu_class_init()
235 rc->phases.hold = zynqmp_apu_reset_hold; in zynqmp_apu_class_init()
H A Dmax78000_icc.c103 rc->phases.hold = max78000_icc_reset_hold; in max78000_icc_class_init()
H A Dxlnx-zynqmp-crf.c248 rc->phases.enter = crf_reset_enter; in crf_class_init()
249 rc->phases.hold = crf_reset_hold; in crf_class_init()
H A Dvmcoreinfo.c95 rc->phases.hold = vmcoreinfo_reset_hold; in vmcoreinfo_device_class_init()
H A Diosb.c120 rc->phases.hold = iosb_reset_hold; in iosb_class_init()
H A Ddjmemc.c122 rc->phases.hold = djmemc_reset_hold; in djmemc_class_init()
/openbmc/qemu/hw/adc/
H A Dnpcm7xx_adc.c281 rc->phases.enter = npcm7xx_adc_enter_reset; in npcm7xx_adc_class_init()
282 rc->phases.hold = npcm7xx_adc_hold_reset; in npcm7xx_adc_class_init()
/openbmc/phosphor-dbus-interfaces/yaml/xyz/openbmc_project/State/BMC/
H A DRedundancy.interface.yaml29 use case is there are test phases where redundancy is not wanted and
/openbmc/qemu/hw/input/
H A Dstellaris_gamepad.c90 rc->phases.enter = stellaris_gamepad_reset_enter; in stellaris_gamepad_class_init()

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