| /openbmc/qemu/scripts/kvm/ |
| H A D | kvm_flightrecorder | 3 # KVM Flight Recorder - ring buffer tracing script
9 # This script provides a command-line interface to kvm ftrace and is designed
10 # to be used as a flight recorder that is always running. To start in-memory
13 # sudo kvm_flightrecorder start 8192 # 8 MB per-cpu ring buffers
15 # The per-cpu ring buffer size can be given in KB as an optional argument to
32 # consuming CPU cycles. No disk I/O is performed since the ring buffer holds a
33 # fixed-size in-memory trace.
89 if cmd == '--version':
95 print('mount -t debugfs none /sys/kernel/debug')
108 print('Invalid per-cpu trace buffer size in KB')
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| /openbmc/qemu/docs/specs/ |
| H A D | rapl-msr.rst | 6 energy consumption of various power domains (e.g. CPU packages, DRAM, etc.).
9 MSR_PKG_ENERGY_STATUS for the CPU package power domain. These MSRs are 64 bits
12 Thanks to KVM's `MSR filtering <msr-filter-patch_>`__ functionality,
17 .. _msr-filter-patch: https://patchwork.kernel.org/project/kvm/patch/20200916202951.23760-7-graf@am…
32 by reading the host CPU MSRs and are given back to the guest 1:1 when
37 it with the UNIT provided above you'll get the power in micro-joules. This
45 core that belongs to PKG-0 will not be able to get the value of PKG-1 and
46 vice-versa.
49 -------------------------
60 3. Sleep for 1 second - During this pause the vcpu and other non-vcpu threads
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| /openbmc/qemu/docs/user/ |
| H A D | main.rst | 1 .. _user-mode:
7 ---------------------------
11 - Linux (referred as qemu-linux-user)
13 - BSD (referred as qemu-bsd-user)
16 --------
23 System calls are the principle interface between user-space and the
37 virtual CPU exceptions (for example ``SIGFPE`` when the program
42 normal and real-time signals.
48 host thread (with a separate virtual CPU) for each emulated thread.
52 supported. QEMU user-mode processes can still be run inside containers
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| /openbmc/qemu/include/hw/timer/ |
| H A D | a9gtimer.h | 31 #define TYPE_A9_GTIMER "arm.cortex-a9-global-timer"
44 #define R_CONTROL_PRESCALER_MASK (((1 << R_CONTROL_PRESCALER_LEN) - 1) << \
63 uint32_t control; /* only per cpu banked bits valid */
86 uint64_t cpu_ref_time; /* the cpu time as of last update of ref_counter */
87 uint32_t control; /* only non per cpu banked bits valid */
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| /openbmc/qemu/hw/intc/ |
| H A D | spapr_xive.c | 4 * Copyright (c) 2017-2024, IBM Corporation.
6 * SPDX-License-Identifier: GPL-2.0-or-later
13 #include "qemu/error-report.h"
14 #include "target/ppc/cpu.h"
24 #include "hw/qdev-properties.h"
39 * simple mapping scheme of the CPU vcpu_id
51 return nvt_idx - SPAPR_XIVE_NVT_BASE; in spapr_xive_nvt_to_target()
54 static void spapr_xive_cpu_to_nvt(PowerPCCPU *cpu, in spapr_xive_cpu_to_nvt() argument
57 assert(cpu); in spapr_xive_cpu_to_nvt()
64 *out_nvt_idx = SPAPR_XIVE_NVT_BASE + cpu->vcpu_id; in spapr_xive_cpu_to_nvt()
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| H A D | exynos4210_gic.c | 4 * Copyright (c) 2000 - 2011 Samsung Electronics Co., Ltd.
29 #include "hw/qdev-properties.h"
51 qemu_set_irq(qdev_get_gpio_in(s->gic, irq), level); in exynos4210_gic_set_irq()
60 uint32_t n = s->num_cpu; in exynos4210_gic_realize()
63 s->gic = qdev_new("arm_gic"); in exynos4210_gic_realize()
64 qdev_prop_set_uint32(s->gic, "num-cpu", s->num_cpu); in exynos4210_gic_realize()
65 qdev_prop_set_uint32(s->gic, "num-irq", EXYNOS4210_GIC_NIRQ); in exynos4210_gic_realize()
66 gicbusdev = SYS_BUS_DEVICE(s->gic); in exynos4210_gic_realize()
74 EXYNOS4210_GIC_NIRQ - 32); in exynos4210_gic_realize()
76 memory_region_init(&s->cpu_container, obj, "exynos4210-cpu-container", in exynos4210_gic_realize()
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| /openbmc/qemu/accel/tcg/ |
| H A D | tb-jmp-cache.h | 2 * The per-CPU TranslationBlock jump cache.
6 * SPDX-License-Identifier: GPL-2.0-or-later
13 #include "exec/cpu-common.h"
20 * A valid entry is read/written by a single CPU, therefore there is
22 * non-NULL value of 'tb'. Strictly speaking pc is only needed for
|
| H A D | tcg-stats.c | 2 * SPDX-License-Identifier: LGPL-2.1-or-later
6 * Copyright (c) 2003-2005 Fabrice Bellard
13 #include "system/cpu-timers.h"
15 #include "hw/core/cpu.h"
17 #include "internal-common.h"
18 #include "tb-context.h"
27 g_string_append_printf(buf, "Host - Guest clock %"PRIi64" ms\n", in dump_drift_info()
28 (cpu_get_clock() - icount_get()) / SCALE_MS); in dump_drift_info()
31 -max_delay / SCALE_MS); in dump_drift_info()
43 "one-insn-per-tb", in dump_accel_info()
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| H A D | tcg-accel-ops-mttcg.c | 4 * Copyright (c) 2003-2008 Fabrice Bellard
30 #include "qemu/main-loop.h"
32 #include "qemu/guest-random.h"
35 #include "tcg-accel-ops.h"
36 #include "tcg-accel-ops-mttcg.h"
40 CPUState *cpu; member
43 static void do_nothing(CPUState *cpu, run_on_cpu_data d) in do_nothing() argument
49 CPUState *cpu = container_of(notify, MttcgForceRcuNotifier, notifier)->cpu; in mttcg_force_rcu() local
55 async_run_on_cpu(cpu, do_nothing, RUN_ON_CPU_NULL); in mttcg_force_rcu()
59 * In the multi-threaded case each vCPU has its own thread. The TLS
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| /openbmc/qemu/include/hw/acpi/ |
| H A D | pc-hotplug.h | 10 * See the COPYING file in the top-level directory.
20 /* Limit for CPU arch IDs for CPU hotplug. All hotpluggable CPUs should
25 /* 256 CPU IDs, 8 bits per entry: */
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| /openbmc/u-boot/arch/arm/cpu/armv8/ |
| H A D | Kconfig | 15 bool "Enable multiple CPUs to enter into U-Boot"
21 CPUECTLR_EL1.SMPEN bit before U-Boot.
33 or when CPU implementation doesn't include that register.
36 bool "Support spin-table enable method"
39 Say Y here to support "spin-table" enable method for booting Linux.
42 - Specify enable-method = "spin-table" in each CPU node in the
44 - Bring secondary CPUs into U-Boot proper in a board specific
47 master CPU protects the relocated spin code.
49 U-Boot automatically does:
50 - Set "cpu-release-addr" property of each CPU node
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| /openbmc/qemu/linux-user/aarch64/ |
| H A D | mte_user_helper.c | 6 * SPDX-License-Identifier: LGPL-2.1-or-later
18 * The kernel has a per-cpu configuration for the sysadmin, in arm_set_mte_tcf0()
19 * /sys/devices/system/cpu/cpu<N>/mte_tcf_preferred, in arm_set_mte_tcf0()
34 env->cp15.sctlr_el[1] = deposit64(env->cp15.sctlr_el[1], 38, 2, tcf); in arm_set_mte_tcf0()
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| /openbmc/u-boot/arch/arm/mach-exynos/ |
| H A D | sec_boot.S | 1 /* SPDX-License-Identifier: GPL-2.0+ */
8 #include <asm/arch/cpu.h>
16 ldmia r0!, {r3-r6}
17 stmia r2!, {r3-r6}
30 * (Base Address - 0x02020000, Limit Address - 0x020740000).
32 * U-Boot and kernel are aware of this code and flags by the simple
35 * values in both kernel and U-Boot for our use.
40 * These addresses are being used as flags in u-boot and kernel.
43 * Resume address - 0x2073008
44 * Resume flag - 0x207300C
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| /openbmc/qemu/include/accel/ |
| H A D | accel-cpu-ops.h | 2 * Accelerator per-vCPU handlers
7 * See the COPYING file in the top-level directory.
17 #define ACCEL_OPS_SUFFIX "-ops"
19 #define ACCEL_OPS_NAME(name) (name "-" TYPE_ACCEL_OPS)
24 * struct AccelOpsClass - accelerator interfaces
27 * core CPU code. Not all have to be implemented.
38 void (*cpu_reset_hold)(CPUState *cpu);
40 void (*create_vcpu_thread)(CPUState *cpu); /* MANDATORY NON-NULL */
41 void (*kick_vcpu_thread)(CPUState *cpu);
42 bool (*cpu_thread_is_idle)(CPUState *cpu);
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| /openbmc/openbmc/meta-openembedded/meta-webserver/recipes-webadmin/netdata/netdata/ |
| H A D | netdata.conf | 5 # wget -O /etc/netdata/netdata.conf http://localhost:19999/netdata.conf
7 # curl -o /etc/netdata/netdata.conf http://localhost:19999/netdata.conf
20 # cpu cores = 4
49 # seconds per replication step = 600
52 # dbengine pages per extent = 64
104 # number of models per dimension = 18
110 # maximum number of k-means iterations = 1000
133 script to execute on alarm = @@libexecdir/netdata/plugins.d/alarm-notify.sh
145 # mode = static-threaded
153 # x-frame-options response header =
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| /openbmc/qemu/include/system/ |
| H A D | hvf_int.h | 5 * See the COPYING file in the top-level directory.
9 /* header to be included in HVF-specific code */
17 #include "accel/accel-ops.h"
74 int hvf_arch_init_vcpu(CPUState *cpu);
75 void hvf_arch_vcpu_destroy(CPUState *cpu);
80 void hvf_kick_vcpu_thread(CPUState *cpu);
89 struct hvf_sw_breakpoint *hvf_find_sw_breakpoint(CPUState *cpu,
91 int hvf_sw_breakpoints_active(CPUState *cpu);
93 int hvf_arch_insert_sw_breakpoint(CPUState *cpu, struct hvf_sw_breakpoint *bp);
94 int hvf_arch_remove_sw_breakpoint(CPUState *cpu, struct hvf_sw_breakpoint *bp);
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| /openbmc/qemu/include/hw/ppc/ |
| H A D | pnv_core.h | 2 * QEMU PowerPC PowerNV CPU Core model
23 #include "hw/cpu/core.h"
24 #include "target/ppc/cpu.h"
28 /* Per-core ChipTOD / TimeBase state */
31 * POWER10 DD2.0 - big core TFMR drives the state machine on the even
49 #define TYPE_PNV_CORE "powernv-cpu-core"
80 #define PNV_CORE_TYPE_SUFFIX "-" TYPE_PNV_CORE
88 static inline PnvCPUState *pnv_cpu_state(PowerPCCPU *cpu) in pnv_cpu_state() argument
90 return (PnvCPUState *)cpu->machine_data; in pnv_cpu_state()
103 #define TYPE_PNV_QUAD "powernv-cpu-quad"
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| H A D | openpic.h | 5 #include "hw/core/cpu.h"
12 /* OpenPIC have 5 outputs per CPU connected and one IRQ out single output */
50 IRQ_TYPE_FSLINT, /* FSL internal interrupt -- level only */
70 uint32_t destmask; /* bitmap of CPU destinations */
75 bool level:1; /* level-triggered */
92 #define IVPR_VECTOR(opp, _ivprr_) ((_ivprr_) & (opp)->vector_mask)
117 int32_t ctpr; /* CPU current task priority */
122 /* Count of IRQ sources asserting on non-INT outputs */
150 /* Sub-regions */
161 /* Local registers per output pin */
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| /openbmc/u-boot/doc/device-tree-bindings/video/ |
| H A D | intel-gma.txt | 9 - compatible : "intel,gma";
12 - intel,dp-hotplug : values for digital port hotplug, one cell per value for
14 - intel,panel-port-select : output port to use: 0=LVDS 1=DP_B 2=DP_C 3=DP_D
15 - intel,panel-power-cycle-delay : T4 time sequence (6 = 500ms)
18 - intel,panel-power-up-delay : T1+T2 time sequence
19 - intel,panel-power-down-delay : T3 time sequence
20 - intel,panel-power-backlight-on-delay : T5 time sequence
21 - intel,panel-power-backlight-off-delay : Tx time sequence
23 - intel,cpu-backlight : Value for CPU Backlight PWM
24 - intel,pch-backlight : Value for PCH Backlight PWM
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| /openbmc/qemu/tests/functional/ |
| H A D | test_ppc64_powernv.py | 8 # later. See the COPYING file in the top-level directory.
17 panic_message = 'Kernel panic - not syncing'
21 ('https://archives.fedoraproject.org/pub/archive/fedora-secondary/'
30 self.vm.add_args('-kernel', kernel_path,
31 '-append', command_line)
42 self.vm.add_args('-smp', '4')
50 self.vm.add_args('-smp', '4')
54 wait_for_console_pattern(self, 'hash-mmu: Initializing hash mmu',
61 self.vm.add_args('-smp', '4,threads=4')
63 console_pattern = 'CPU maps initialized for 4 threads per core'
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| H A D | test_ppc64_pseries.py | 8 # later. See the COPYING file in the top-level directory.
17 panic_message = 'Kernel panic - not syncing'
21 ('https://archives.fedoraproject.org/pub/archive/fedora-secondary/'
29 self.vm.add_args('-kernel', kernel_path,
30 '-append', kernel_command_line)
35 self.vm.add_args('-machine', 'x-vof=on')
48 self.vm.add_args('-smp', '4')
56 self.vm.add_args('-smp', '4')
60 wait_for_console_pattern(self, 'hash-mmu: Initializing hash mmu',
67 self.vm.add_args('-smp', '4,threads=4')
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| /openbmc/qemu/include/hw/arm/ |
| H A D | armsse.h | 2 * ARM SSE (Subsystems for Embedded): IoTKit, SSE-200
14 * hardware, which include the IoT Kit and the SSE-050, SSE-100 and
15 * SSE-200. Currently we model:
16 * - the Arm IoT Kit which is documented in
18 * - the SSE-200 which is documented in
22 * a Cortex-M33
29 * space are secure and non-secure aliases of each other
30 * The SSE-200 additionally contains:
31 * a second Cortex-M33
36 * a control interface for an icache for each CPU
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| /openbmc/openbmc/poky/meta/recipes-support/lz4/ |
| H A D | lz4_1.10.0.bb | 2 …per core, scalable with multi-cores CPU. It also features an extremely fast decoder, with speed in…
5 LICENSE = "BSD-2-Clause | GPL-2.0-or-later"
17 file://run-ptest"
24 CVE_STATUS[CVE-2014-4715] = "fixed-version: Fixed in r118, which is larger than the current version…
34 RDEPENDS:${PN}-ptest += "bash"
37 oe_runmake -C ${B}/tests/
41 install -d ${D}${PTEST_PATH}/tests/
42 install --mode=755 ${B}/tests/frametest ${D}${PTEST_PATH}/tests/
43 sed -i "s#@PTEST_PATH@#${PTEST_PATH}#g" ${D}${PTEST_PATH}/run-ptest
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| /openbmc/qemu/qapi/ |
| H A D | machine.json | 1 # -*- Mode: Python -*-
5 # See the COPYING file in the top-level directory.
14 { 'include': 'machine-common.json' }
20 # targets. Run "./configure --help" in the project root directory,
21 # and look for the \*-softmmu targets near the "--target-list" option.
32 # "qemu-system-" prefix to produce the corresponding QEMU
33 # executable name. This is true even for "qemu-system-x86_64".
48 # An enumeration of cpu states that can be assumed by a virtual S390
49 # CPU
54 'data': [ 'uninitialized', 'stopped', 'check-stop', 'operating', 'load' ] }
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| /openbmc/qemu/linux-user/s390x/ |
| H A D | target_proc.h | 2 * S390X specific proc functions for linux-user
4 * SPDX-License-Identifier: GPL-2.0-or-later
10 * Emulate what a Linux kernel running in qemu-system-s390x -M accel=tcg would
14 * - show_cacheinfo().
15 * - show_cpu_topology().
16 * - show_cpu_mhz().
19 * - bogomips per cpu - from a qemu-system-s390x run.
20 * - max thread id = 0, since SMT / SIGP_SET_MULTI_THREADING is not supported.
43 return deposit32(0, CPU_ID_BITS - CPU_PHYS_ADDR_BITS, CPU_PHYS_ADDR_BITS, in cpu_ident()
49 S390CPUModel *model = env_archcpu(cpu_env)->model; in show_cpu_summary()
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