/openbmc/linux/arch/arm/boot/dts/nxp/imx/ |
H A D | imx7ulp.dtsi | 121 clocks = <&pcc2 IMX7ULP_CLK_DMA1>, 122 <&pcc2 IMX7ULP_CLK_DMA_MUX1>; 131 clocks = <&pcc2 IMX7ULP_CLK_CAAM>, 152 clocks = <&pcc2 IMX7ULP_CLK_LPUART4>; 154 assigned-clocks = <&pcc2 IMX7ULP_CLK_LPUART4>; 164 clocks = <&pcc2 IMX7ULP_CLK_LPUART5>; 166 assigned-clocks = <&pcc2 IMX7ULP_CLK_LPUART5>; 175 assigned-clocks = <&pcc2 IMX7ULP_CLK_LPTPM4>; 177 clocks = <&pcc2 IMX7ULP_CLK_LPTPM4>; 187 <&pcc2 IMX7ULP_CLK_LPTPM5>; [all …]
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H A D | imx7ulp-com.dts | 40 assigned-clocks = <&pcc2 IMX7ULP_CLK_USDHC0>;
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H A D | imx7ulp-evk.dts | 80 assigned-clocks = <&pcc2 IMX7ULP_CLK_USDHC0>;
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/openbmc/linux/Documentation/devicetree/bindings/clock/ |
H A D | imx7ulp-pcc-clock.yaml | 24 A7 clock management consists of SCG1, PCC2, PCC3, and CMC1 modules. 40 - fsl,imx7ulp-pcc2 92 compatible = "fsl,imx7ulp-pcc2";
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H A D | imx7ulp-scg-clock.yaml | 24 A7 clock management consists of SCG1, PCC2, PCC3, and CMC1 modules.
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/openbmc/linux/Documentation/devicetree/bindings/pwm/ |
H A D | imx-tpm-pwm.yaml | 53 assigned-clocks = <&pcc2 IMX7ULP_CLK_LPTPM4>; 55 clocks = <&pcc2 IMX7ULP_CLK_LPTPM4>;
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/openbmc/linux/Documentation/devicetree/bindings/watchdog/ |
H A D | fsl-imx7ulp-wdt.yaml | 50 clocks = <&pcc2 IMX7ULP_CLK_WDG1>; 51 assigned-clocks = <&pcc2 IMX7ULP_CLK_WDG1>;
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/openbmc/linux/drivers/net/ethernet/i825xx/ |
H A D | 82596.c | 505 volatile unsigned char *pcc2 = (unsigned char *) 0xfff42000; in i596_error() local 507 pcc2[0x28] = 1; in i596_error() 508 pcc2[0x2b] = 0x1d; in i596_error() 626 volatile unsigned char *pcc2 = (unsigned char *) 0xfff42000; in init_i596_mem() local 629 pcc2[0x28] = 1; in init_i596_mem() 630 pcc2[0x2a] = 0x48; in init_i596_mem() 635 pcc2[0x2b] = 0x08; in init_i596_mem() 691 volatile unsigned char *pcc2 = (unsigned char *) 0xfff42000; in init_i596_mem() local 694 pcc2[0x2a] = 0x55; /* Edge sensitive */ in init_i596_mem() 695 pcc2[0x2b] = 0x15; in init_i596_mem() [all …]
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/openbmc/linux/Documentation/devicetree/bindings/dma/ |
H A D | fsl,edma.yaml | 202 clocks = <&pcc2 IMX7ULP_CLK_DMA1>, <&pcc2 IMX7ULP_CLK_DMA_MUX1>;
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/openbmc/u-boot/arch/arm/include/asm/arch-mx7ulp/ |
H A D | pcc.h | 12 /* PCC2 */ 311 /*PCC2 clocks*/
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/openbmc/linux/Documentation/devicetree/bindings/timer/ |
H A D | nxp,tpm-timer.yaml | 63 <&pcc2 IMX7ULP_CLK_LPTPM5>;
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/openbmc/openbmc/poky/meta/recipes-core/ncurses/files/ |
H A D | 0001-tic-hang.patch | 31 - kcbt=\E[Z, use=xterm+pcc2, use=xterm+pcf0,
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/openbmc/linux/include/dt-bindings/clock/ |
H A D | imx7ulp-clock.h | 66 /* PCC2 */
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/openbmc/u-boot/arch/arm/dts/ |
H A D | imx7ulp.dtsi | 386 pcc2: pcc2@403F0000 { label 387 compatible = "fsl,imx7ulp-pcc2";
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/openbmc/linux/Documentation/devicetree/bindings/pinctrl/ |
H A D | nvidia,tegra114-pinmux.yaml | 61 pbb7, pcc2, pwr_i2c_scl_pz6, pwr_i2c_sda_pz7, kb_row0_pr0,
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H A D | nvidia,tegra30-pinmux.yaml | 89 pbb7, cam_mclk_pcc0, pcc1, pcc2, sdmmc4_rst_n_pcc3,
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H A D | nvidia,tegra124-pinmux.yaml | 66 pbb7, pcc2, jtag_rtck, pwr_i2c_scl_pz6, pwr_i2c_sda_pz7,
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/openbmc/linux/drivers/clk/imx/ |
H A D | clk-imx7ulp.c | 149 /* PCC2 */ in imx7ulp_clk_pcc2_init() 181 CLK_OF_DECLARE(imx7ulp_clk_pcc2, "fsl,imx7ulp-pcc2", imx7ulp_clk_pcc2_init);
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/openbmc/u-boot/arch/arm/mach-tegra/tegra114/ |
H A D | pinmux.c | 200 PIN(PCC2, I2S4, RSVD2, RSVD3, RSVD4),
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/openbmc/u-boot/arch/arm/mach-tegra/tegra124/ |
H A D | pinmux.c | 200 PIN(PCC2, I2S4, RSVD2, SDMMC3, SDMMC2),
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/openbmc/u-boot/board/nvidia/dalmore/ |
H A D | pinmux-config-dalmore.h | 306 DEFAULT_PINMUX(PCC2, RSVD3, DOWN, NORMAL, INPUT),
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/openbmc/u-boot/arch/arm/mach-tegra/tegra30/ |
H A D | pinmux.c | 196 PIN(PCC2, I2S4, RSVD2, RSVD3, RSVD4),
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/openbmc/linux/arch/arm/boot/dts/nvidia/ |
H A D | tegra124-nyan-big.dts | 1163 pcc2 { 1164 nvidia,pins = "pcc2";
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H A D | tegra124-nyan-blaze.dts | 1165 pcc2 { 1166 nvidia,pins = "pcc2";
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/openbmc/u-boot/board/nvidia/cardhu/ |
H A D | pinmux-config-cardhu.h | 216 DEFAULT_PINMUX(PCC2, I2S4, NORMAL, NORMAL, INPUT),
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