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/openbmc/openbmc/meta-ibm/recipes-phosphor/logging/phosphor-logging/p10bmc/
H A Dcom.ibm.Hardware.Chassis.Model.Rainier2U_dev_callouts.json6 "LocationCode":"P0-C5",
12 "LocationCode":"P0-C15",
18 "LocationCode":"P0",
29 "LocationCode":"P0-C15",
35 "LocationCode":"P0-C5",
41 "LocationCode":"P0",
52 "LocationCode":"P0-C15",
58 "LocationCode":"P0-C24",
64 "LocationCode":"P0-C5",
70 "LocationCode":"P0",
[all …]
H A Dcom.ibm.Hardware.Chassis.Model.Everest_dev_callouts.json6 "LocationCode":"P0-C0",
12 "LocationCode":"P0-C61",
18 "LocationCode":"P0",
29 "LocationCode":"P0-C61",
35 "LocationCode":"P0-C0",
41 "LocationCode":"P0",
52 "LocationCode":"P0-C61",
58 "LocationCode":"P0-C14",
64 "LocationCode":"P0-C0",
70 "LocationCode":"P0",
[all …]
H A Dcom.ibm.Hardware.Chassis.Model.Rainier4U_dev_callouts.json6 "LocationCode":"P0-C5",
12 "LocationCode":"P0-C15",
18 "LocationCode":"P0",
29 "LocationCode":"P0-C15",
35 "LocationCode":"P0-C5",
41 "LocationCode":"P0",
52 "LocationCode":"P0-C15",
58 "LocationCode":"P0-C24",
64 "LocationCode":"P0-C5",
70 "LocationCode":"P0",
[all …]
H A Dcom.ibm.Hardware.Chassis.Model.Bonnell_dev_callouts.json6 "LocationCode":"P0-C5",
11 "LocationCode":"P0",
22 "LocationCode":"P0-C5",
27 "LocationCode":"P0",
42 "LocationCode":"P0-C5",
47 "LocationCode":"P0",
59 "LocationCode":"P0-C5",
64 "LocationCode":"P0",
76 "LocationCode":"P0-C5",
81 "LocationCode":"P0",
[all …]
/openbmc/linux/arch/hexagon/mm/
H A Dcopy_user_template.S19 p0 = cmp.gtu(bytes,#0) define
20 if (!p0.new) jump:nt .Ldone
26 p0 = bitsclr(r3,#7) define
27 if (!p0.new) jump:nt .Loop_not_aligned_8
52 p0 = bitsclr(r4,#7) define
53 if (p0.new) jump:nt .Lalign
56 p0 = bitsclr(r3,#3) define
57 if (!p0.new) jump:nt .Loop_not_aligned_4
82 p0 = bitsclr(r3,#1) define
83 if (!p0.new) jump:nt .Loop_not_aligned
[all …]
/openbmc/linux/arch/hexagon/lib/
H A Dmemset.S29 p0 = cmp.eq(r2, #0) define
36 if p0 jumpr r31 /* count == 0, so return */
41 p0 = tstbit(r9, #0) define
58 p0 = tstbit(r9, #1) define
60 if !p0 jump 3f /* skip initial byte store */
71 p0 = tstbit(r9, #2) define
73 if !p0 jump 4f /* skip initial half store */
84 p0 = cmp.gtu(r2, #7) define
86 if !p0 jump 5f /* skip initial word store */
91 p0 = cmp.gtu(r2, #11) define
[all …]
H A Dmemcpy_likely_aligned.S10 p0 = bitsclr(r1,#7) define
11 p0 = bitsclr(r0,#7) define
12 if (p0.new) r5:4 = memd(r1)
13 if (p0.new) r7:6 = memd(r1+#8)
16 if (!p0) jump:nt .Lmemcpy_call
17 if (p0) r9:8 = memd(r1+#16)
18 if (p0) r11:10 = memd(r1+#24)
19 p0 = cmp.gtu(r2,#64) define
22 if (p0) jump:nt .Lmemcpy_call
23 if (!p0) memd(r0) = r5:4
[all …]
H A Ddivsi3.S10 p0 = cmp.gt(r0,#-1) define
15 p3 = xor(p0,p1)
18 p0 = cmp.gtu(r3,r2) define
26 r0 = mux(p0,#0,r0)
27 p0 = or(p0,p1) define
28 if (p0.new) jumpr:nt r31
35 p0 = cmp.gtu(r6,#4) define
39 if (!p0) r6 = #3
50 if (!p0.new) r0 = add(r0,r5)
51 if (!p0.new) r2 = sub(r2,r4)
[all …]
/openbmc/linux/arch/x86/include/asm/
H A Dxor_avx.h29 static void xor_avx_2(unsigned long bytes, unsigned long * __restrict p0, in xor_avx_2() argument
42 "m" (p0[i / sizeof(*p0)])); \ in xor_avx_2()
44 "=m" (p0[i / sizeof(*p0)])); \ in xor_avx_2()
49 p0 = (unsigned long *)((uintptr_t)p0 + 512); in xor_avx_2()
56 static void xor_avx_3(unsigned long bytes, unsigned long * __restrict p0, in xor_avx_3() argument
72 "m" (p0[i / sizeof(*p0)])); \ in xor_avx_3()
74 "=m" (p0[i / sizeof(*p0)])); \ in xor_avx_3()
79 p0 = (unsigned long *)((uintptr_t)p0 + 512); in xor_avx_3()
87 static void xor_avx_4(unsigned long bytes, unsigned long * __restrict p0, in xor_avx_4() argument
106 "m" (p0[i / sizeof(*p0)])); \ in xor_avx_4()
[all …]
/openbmc/qemu/tests/tcg/hexagon/
H A Dmisc.c81 asm volatile("p0 = cmp.eq(%0, #1)\n\t" in S4_storeirbt_io()
82 "if (p0) memb(%1+#4)=#27\n\t" in S4_storeirbt_io()
84 : "p0", "memory"); in S4_storeirbt_io()
89 asm volatile("p0 = cmp.eq(%0, #1)\n\t" in S4_storeirbf_io()
90 "if (!p0) memb(%1+#4)=#27\n\t" in S4_storeirbf_io()
92 : "p0", "memory"); in S4_storeirbf_io()
98 " p0 = cmp.eq(%0, #1)\n\t" in S4_storeirbtnew_io()
99 " if (p0.new) memb(%1+#4)=#27\n\t" in S4_storeirbtnew_io()
102 : "p0", "memory"); in S4_storeirbtnew_io()
108 " p0 = cmp.eq(%0, #1)\n\t" in S4_storeirbfnew_io()
[all …]
H A Dmulti_result.c31 asm volatile("%0,p0 = sfrecipa(%2, %3)\n\t" in sfrecipa()
32 "%1 = p0\n\t" in sfrecipa()
35 : "p0"); in sfrecipa()
45 asm volatile("%0,p0 = sfinvsqrta(%2)\n\t" in sfinvsqrta()
46 "%1 = p0\n\t" in sfinvsqrta()
49 : "p0"); in sfinvsqrta()
68 "%0,p0 = vacsh(%3, %4)\n\t" in vacsh()
69 "%1 = p0\n\t" in vacsh()
73 : "r2", "p0", "usr"); in vacsh()
84 asm volatile("%0,p0 = vminub(%2, %3)\n\t" in vminub()
[all …]
H A Dsignal_context.c25 "p0 = r7\n\t" in sig_user()
29 : : : "r7", "p0", "p1", "p2", "p3"); in sig_user()
57 " p0 = r8\n\t" in main()
65 " r8 = p0\n\t" in main()
66 " p0 = cmp.eq(r8, #0xff)\n\t" in main()
67 " if (!p0) jump 2b\n\t" in main()
69 " p0 = cmp.eq(r8, #0xff)\n\t" in main()
70 " if (!p0) jump 2b\n\t" in main()
72 " p0 = cmp.eq(r8, #0xff)\n\t" in main()
73 " if (!p0) jump 2b\n\t" in main()
[all …]
H A Datomics.c36 " memw_locked(%2, p0) = %1\n\t" in atomic_inc32()
37 " if (!p0) jump 1b\n\t" in atomic_inc32()
40 : "p0", "memory"); in atomic_inc32()
51 " memd_locked(%2, p0) = %1\n\t" in atomic_inc64()
52 " if (!p0) jump 1b\n\t" in atomic_inc64()
55 : "p0", "memory"); in atomic_inc64()
65 " memw_locked(%2, p0) = %1\n\t" in atomic_dec32()
66 " if (!p0) jump 1b\n\t" in atomic_dec32()
69 : "p0", "memory"); in atomic_dec32()
80 " memd_locked(%2, p0) = %1\n\t" in atomic_dec64()
[all …]
H A Dfpstuff.c57 "p0 = sfcmp.eq(%2, %3)\n\t" in check_compare_exception()
58 "%0 = p0\n\t" in check_compare_exception()
61 : "r2", "p0", "usr"); in check_compare_exception()
66 "p0 = sfcmp.gt(%2, %3)\n\t" in check_compare_exception()
67 "%0 = p0\n\t" in check_compare_exception()
70 : "r2", "p0", "usr"); in check_compare_exception()
75 "p0 = sfcmp.ge(%2, %3)\n\t" in check_compare_exception()
76 "%0 = p0\n\t" in check_compare_exception()
79 : "r2", "p0", "usr"); in check_compare_exception()
84 "p0 = dfcmp.eq(%2, %3)\n\t" in check_compare_exception()
[all …]
/openbmc/openbmc/meta-ibm/recipes-phosphor/sensors/phosphor-virtual-sensor/sbp1/
H A Dvirtual_sensor_config.json22 "ParamName": "P0",
30 "Expression": "P0"
196 "ParamName": "P0",
204 "Expression": "ifNan(P0 / 0.9, 0)"
226 "ParamName": "P0",
241 "Expression": "ifNan(P0 / (V0 * 0.9), 0)"
263 "ParamName": "P0",
271 "Expression": "ifNan(P0 / 0.9, 0)"
293 "ParamName": "P0",
308 "Expression": "ifNan(P0 / (V
[all...]
/openbmc/qemu/tests/qemu-iotests/tests/
H A Dimage-fleecing.out27 read -P0 0x00f8000 32k
28 read -P0 0x2010000 32k
29 read -P0 0x3fe0000 64k
48 read -P0 0x00f8000 32k
49 read -P0 0x2010000 32k
50 read -P0 0x3fe0000 64k
97 read -P0 0x00f8000 32k
98 read -P0 0x2010000 32k
99 read -P0 0x3fe0000 64k
118 read -P0 0x00f8000 32k
[all …]
/openbmc/u-boot/arch/nds32/lib/
H A Dcache.c79 "mfsr $p0, $mr8\n\t" in icache_enable()
80 "ori $p0, $p0, 0x01\n\t" in icache_enable()
81 "mtsr $p0, $mr8\n\t" in icache_enable()
89 "mfsr $p0, $mr8\n\t" in icache_disable()
91 "and $p0, $p0, $p1\n\t" in icache_disable()
92 "mtsr $p0, $mr8\n\t" in icache_disable()
102 "mfsr $p0, $mr8\n\t" in icache_status()
103 "andi %0, $p0, 0x01\n\t" in icache_status()
190 "mfsr $p0, $mr8\n\t" in dcache_enable()
191 "ori $p0, $p0, 0x02\n\t" in dcache_enable()
[all …]
/openbmc/linux/scripts/coccinelle/misc/
H A Dminmax.cocci172 for p0 in p:
173 coccilib.report.print_report(p0, "WARNING opportunity for max()")
179 for p0 in p:
180 coccilib.org.print_todo(p0, "WARNING opportunity for max()")
186 for p0 in p:
187 coccilib.report.print_report(p0, "WARNING opportunity for max()")
193 for p0 in p:
194 coccilib.org.print_todo(p0, "WARNING opportunity for max()")
200 for p0 in p:
201 coccilib.report.print_report(p0, "WARNING opportunity for min()")
[all …]
H A Ddoubleinit.cocci19 position p0,p;
23 struct I s =@p0 { ..., .fld@p = E, ...};
27 position r.p0,p;
31 struct I s =@p0 { ..., .fld@p = E, ...};
34 p0 << r.p0;
41 cocci.print_main(fld,p0)
46 p0 << r.p0;
54 coccilib.report.print_report(p0[0],msg)
/openbmc/linux/arch/hexagon/include/asm/
H A Dbitops.h39 " { P0 = tstbit(R12,R11); R12 = clrbit(R12,R11); }\n" in test_and_clear_bit()
41 " {if (!P1) jump 1b; %0 = mux(P0,#1,#0);}\n" in test_and_clear_bit()
44 : "r10", "r11", "r12", "p0", "p1", "memory" in test_and_clear_bit()
63 " { P0 = tstbit(R12,R11); R12 = setbit(R12,R11); }\n" in test_and_set_bit()
65 " {if (!P1) jump 1b; %0 = mux(P0,#1,#0);}\n" in test_and_set_bit()
68 : "r10", "r11", "r12", "p0", "p1", "memory" in test_and_set_bit()
89 " { P0 = tstbit(R12,R11); R12 = togglebit(R12,R11); }\n" in test_and_change_bit()
91 " {if (!P1) jump 1b; %0 = mux(P0,#1,#0);}\n" in test_and_change_bit()
94 : "r10", "r11", "r12", "p0", "p1", "memory" in test_and_change_bit()
173 "{P0 = tstbit(%1,%2); if (P0.new) %0 = #1; if (!P0.new) %0 = #0;}\n" in arch_test_bit()
[all …]
/openbmc/qemu/tests/tcg/aarch64/
H A Dsme-fmopa-1.c12 "ptrue p0.s, vl4\n\t" in foo()
19 "fmopa za1.s, p0/m, p0/m, z0.s, z0.s\n\t" in foo()
25 "mova z0.s, p0/m, za1v.s[w12, #0]\n\t" in foo()
26 "mova z1.s, p0/m, za1v.s[w12, #1]\n\t" in foo()
27 "mova z2.s, p0/m, za1v.s[w12, #2]\n\t" in foo()
28 "mova z3.s, p0/m, za1v.s[w12, #3]\n\t" in foo()
32 "st1w {z0.s}, p0, [%0]\n\t" in foo()
34 "st1w {z1.s}, p0, [x0]\n\t" in foo()
36 "st1w {z2.s}, p0, [x0]\n\t" in foo()
38 "st1w {z3.s}, p0, [x0]\n\t" in foo()
H A Dsme-outprod1.c21 " ptrue p0.s, vl4\n"
28 " fmopa za1.s, p0/m, p0/m, z0.s, z0.s\n"
34 " mova z0.s, p0/m, za1v.s[w12, #0]\n"
35 " mova z1.s, p0/m, za1v.s[w12, #1]\n"
36 " mova z2.s, p0/m, za1v.s[w12, #2]\n"
37 " mova z3.s, p0/m, za1v.s[w12, #3]\n"
41 " st1w {z0.s}, p0, [x0]\n"
43 " st1w {z1.s}, p0, [x0]\n"
45 " st1w {z2.s}, p0, [x0]\n"
47 " st1w {z3.s}, p0, [x0]\n"
H A Dmte-1.c12 int *p0, *p1, *p2; in main() local
16 p0 = alloc_mte_mem(sizeof(*p0)); in main()
18 asm("irg %0,%1,%2" : "=r"(p1) : "r"(p0), "r"(1l)); in main()
19 assert(p1 != p0); in main()
20 asm("subp %0,%1,%2" : "=r"(c) : "r"(p0), "r"(p1)); in main()
24 asm("ldg %0, [%1]" : "=r"(p2) : "r"(p0), "0"(p0)); in main()
/openbmc/phosphor-logging/extensions/openpower-pels/registry/
H A Dmessage_registry.json520 "CalloutList": [{ "Priority": "high", "LocCode": "P0" }]
771 "LocCode": "P0"
775 "LocCode": "P0-C15"
784 "LocCode": "P0"
788 "LocCode": "P0-C61"
1747 "LocCode": "P0"
1751 "LocCode": "P0-C22"
1760 "LocCode": "P0"
1764 "LocCode": "P0-C96"
1773 "LocCode": "P0"
[all …]
/openbmc/linux/Documentation/devicetree/bindings/ata/
H A Dceva,ahci-1v84.yaml40 ceva,p0-cominit-params:
45 ceva,p0-cominit-params = /bits/ 8 <CIBGMN CIBGMX CIBGN CINMP>;
52 ceva,p0-comwake-params:
57 ceva,p0-comwake-params = /bits/ 8 <CWBGMN CWBGMX CWBGN CWNMP>;
64 ceva,p0-burst-params:
69 ceva,p0-burst-params = /bits/ 8 <BMX BNM SFD PTST>;
76 ceva,p0-retry-params:
81 ceva,p0-retry-params = /bits/ 16 <RIT RCT>;
152 - ceva,p0-cominit-params
153 - ceva,p0-comwake-params
[all …]

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