on\-demand (full) in projects: openbmc - OpenGrok search results

Searched +full:on +full:- +full:demand (Results 1 – 25 of 519) sorted by relevance

/openbmc/linux/tools/perf/pmu-events/arch/powerpc/power8/
H A D	cache.json	5 …ied (M) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due… 6 …from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to either on… 11 …red (S) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due… 12 …from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to either on… 17 …s data cache was reloaded from another chip's L4 on a different Node or Group (Distant) due to a d… 18 …was reloaded from another chip's L4 on a different Node or Group (Distant) due to either only dema… 23 …fDescription": "The processor's data cache was reloaded from local core's L2 due to a demand load", 24 … data cache was reloaded from local core's L2 due to either only demand loads or demand loads plus… 29 "BriefDescription": "Demand LD - L2 Miss (not L2 hit)", 35 …sor's data cache was reloaded from a location other than the local core's L2 due to a demand load", [all …]
H A D	other.json	11 …"BriefDescription": "Cycles in 2-lpar mode. Threads 0-3 belong to Lpar0 and threads 4-7 belong to … 17 …cles in 4 LPAR mode. Threads 0-1 belong to lpar0, threads 2-3 belong to lpar1, threads 4-5 belong … 23 … Final Pump Scope was chip pump (prediction=correct) for all data types (demand load,data prefetch… 24 …cross this scope was chip pump (prediction=correct) for all data types ( demand load,data,inst pre… 29 …pe and data sourced across this scope was group pump for all data types (demand load,data prefetch… 30 …ss this scope was group pump for all data types excluding data prefetch (demand load,inst prefetch… 35 … up either larger or smaller than Initial Pump Scope for all data types (demand load,data prefetch… 41 …roup) ended up larger than Initial Pump Scope (Chip) for all data types (demand load,data prefetch… 42 …nd initial pump was chip pumpfor all data types excluding data prefetch (demand load,inst prefetch… 47 …prediction correct. Counts across all types of pumps for all data types (demand load,data prefetch… [all …]
/openbmc/linux/tools/perf/pmu-events/arch/x86/sapphirerapids/
H A D	cache.json	13 …opportunistic replacements, and replacements that require stall-for-replace or block-for-replace.", 18 …"BriefDescription": "Number of cycles a demand request has waited due to L1D Fill Buffer (FB) unav… 21 …er of cycles a demand request has waited due to L1D Fill Buffer (FB) unavailability. Demand reques… 26 …"BriefDescription": "Number of phases a demand request has waited due to L1D Fill Buffer (FB) unav… 31 …er of phases a demand request has waited due to L1D Fill Buffer (FB) unavailability. Demand reques… 44 …"BriefDescription": "Number of cycles a demand request has waited due to L1D due to lack of L2 res… 47 …mber of cycles a demand request has waited due to L1D due to lack of L2 resources. Demand requests… 55 …Demand Reads. FB either is held by demand loads, or it is held by non-demand loads and gets hit at… 84 …"BriefDescription": "Non-modified cache lines that are silently dropped by L2 cache when triggered… 87 …y an L2 cache fill. These lines are typically in Shared or Exclusive state. A non-threaded event.", [all …]
H A D	other.json	17 …"BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that ha… 26 …"BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that we… 35 …"BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that we… 44 …demand instruction fetches and L1 instruction cache prefetches that were supplied by DRAM on a dis… 53 "BriefDescription": "Counts demand data reads that have any type of response.", 62 "BriefDescription": "Counts demand data reads that were supplied by DRAM.", 71 …"BriefDescription": "Counts demand data reads that were supplied by DRAM attached to this socket, … 80 …"BriefDescription": "Counts demand data reads that were supplied by PMM attached to this socket, w… 89 "BriefDescription": "Counts demand data reads that were supplied by PMM.", 98 …"BriefDescription": "Counts demand data reads that were supplied by DRAM attached to another socke… [all …]
/openbmc/linux/tools/perf/pmu-events/arch/x86/icelakex/
H A D	cache.json	6 …opportunistic replacements, and replacements that require stall-for-replace or block-for-replace.", 11 …"BriefDescription": "Number of cycles a demand request has waited due to L1D Fill Buffer (FB) unav… 14 …er of cycles a demand request has waited due to L1D Fill Buffer (FB) unavailability. Demand reques… 19 …"BriefDescription": "Number of phases a demand request has waited due to L1D Fill Buffer (FB) unav… 24 …er of phases a demand request has waited due to L1D Fill Buffer (FB) unavailability. Demand reques… 29 …"BriefDescription": "Number of cycles a demand request has waited due to L1D due to lack of L2 res… 32 …mber of cycles a demand request has waited due to L1D due to lack of L2 resources. Demand requests… 40 …Demand Reads. FB either is held by demand loads, or it is held by non-demand loads and gets hit at… 70 …"BriefDescription": "Non-modified cache lines that are silently dropped by L2 cache when triggered… 73 …y an L2 cache fill. These lines are typically in Shared or Exclusive state. A non-threaded event.", [all …]
H A D	other.json	3 … where the core was running in a manner where Turbo may be clipped to the Non-AVX turbo schedule.", 6 …s running with power-delivery for baseline license level 0. This includes non-AVX codes, SSE, AVX… 14 … running with power-delivery for license level 1. This includes high current AVX 256-bit instruct… 22 … running with power-delivery for license level 2 (introduced in Skylake Server microarchtecture). … 30 … in this cores caches cache. A single snoop response from the core counts on all hyperthreads of … 38 …s cache (aka HitM response). A single snoop response from the core counts on all hyperthreads of … 46 … state in this cores caches. A single snoop response from the core counts on all hyperthreads of … 54 …IHitI) in this core's caches. A single snoop response from the core counts on all hyperthreads of … 62 …on this core in the (S)hared state, after the data is forwarded back to the requestor, initially t… 70 …on this core in the (S)hared state, after the data is forwarded back to the requestor, initially t… [all …]
/openbmc/linux/tools/perf/pmu-events/arch/powerpc/power9/
H A D	marked.json	20 … Entry was loaded into the TLB with Shared (S) data from another core's L3 on the same chip due to… 25 …data cache was reloaded from another chip's memory on the same Node or Group ( Remote) due to a de… 70 …ry was loaded into the TLB with Shared (S) data from another core's ECO L3 on the same chip due to… 95 … was loaded into the TLB with Modified (M) data from another core's ECO L3 on the same chip due to… 100 …ry was loaded into the TLB with Shared (S) data from another core's ECO L3 on the same chip due to… 105 "BriefDescription": "DL1 reloaded due to Demand Load" 120 …"The processor's Instruction cache was reloaded from another chip's memory on the same Node or Gro… 130 …ption": "The processor's data cache was reloaded from the local chip's Memory due to a demand load" 145 …ption": "Final Pump Scope (Group) ended up larger than Initial Pump Scope (Chip) for a demand load" 165 …Description": "Initial and Final Pump Scope was system pump (prediction=correct) for a demand load" [all …]
/openbmc/linux/Documentation/ABI/testing/
H A D	sysfs-driver-intel_sdsi	7 On Demand (formerly Software Defined Silicon or SDSi) features 8 on a CPU. X represents the socket instance (though not the 12 Some files communicate with On Demand hardware through a 21 EPERM On Demand capability is not enabled in hardware. 38 is available at http://github.com/intel/intel-sdsi 49 http://github.com/intel/intel-sdsi 57 the On Demand NVRAM for the CPU. The AKC is used to authenticate 66 On Demand NVRAM for the CPU. CAPs are used to activate a given 67 CPU feature. A CAP is validated by On Demand hardware using a 78 from Intel On Demand hardware. The meter certificate contains [all …]
/openbmc/linux/tools/perf/pmu-events/arch/x86/tigerlake/
H A D	cache.json	6 …opportunistic replacements, and replacements that require stall-for-replace or block-for-replace.", 11 …"BriefDescription": "Number of cycles a demand request has waited due to L1D Fill Buffer (FB) unav… 14 …er of cycles a demand request has waited due to L1D Fill Buffer (FB) unavailability. Demand reques… 19 …"BriefDescription": "Number of phases a demand request has waited due to L1D Fill Buffer (FB) unav… 24 …er of phases a demand request has waited due to L1D Fill Buffer (FB) unavailability. Demand reques… 29 …"BriefDescription": "Number of cycles a demand request has waited due to L1D due to lack of L2 res… 32 …mber of cycles a demand request has waited due to L1D due to lack of L2 resources. Demand requests… 40 …Demand Reads. FB either is held by demand loads, or it is held by non-demand loads and gets hit at… 70 …"BriefDescription": "Non-modified cache lines that are silently dropped by L2 cache when triggered… 73 …y an L2 cache fill. These lines are typically in Shared or Exclusive state. A non-threaded event.", [all …]
/openbmc/linux/tools/perf/pmu-events/arch/x86/broadwellde/
H A D	cache.json	6 …opportunistic replacements, and replacements that require stall-for-replace or block-for-replace.", 11 … "BriefDescription": "Cycles a demand request was blocked due to Fill Buffers unavailability.", 22 …Demand Reads. FB either is held by demand loads, or it is held by non-demand loads and gets hit at… 37 … "BriefDescription": "Cycles with L1D load Misses outstanding from any thread on physical core.", 85 "BriefDescription": "Clean L2 cache lines evicted by demand.", 100 "BriefDescription": "Demand Data Read requests", 103 …"PublicDescription": "This event counts the number of demand Data Read requests (including request… 108 "BriefDescription": "Demand requests that miss L2 cache.", 115 "BriefDescription": "Demand requests to L2 cache.", 133 …ad for ownership) requests to L2 cache. L2 RFO requests include both L1D demand RFO misses as well… [all …]
/openbmc/linux/tools/perf/pmu-events/arch/x86/broadwellx/
H A D	cache.json	6 …opportunistic replacements, and replacements that require stall-for-replace or block-for-replace.", 11 … "BriefDescription": "Cycles a demand request was blocked due to Fill Buffers unavailability.", 22 …Demand Reads. FB either is held by demand loads, or it is held by non-demand loads and gets hit at… 37 … "BriefDescription": "Cycles with L1D load Misses outstanding from any thread on physical core.", 85 "BriefDescription": "Clean L2 cache lines evicted by demand.", 100 "BriefDescription": "Demand Data Read requests", 103 …"PublicDescription": "This event counts the number of demand Data Read requests (including request… 108 "BriefDescription": "Demand requests that miss L2 cache.", 115 "BriefDescription": "Demand requests to L2 cache.", 133 …ad for ownership) requests to L2 cache. L2 RFO requests include both L1D demand RFO misses as well… [all …]
/openbmc/linux/tools/perf/pmu-events/arch/x86/alderlake/
H A D	cache.json	14 …opportunistic replacements, and replacements that require stall-for-replace or block-for-replace.", 20 …"BriefDescription": "Number of cycles a demand request has waited due to L1D Fill Buffer (FB) unav… 23 …er of cycles a demand request has waited due to L1D Fill Buffer (FB) unavailability. Demand reques… 29 …"BriefDescription": "Number of phases a demand request has waited due to L1D Fill Buffer (FB) unav… 34 …er of phases a demand request has waited due to L1D Fill Buffer (FB) unavailability. Demand reques… 49 …"BriefDescription": "Number of cycles a demand request has waited due to L1D due to lack of L2 res… 52 …mber of cycles a demand request has waited due to L1D due to lack of L2 resources. Demand requests… 61 …Demand Reads. FB either is held by demand loads, or it is held by non-demand loads and gets hit at… 86 …fDescription": "Cache lines that have been L2 hardware prefetched but not used by demand accesses", 89 … that have been prefetched by the L2 hardware prefetcher but not used by demand access when evicte… [all …]
/openbmc/linux/tools/perf/pmu-events/arch/x86/meteorlake/
H A D	cache.json	14 …opportunistic replacements, and replacements that require stall-for-replace or block-for-replace.", 20 …"BriefDescription": "Number of cycles a demand request has waited due to L1D Fill Buffer (FB) unav… 23 …er of cycles a demand request has waited due to L1D Fill Buffer (FB) unavailability. Demand reques… 29 …"BriefDescription": "Number of phases a demand request has waited due to L1D Fill Buffer (FB) unav… 34 …er of phases a demand request has waited due to L1D Fill Buffer (FB) unavailability. Demand reques… 40 …"BriefDescription": "Number of cycles a demand request has waited due to L1D due to lack of L2 res… 43 …mber of cycles a demand request has waited due to L1D due to lack of L2 resources. Demand requests… 52 …Demand Reads. FB either is held by demand loads, or it is held by non-demand loads and gets hit at… 86 …"BriefDescription": "Non-modified cache lines that are silently dropped by L2 cache when triggered… 89 …y an L2 cache fill. These lines are typically in Shared or Exclusive state. A non-threaded event.", [all …]
H A D	memory.json	3 "BriefDescription": "Cycles while L3 cache miss demand load is outstanding.", 12 "BriefDescription": "Execution stalls while L3 cache miss demand load is outstanding.", 21 …g an L1 miss, WCB full, pagewalk, store address block or store data block, on a load that retires.… 79 "BriefDescription": "Execution stalls while L1 cache miss demand load is outstanding.", 88 …"BriefDescription": "Execution stalls while L2 cache miss demand cacheable load request is outstan… 92 …ecution stalls while L2 cache miss demand cacheable load request is outstanding (will not count fo… 98 …"BriefDescription": "Execution stalls while L3 cache miss demand cacheable load request is outstan… 102 …ecution stalls while L3 cache miss demand cacheable load request is outstanding (will not count fo… 259 …y accesses with at least 1 store operation. This PEBS event is the precisely-distributed (PDist) t… 283 "BriefDescription": "Counts demand data read requests that miss the L3 cache.", [all …]
/openbmc/linux/tools/perf/pmu-events/arch/x86/ivybridge/
H A D	cache.json	11 … "BriefDescription": "Cycles a demand request was blocked due to Fill Buffers inavailability", 15 … "PublicDescription": "Cycles a demand request was blocked due to Fill Buffers inavailability.", 37 … "BriefDescription": "Cycles with L1D load Misses outstanding from any thread on physical core", 41 … "PublicDescription": "Cycles with L1D load Misses outstanding from any thread on physical core.", 69 …on": "Count the number of modified Lines evicted from L1 and missed L2. (Non-rejected WBs from the… 109 "BriefDescription": "Clean L2 cache lines evicted by demand", 112 "PublicDescription": "Clean L2 cache lines evicted by demand.", 117 "BriefDescription": "Dirty L2 cache lines evicted by demand", 120 "PublicDescription": "Dirty L2 cache lines evicted by demand.", 157 "BriefDescription": "Demand Data Read requests", [all …]
/openbmc/linux/tools/perf/pmu-events/arch/x86/knightslanding/
H A D	cache.json	3 …the L2Q because of any L2 queue reject condition. There is no concept of at-ret here. It might in… 31 … and L1 evictions (automatically exlcudes L2HWP, UC, WC) that were rejected - Multiple repeated re… 37 "BriefDescription": "Counts all the load micro-ops retired", 40 "PublicDescription": "This event counts the number of load micro-ops retired.", 45 "BriefDescription": "Counts all the store micro-ops retired", 48 "PublicDescription": "This event counts the number of store micro-ops retired.", 62 "BriefDescription": "Counts the number of load micro-ops retired that miss in L1 D cache", 65 …"PublicDescription": "This event counts the number of load micro-ops retired that miss in L1 Data … 70 "BriefDescription": "Counts the number of load micro-ops retired that hit in the L2", 79 "BriefDescription": "Counts the number of load micro-ops retired that miss in the L2", [all …]
/openbmc/linux/tools/perf/pmu-events/arch/x86/goldmontplus/
H A D	virtual-memory.json	3 "BriefDescription": "Page walk completed due to a demand load to a 1GB page", 6 …"PublicDescription": "Counts page walks completed due to demand data loads (including SW prefetche… 11 "BriefDescription": "Page walk completed due to a demand load to a 2M or 4M page", 14 …"PublicDescription": "Counts page walks completed due to demand data loads (including SW prefetche… 19 "BriefDescription": "Page walk completed due to a demand load to a 4K page", 22 …"PublicDescription": "Counts page walks completed due to demand data loads (including SW prefetche… 27 "BriefDescription": "Page walks outstanding due to a demand load every cycle.", 30 …ion": "Counts once per cycle for each page walk occurring due to a load (demand data loads or SW p… 35 "BriefDescription": "Page walk completed due to a demand data store to a 1GB page", 38 …"PublicDescription": "Counts page walks completed due to demand data stores whose address translat… [all …]
/openbmc/linux/tools/perf/pmu-events/arch/x86/ivytown/
H A D	cache.json	11 … "BriefDescription": "Cycles a demand request was blocked due to Fill Buffers inavailability", 15 … "PublicDescription": "Cycles a demand request was blocked due to Fill Buffers inavailability.", 37 … "BriefDescription": "Cycles with L1D load Misses outstanding from any thread on physical core", 41 … "PublicDescription": "Cycles with L1D load Misses outstanding from any thread on physical core.", 69 …on": "Count the number of modified Lines evicted from L1 and missed L2. (Non-rejected WBs from the… 109 "BriefDescription": "Clean L2 cache lines evicted by demand", 112 "PublicDescription": "Clean L2 cache lines evicted by demand.", 117 "BriefDescription": "Dirty L2 cache lines evicted by demand", 120 "PublicDescription": "Dirty L2 cache lines evicted by demand.", 157 "BriefDescription": "Demand Data Read requests", [all …]
/openbmc/linux/tools/perf/pmu-events/arch/x86/rocketlake/
H A D	cache.json	6 …opportunistic replacements, and replacements that require stall-for-replace or block-for-replace.", 11 …"BriefDescription": "Number of cycles a demand request has waited due to L1D Fill Buffer (FB) unav… 14 …er of cycles a demand request has waited due to L1D Fill Buffer (FB) unavailability. Demand reques… 19 …"BriefDescription": "Number of phases a demand request has waited due to L1D Fill Buffer (FB) unav… 24 …er of phases a demand request has waited due to L1D Fill Buffer (FB) unavailability. Demand reques… 29 …"BriefDescription": "Number of cycles a demand request has waited due to L1D due to lack of L2 res… 32 …mber of cycles a demand request has waited due to L1D due to lack of L2 resources. Demand requests… 40 …Demand Reads. FB either is held by demand loads, or it is held by non-demand loads and gets hit at… 70 …"BriefDescription": "Non-modified cache lines that are silently dropped by L2 cache when triggered… 73 …y an L2 cache fill. These lines are typically in Shared or Exclusive state. A non-threaded event.", [all …]
/openbmc/linux/tools/perf/pmu-events/arch/x86/icelake/
H A D	cache.json	6 …opportunistic replacements, and replacements that require stall-for-replace or block-for-replace.", 11 …"BriefDescription": "Number of cycles a demand request has waited due to L1D Fill Buffer (FB) unav… 14 …er of cycles a demand request has waited due to L1D Fill Buffer (FB) unavailability. Demand reques… 19 …"BriefDescription": "Number of phases a demand request has waited due to L1D Fill Buffer (FB) unav… 24 …er of phases a demand request has waited due to L1D Fill Buffer (FB) unavailability. Demand reques… 29 …"BriefDescription": "Number of cycles a demand request has waited due to L1D due to lack of L2 res… 32 …mber of cycles a demand request has waited due to L1D due to lack of L2 resources. Demand requests… 40 …Demand Reads. FB either is held by demand loads, or it is held by non-demand loads and gets hit at… 70 …"BriefDescription": "Non-modified cache lines that are silently dropped by L2 cache when triggered… 73 …y an L2 cache fill. These lines are typically in Shared or Exclusive state. A non-threaded event.", [all …]
/openbmc/linux/tools/perf/pmu-events/arch/x86/snowridgex/
H A D	cache.json	3 …"BriefDescription": "Counts the number of core requests (demand and L1 prefetchers) rejected by th… 6 …demand and L1 prefetchers) core requests rejected by the L2 queue (L2Q) due to a full or nearly fu… 18 …"BriefDescription": "Counts the number of demand and prefetch transactions that the External Queue… 21 …demand and prefetch transactions that the External Queue (XQ) rejects due to a full or near full c… 25 … "BriefDescription": "Counts the total number of L2 Cache accesses. Counts on a per core basis.", 28 …ejects front door requests for CRd/DRd/RFO/ItoM/L2 Prefetches only. Counts on a per core basis.", 32 …ion": "Counts the number of L2 Cache accesses that resulted in a hit. Counts on a per core basis.", 35 …rom a front door request only (does not include rejects or recycles), Counts on a per core basis.", 40 …on": "Counts the number of L2 Cache accesses that resulted in a miss. Counts on a per core basis.", 43 …rom a front door request only (does not include rejects or recycles). Counts on a per core basis.", [all …]
/openbmc/linux/tools/perf/pmu-events/arch/x86/elkhartlake/
H A D	cache.json	3 …"BriefDescription": "Counts the number of core requests (demand and L1 prefetchers) rejected by th… 6 …demand and L1 prefetchers) core requests rejected by the L2 queue (L2Q) due to a full or nearly fu… 18 …"BriefDescription": "Counts the number of demand and prefetch transactions that the External Queue… 21 …demand and prefetch transactions that the External Queue (XQ) rejects due to a full or near full c… 25 … "BriefDescription": "Counts the total number of L2 Cache accesses. Counts on a per core basis.", 28 …ejects front door requests for CRd/DRd/RFO/ItoM/L2 Prefetches only. Counts on a per core basis.", 32 …ion": "Counts the number of L2 Cache accesses that resulted in a hit. Counts on a per core basis.", 35 …rom a front door request only (does not include rejects or recycles), Counts on a per core basis.", 40 …on": "Counts the number of L2 Cache accesses that resulted in a miss. Counts on a per core basis.", 43 …rom a front door request only (does not include rejects or recycles). Counts on a per core basis.", [all …]
/openbmc/linux/tools/perf/pmu-events/arch/x86/jaketown/
H A D	cache.json	40 … "BriefDescription": "Cycles a demand request was blocked due to Fill Buffers unavailability.", 64 … "BriefDescription": "Cycles with L1D load Misses outstanding from any thread on physical core.", 100 …on": "Count the number of modified Lines evicted from L1 and missed L2. (Non-rejected WBs from the… 136 "BriefDescription": "Clean L2 cache lines evicted by demand.", 143 "BriefDescription": "Dirty L2 cache lines evicted by demand.", 178 "BriefDescription": "Demand Data Read requests.", 213 "BriefDescription": "Demand Data Read requests that hit L2 cache.", 297 "BriefDescription": "Demand Data Read requests that access L2 cache.", 339 "BriefDescription": "Core-originated cacheable demand requests missed LLC.", 346 "BriefDescription": "Core-originated cacheable demand requests that refer to LLC.", [all …]
/openbmc/linux/tools/perf/pmu-events/arch/x86/haswellx/
H A D	cache.json	11 … "BriefDescription": "Cycles a demand request was blocked due to Fill Buffers unavailability.", 36 … "BriefDescription": "Cycles with L1D load Misses outstanding from any thread on physical core.", 91 "BriefDescription": "Clean L2 cache lines evicted by demand", 94 "PublicDescription": "Clean L2 cache lines evicted by demand.", 99 "BriefDescription": "Dirty L2 cache lines evicted by demand", 102 "PublicDescription": "Dirty L2 cache lines evicted by demand.", 115 "BriefDescription": "Demand Data Read requests", 119 "PublicDescription": "Counts any demand and L1 HW prefetch data load requests to L2.", 124 "BriefDescription": "Demand requests that miss L2 cache", 128 "PublicDescription": "Demand requests that miss L2 cache.", [all …]
/openbmc/linux/tools/perf/pmu-events/arch/x86/haswell/
H A D	cache.json	11 … "BriefDescription": "Cycles a demand request was blocked due to Fill Buffers unavailability.", 36 … "BriefDescription": "Cycles with L1D load Misses outstanding from any thread on physical core.", 91 "BriefDescription": "Clean L2 cache lines evicted by demand", 94 "PublicDescription": "Clean L2 cache lines evicted by demand.", 99 "BriefDescription": "Dirty L2 cache lines evicted by demand", 102 "PublicDescription": "Dirty L2 cache lines evicted by demand.", 115 "BriefDescription": "Demand Data Read requests", 119 "PublicDescription": "Counts any demand and L1 HW prefetch data load requests to L2.", 124 "BriefDescription": "Demand requests that miss L2 cache", 128 "PublicDescription": "Demand requests that miss L2 cache.", [all …]

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