| /openbmc/u-boot/doc/device-tree-bindings/firmware/ |
| H A D | nvidia,tegra186-bpmp.txt | 11 - name : Should be bpmp
12 - compatible
15 - "nvidia,tegra186-bpmp"
16 - mboxes : The phandle of mailbox controller and the mailbox specifier.
17 - shmem : List of the phandle of the TX and RX shared memory area that
19 - #clock-cells : Should be 1.
20 - #power-domain-cells : Should be 1.
21 - #reset-cells : Should be 1.
27 - .../mailbox/mailbox.txt
28 - .../mailbox/nvidia,tegra186-hsp.txt
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| /openbmc/linux/include/uapi/linux/ |
| H A D | isst_if.h | 1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
16 * struct isst_if_platform_info - Define platform information
25 * @mmio_supported: Support of mmio interface for core-power feature
28 * information can be used by the user space, to get the driver, firmware
40 * struct isst_if_cpu_map - CPU mapping between logical and physical CPU
44 * Used to convert from Linux logical CPU to PUNIT CPU numbering scheme.
45 * The PUNIT CPU number is different than APIC ID based CPU numbering.
53 * struct isst_if_cpu_maps - structure for CPU map IOCTL
67 * struct isst_if_io_reg - Read write PUNIT IO register
84 * struct isst_if_io_regs - structure for IO register commands
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| /openbmc/linux/Documentation/devicetree/bindings/firmware/ |
| H A D | nvidia,tegra186-bpmp.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/firmware/nvidia,tegra186-bpmp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
25 - .../mailbox/mailbox.txt
26 - .../mailbox/nvidia,tegra186-hsp.yaml
32 - .../clock/clock-bindings.txt
33 - <dt-bindings/clock/tegra186-clock.h>
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| /openbmc/linux/Documentation/virt/kvm/devices/ |
| H A D | mpic.rst | 1 .. SPDX-License-Identifier: GPL-2.0
9 - KVM_DEV_TYPE_FSL_MPIC_20 Freescale MPIC v2.0
10 - KVM_DEV_TYPE_FSL_MPIC_42 Freescale MPIC v4.2
20 KVM_DEV_MPIC_BASE_ADDR (rw, 64-bit)
21 Base address of the 256 KiB MPIC register space. Must be
25 KVM_DEV_MPIC_GRP_REGISTER (rw, 32-bit)
27 "attr" is the byte offset into the MPIC register space. Accesses
28 must be 4-byte aligned.
33 KVM_DEV_MPIC_GRP_IRQ_ACTIVE (rw, 32-bit)
37 For edge-triggered interrupts: Writing 1 is considered an activating
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| H A D | vm.rst | 1 .. SPDX-License-Identifier: GPL-2.0
9 struct kvm_device_attr as other devices, but targets VM-wide settings
21 -------------------------------------------
24 :Returns: -EBUSY if a vcpu is already defined, otherwise 0
29 ----------------------------------------
32 :Returns: -EINVAL if CMMA was not enabled;
39 -----------------------------------------
41 :Parameters: in attr->addr the address for the new limit of guest memory
42 :Returns: -EFAULT if the given address is not accessible;
43 -EINVAL if the virtual machine is of type UCONTROL;
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| /openbmc/u-boot/doc/driver-model/ |
| H A D | README.txt | 4 This README contains high-level information about driver model, a unified
5 way of declaring and accessing drivers in U-Boot. The original work was done
20 -----------
22 Uclass - a group of devices which operate in the same way. A uclass provides
28 Driver - some code which talks to a peripheral and presents a higher-level
31 Device - an instance of a driver, tied to a particular port or peripheral.
35 -------------
37 Build U-Boot sandbox and run it:
41 ./u-boot -d u-boot.dtb
43 (type 'reset' to exit U-Boot)
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| /openbmc/linux/Documentation/process/ |
| H A D | adding-syscalls.rst | 9 :ref:`Documentation/process/submitting-patches.rst <submittingpatches>`.
13 ------------------------
18 kernel, there are other possibilities -- choose what fits best for your
21 - If the operations involved can be made to look like a filesystem-like
26 - If the new functionality involves operations where the kernel notifies
30 - However, operations that don't map to
31 :manpage:`read(2)`/:manpage:`write(2)`-like operations
35 - If you're just exposing runtime system information, a new node in sysfs
41 - If the operation is specific to a particular file or file descriptor, then
47 - If the operation is specific to a particular task or process, then an
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| /openbmc/u-boot/arch/powerpc/cpu/mpc85xx/ |
| H A D | commproc.c | 5 * This file is based on "arch/powerpc/8260_io/commproc.c" - here is it's
20 * space. The allocator for that is here. When the communication
34 #define CPM_DATAONLY_SIZE ((uint)(8 * 1024) - CPM_DATAONLY_BASE)
46 gd->arch.dp_alloc_base = CPM_DATAONLY_BASE; in m8560_cpm_reset()
47 gd->arch.dp_alloc_top = gd->arch.dp_alloc_base + CPM_DATAONLY_SIZE; in m8560_cpm_reset()
52 cpm->im_cpm_cp.cpcr = CPM_CR_RST; in m8560_cpm_reset()
56 } while ((cpm->im_cpm_cp.cpcr & CPM_CR_FLG) && ++count < 1000000); in m8560_cpm_reset()
71 align_mask = align - 1; in m8560_cpm_dpalloc()
72 savebase = gd->arch.dp_alloc_base; in m8560_cpm_dpalloc()
74 off = gd->arch.dp_alloc_base & align_mask; in m8560_cpm_dpalloc()
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| /openbmc/linux/arch/parisc/include/asm/ |
| H A D | pci.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
11 ** (workstations 1-~4, servers 2-~32)
25 * accessing the PCI bus once #RESET is de-asserted.
26 * PCI spec somewhere says 1 second but with multi-PCI bus systems,
46 int hba_num; /* I/O port space access "key" */
58 unsigned long lmmio_space_offset; /* CPU view - PCI view */
60 /* REVISIT - spinlock to protect resources? */
72 ** space address.
80 #define PCI_PORT_ADDR(a) ((a) & (HBA_PORT_SPACE_SIZE - 1))
90 ** to both MMIO and I/O port space. Due to poor performance of I/O Port
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| /openbmc/linux/include/uapi/asm-generic/ |
| H A D | ioctl.h | 1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
10 * and to avoid overwriting user space outside the user buffer area.
12 * NOTE: This limits the max parameter size to 16kB -1 !
17 * platforms. The generic ioctl numbering scheme doesn't really enforce
39 #define _IOC_NRMASK ((1 << _IOC_NRBITS)-1)
40 #define _IOC_TYPEMASK ((1 << _IOC_TYPEBITS)-1)
41 #define _IOC_SIZEMASK ((1 << _IOC_SIZEBITS)-1)
42 #define _IOC_DIRMASK ((1 << _IOC_DIRBITS)-1)
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| /openbmc/u-boot/include/asm-generic/ |
| H A D | ioctl.h | 9 * and to avoid overwriting user space outside the user buffer area.
11 * NOTE: This limits the max parameter size to 16kB -1 !
16 * platforms. The generic ioctl numbering scheme doesn't really enforce
38 #define _IOC_NRMASK ((1 << _IOC_NRBITS)-1)
39 #define _IOC_TYPEMASK ((1 << _IOC_TYPEBITS)-1)
40 #define _IOC_SIZEMASK ((1 << _IOC_SIZEBITS)-1)
41 #define _IOC_DIRMASK ((1 << _IOC_DIRBITS)-1)
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| /openbmc/u-boot/include/fsl-mc/ |
| H A D | fsl_qbman_base.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
10 * control this QBMan instance, these values may simply be place-holders. The
16 int irq_nrerr; /* Non-recoverable error interrupt line */
20 * the user context. Ie. on MC, this information is likely to be true-physical,
21 * and instantiated statically at compile-time. On GPP, this information is
24 * virtualisation of the GPP user's address space and/or interrupt numbering. */
27 void *cena_bar; /* Cache-enabled portal register map */
28 void *cinh_bar; /* Cache-inhibited portal register map */
34 /* Place-holder for FDs, we represent it via the simplest form that we need for
37 * routines (lots of read-modify-writes) would be worst-case performance whether
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| /openbmc/linux/drivers/pinctrl/nomadik/ |
| H A D | pinctrl-abx500.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
34 * struct abx500_function - ABx500 pinctrl mux function
46 * struct abx500_pingroup - describes a ABx500 pin group
49 * from the driver-local pin enumeration space
73 #define UNUSED -1
109 * struct abx500_gpio_irq_cluster - indicates GPIOs which are interrupt
116 * read-in values into the cluster information table
126 * struct abx500_pinrange - map pin numbers to GPIO offsets
142 * struct abx500_pinctrl_soc_data - ABx500 pin controller per-SoC configuration
148 * numbering.
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| /openbmc/linux/arch/powerpc/kernel/ |
| H A D | pci-common.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
12 * Common pmac/prep/chrp pci routines. -- Cort
37 #include <asm/pci-bridge.h>
40 #include <asm/ppc-pci.h>
50 /* For dynamic PHB numbering on get_phb_number(): max number of PHBs. */
54 * For dynamic PHB numbering: used/free PHBs tracking bitmap.
73 int ret, phb_id = -1; in get_phb_number()
77 * Try fixed PHB numbering first, by checking archs and reading in get_phb_number()
78 * the respective device-tree properties. Firstly, try reading in get_phb_number()
79 * standard "linux,pci-domain", then try reading "ibm,opal-phbid" in get_phb_number()
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| /openbmc/linux/arch/sparc/include/uapi/asm/ |
| H A D | errno.h | 1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
5 /* These match the SunOS error numbering scheme. */
7 #include <asm-generic/errno-base.h>
12 #define ENOTSOCK 38 /* Socket operation on non-socket */
29 #define ENOBUFS 55 /* No buffer space available */
114 #define ERFKILL 134 /* Operation not possible due to RF-kill */
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| /openbmc/linux/tools/arch/sparc/include/uapi/asm/ |
| H A D | errno.h | 1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
5 /* These match the SunOS error numbering scheme. */
7 #include <asm-generic/errno-base.h>
12 #define ENOTSOCK 38 /* Socket operation on non-socket */
29 #define ENOBUFS 55 /* No buffer space available */
114 #define ERFKILL 134 /* Operation not possible due to RF-kill */
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| /openbmc/linux/arch/powerpc/sysdev/ |
| H A D | cpm2.c | 4 * Copyright (c) 1999-2001 Dan Malek <dan@embeddedalley.com>
24 * space. The allocator for that is here. When the communication
46 cpm_cpm2_t __iomem *cpmp; /* Pointer to comm processor space */
54 #define CPM_MAP_SIZE (0x40000) /* 256k - the PQ3 reserve this amount
55 of space for CPM as it is larger
68 cpmp = &cpm2_immr->im_cpm; in cpm2_reset()
89 out_be32(&cpmp->cp_cpcr, command | opcode | CPM_CR_FLG); in cpm_command()
91 if ((in_be32(&cpmp->cp_cpcr) & CPM_CR_FLG) == 0) in cpm_command()
95 ret = -EIO; in cpm_command()
105 * memory mapped space.
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| /openbmc/linux/Documentation/scsi/ |
| H A D | st.rst | 1 .. SPDX-License-Identifier: GPL-2.0
23 flexible method and applicable to single-user workstations. However,
32 drive performs auto-detection of the tape format well (like some
33 QIC-drives). The result is that any tape can be read, writing can be
37 does not perform auto-detection well enough and there is a single
40 or not :-).
57 between formats in multi-tape operations (the explicitly overridden
72 limits). Both the auto-rewind (minor equals device number) and
73 non-rewind devices (minor is 128 + device number) are implemented.
128 dev_upper non-rew mode dev-lower
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| /openbmc/linux/Documentation/admin-guide/mm/ |
| H A D | numaperf.rst | 21 +------------------+ +------------------+
22 | Compute Node 0 +-----+ Compute Node 1 |
24 +--------+---------+ +--------+---------+
26 +--------+---------+ +--------+---------+
28 +------------------+ +--------+---------+
36 performance when accessing a given memory target. Each initiator-target
48 # symlinks -v /sys/devices/system/node/nodeX/access0/targets/
49 relative: /sys/devices/system/node/nodeX/access0/targets/nodeY -> ../../nodeY
51 # symlinks -v /sys/devices/system/node/nodeY/access0/initiators/
52 relative: /sys/devices/system/node/nodeY/access0/initiators/nodeX -> ../../nodeX
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| /openbmc/u-boot/fs/btrfs/ |
| H A D | btrfs_tree.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
31 * chunk tree stores translations from logical -> physical block numbering
57 /* tracks free space in block groups. */
64 #define BTRFS_BALANCE_OBJECTID -4ULL
67 #define BTRFS_ORPHAN_OBJECTID -5ULL
70 #define BTRFS_TREE_LOG_OBJECTID -6ULL
71 #define BTRFS_TREE_LOG_FIXUP_OBJECTID -7ULL
73 /* for space balancing */
74 #define BTRFS_TREE_RELOC_OBJECTID -8ULL
75 #define BTRFS_DATA_RELOC_TREE_OBJECTID -9ULL
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| /openbmc/linux/drivers/accel/habanalabs/gaudi2/ |
| H A D | gaudi2P.h | 1 /* SPDX-License-Identifier: GPL-2.0
3 * Copyright 2020-2022 HabanaLabs, Ltd.
19 #define GAUDI2_LINUX_FW_FILE "habanalabs/gaudi2/gaudi2-fit.itb"
20 #define GAUDI2_BOOT_FIT_FILE "habanalabs/gaudi2/gaudi2-boot-fit.itb"
46 (((mmDCORE0_SYNC_MNGR_OBJS_SOB_OBJ_8191 - \
50 (((mmDCORE0_SYNC_MNGR_OBJS_MON_STATUS_2047 - \
58 #define NUM_OF_EXPOSED_SM_BLOCKS ((NUM_OF_DCORES - 1) * 2)
75 #define SM_OBJS_BLOCK_SIZE (mmDCORE0_SYNC_MNGR_OBJS_SM_SEC_0 - \
106 (GAUDI2_DCORE1_ENGINE_ID_EDMA_0 - GAUDI2_DCORE0_ENGINE_ID_EDMA_0)
132 /* Host virtual address space. */
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| /openbmc/linux/drivers/fsi/ |
| H A D | fsi-core.c | 1 // SPDX-License-Identifier: GPL-2.0-only
8 * - Rework topology
9 * - s/chip_id/chip_loc
10 * - s/cfam/chip (cfam_id -> chip_id etc...)
27 #include "fsi-master.h"
28 #include "fsi-slave.h"
94 /* Legacy /dev numbering: 4 devices per chip, 16 chips */
106 * FSI endpoint-device support
113 * plus desired offset to access its register space.
123 if (addr > dev->size || size > dev->size || addr > dev->size - size) in fsi_device_read()
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| /openbmc/openbmc-test-automation/openpower/pel/ |
| H A D | test_bmc_pel.robot | 47 ${pel_records}= Peltool -l
49 # Example output from 'Peltool -l':
72 Should Match Regexp ${pel_records['${id}']['CompID']} [a-zA-Z0-9]
73 Should Match Regexp ${pel_records['${id}']['SRC']} [a-zA-Z0-9]
93 ${pel_id}= Get From List ${pel_ids} -1
94 ${pel_output}= Peltool -i ${pel_id}
113 Verify PEL ID Numbering
114 [Documentation] Verify PEL ID numbering.
124 # [0x50000012]: <--- First PEL ID
134 # [0x50000013]: <--- Second PEL ID
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| /openbmc/linux/arch/sparc/kernel/ |
| H A D | leon_pci_grpci1.c | 1 // SPDX-License-Identifier: GPL-2.0
32 /* Enable/Disable Debugging Configuration Space Access */
108 struct grpci1_priv *priv = dev->bus->sysdata; in grpci1_map_irq()
111 /* Use default IRQ decoding on PCI BUS0 according slot numbering */ in grpci1_map_irq()
113 pin = ((pin - 1) + irq_group) & 0x3; in grpci1_map_irq()
115 return priv->irq_map[pin]; in grpci1_map_irq()
124 return -EINVAL; in grpci1_cfg_r32()
134 cfg = REGLOAD(priv->regs->cfg_stat); in grpci1_cfg_r32()
135 REGSTORE(priv->regs->cfg_stat, (cfg & ~(0xf << 23)) | (bus << 23)); in grpci1_cfg_r32()
138 pci_conf = (u32 *) (priv->pci_conf | (devfn << 8) | (where & 0xfc)); in grpci1_cfg_r32()
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| /openbmc/linux/drivers/pinctrl/vt8500/ |
| H A D | pinctrl-wm8650.c | 1 // SPDX-License-Identifier: GPL-2.0-only
14 #include "pinctrl-wmt.h"
17 * Describe the register offsets within the GPIO memory space
22 * Do not reorder these banks as it will change the pin numbering
321 data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL); in wm8650_pinctrl_probe()
323 return -ENOMEM; in wm8650_pinctrl_probe()
325 data->banks = wm8650_banks; in wm8650_pinctrl_probe()
326 data->nbanks = ARRAY_SIZE(wm8650_banks); in wm8650_pinctrl_probe()
327 data->pins = wm8650_pins; in wm8650_pinctrl_probe()
328 data->npins = ARRAY_SIZE(wm8650_pins); in wm8650_pinctrl_probe()
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