| /openbmc/linux/Documentation/devicetree/bindings/display/bridge/ |
| H A D | simple-bridge.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/simple-bridge.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Transparent non-programmable DRM bridges
10 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
11 - Maxime Ripard <mripard@kernel.org>
14 This binding supports transparent non-programmable bridges that don't require
20 - items:
21 - enum:
[all …]
|
| /openbmc/phosphor-dbus-interfaces/yaml/xyz/openbmc_project/Inventory/Item/ |
| H A D | Dimm.interface.yaml | 4 - name: MemoryDataWidth
8 - name: MemorySizeInKB
12 - name: MemoryDeviceLocator
16 - name: MemoryType
20 - name: MemoryTypeDetail
24 - name: MaxMemorySpeedInMhz
28 - name: MemoryAttributes
33 - name: MemoryConfiguredSpeedInMhz
37 - name: ECC
40 Error-Correcting Code.
[all …]
|
| /openbmc/u-boot/arch/arm/mach-omap2/ |
| H A D | Kconfig | 82 The AM335x high performance SOC features a Cortex-A8
92 The AM335x high performance SOC features a Cortex-A8
112 The AM43xx high performance SOC features a Cortex-A9
113 ARM core, a quad core PRU-ICSS for industrial Ethernet
115 and an optional customer programmable secure boot.
130 The AM335x high performance SOC features a Cortex-A8
131 ARM core, a dual core PRU-ICSS for industrial Ethernet
133 programmable secure boot.
149 Reserved EMIF region start address. Set to "0" to auto-select
178 boot image. For non-XIP devices, the ROM then copies the image into
[all …]
|
| /openbmc/linux/drivers/mtd/chips/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
13 support any device that is CFI-compliant, you need to enable this
18 tristate "Detect non-CFI AMD/JEDEC-compatible flash chips"
22 This option enables JEDEC-style probing of flash chips which are not
24 CFI-targeted flash drivers for any chips which are identified which
26 covers most AMD/Fujitsu-compatible chips and also non-CFI
53 are expected to be wired to the CPU in 'host-endian' form.
85 bool "Support 8-bit buswidth" if MTD_CFI_GEOMETRY
92 bool "Support 16-bit buswidth" if MTD_CFI_GEOMETRY
99 bool "Support 32-bit buswidth" if MTD_CFI_GEOMETRY
[all …]
|
| /openbmc/linux/Documentation/devicetree/bindings/display/xlnx/ |
| H A D | xlnx,zynqmp-dpsub.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/xlnx/xlnx,zynqmp-dpsub.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
14 +------------------------------------------------------------+
15 +--------+ | +----------------+ +-----------+ |
16 | DPDMA | --->| | --> | Video | Video +-------------+ |
17 | 4x vid | | | | | Rendering | -+--> | | | +------+
18 | 2x aud | | | Audio/Video | --> | Pipeline | | | DisplayPort |---> | PHY0 |
19 +--------+ | | Buffer Manager | +-----------+ | | Source | | +------+
[all …]
|
| /openbmc/linux/drivers/staging/axis-fifo/ |
| H A D | axis-fifo.txt | 1 Xilinx AXI-Stream FIFO v4.1 IP core
3 This IP core has read and write AXI-Stream FIFOs, the contents of which can
4 be accessed from the AXI4 memory-mapped interface. This is useful for
11 Currently supports only store-forward mode with a 32-bit
12 AXI4-Lite interface. DOES NOT support:
13 - cut-through mode
14 - AXI4 (non-lite)
17 - compatible: Should be "xlnx,axi-fifo-mm-s-4.1"
18 - interrupt-names: Should be "interrupt"
19 - interrupt-parent: Should be <&intc>
[all …]
|
| /openbmc/linux/Documentation/devicetree/bindings/iio/adc/ |
| H A D | aspeed,ast2600-adc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/aspeed,ast2600-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Billy Tsai <billy_tsai@aspeedtech.com>
13 • 10-bits resolution for 16 voltage channels.
16 • Channel scanning can be non-continuous.
17 • Programmable ADC clock frequency.
18 • Programmable upper and lower threshold for each channels.
21 • Built-in a compensating method.
[all …]
|
| /openbmc/linux/drivers/nvmem/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
5 Support for NVMEM(Non Volatile Memory) devices like EEPROM, EFUSES...
37 calibration data required for the PCIe or the USB-C PHY.
40 be called nvmem-apple-efuses.
43 tristate "Broadcom On-Chip OTP Controller support"
52 will be called nvmem-bcm-ocotp.
68 i.MX SoCs, providing access to 4 Kbits of programmable
72 will be called nvmem-imx-iim.
75 tristate "i.MX 6/7/8 On-Chip OTP Controller support"
79 This is a driver for the On-Chip OTP Controller (OCOTP) available on
[all …]
|
| /openbmc/linux/Documentation/devicetree/bindings/arm/ |
| H A D | arm,coresight-cti.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
4 ---
5 $id: http://devicetree.org/schemas/arm/arm,coresight-cti.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
13 a star topology via the Cross Trigger Matrix (CTM), which is not programmable.
25 programmable channels, usually 4, but again implementation defined and
28 programmable.
37 indicate this feature (arm,coresight-cti-v8-arch).
52 constants defined in <dt-bindings/arm/coresight-cti-dt.h>
59 Note that some hardware trigger signals can be connected to non-CoreSight
[all …]
|
| /openbmc/linux/Documentation/devicetree/bindings/interrupt-controller/ |
| H A D | opencores,or1k-pic.txt | 1 OpenRISC 1000 Programmable Interrupt Controller
5 - compatible : should be "opencores,or1k-pic-level" for variants with
6 level triggered interrupt lines, "opencores,or1k-pic-edge" for variants with
7 edge triggered interrupt lines or "opencores,or1200-pic" for machines
8 with the non-spec compliant or1200 type implementation.
10 "opencores,or1k-pic" is also provided as an alias to "opencores,or1200-pic",
13 - interrupt-controller : Identifies the node as an interrupt controller
14 - #interrupt-cells : Specifies the number of cells needed to encode an
19 intc: interrupt-controller {
20 compatible = "opencores,or1k-pic-level";
[all …]
|
| /openbmc/linux/arch/m68k/q40/ |
| H A D | README | 6 available from this place or http://ftp.uni-erlangen.de/pub/unix/Linux/680x0/q40/
13 is not implemented - do not try it! (See below)
15 For a list of kernel command-line options read the documentation for the
22 poll the floppy for this reason - something that can't be done in Linux.
28 serial.c # normal PC driver - any speed
56 requested - SRAM must start with '%LX$' signature to do this. '-d' option
61 only the penguin - and shell prompt if it gets that far..
66 Most problems seem to be caused by fawlty or badly configured io-cards or
76 This is just an overview, see asm-m68k/* for details ask if you have any
79 The Q40 consists of a 68040@40 MHz, 1MB video RAM, up to 32MB RAM, AT-style
[all …]
|
| /openbmc/linux/drivers/mtd/maps/ |
| H A D | sun_uflash.c | 1 // SPDX-License-Identifier: GPL-2.0-only
2 /* sun_uflash.c - Driver for user-programmable flash on
5 * This driver does NOT provide access to the OBP-flash for
6 * safety reasons-- use <linux>/drivers/sbus/char/flash.c instead.
31 #define UFLASH_BUSWIDTH 1 /* EBus is 8-bit */
34 MODULE_DESCRIPTION("User-programmable flash device on Sun Microsystems boardsets");
45 .name = "SUNW,???-????",
54 if (op->resource[1].flags) { in uflash_devinit()
55 /* Non-CFI userflash device-- once I find one we in uflash_devinit()
59 dp, (unsigned long long)op->resource[0].start); in uflash_devinit()
[all …]
|
| /openbmc/linux/Documentation/devicetree/bindings/media/i2c/ |
| H A D | tc358743.txt | 1 * Toshiba TC358743 HDMI-RX to MIPI CSI2-TX Bridge
3 The Toshiba TC358743 HDMI-RX to MIPI CSI2-TX (H2C) is a bridge that converts
4 a HDMI stream to MIPI CSI-2 TX. It is programmable through I2C.
8 - compatible: value should be "toshiba,tc358743"
9 - clocks, clock-names: should contain a phandle link to the reference clock
14 - reset-gpios: gpio phandle GPIO connected to the reset pin
15 - interrupts: GPIO connected to the interrupt pin
16 - data-lanes: should be <1 2 3 4> for four-lane operation,
17 or <1 2> for two-lane operation
18 - clock-lanes: should be <0>
[all …]
|
| /openbmc/linux/Documentation/hwmon/ |
| H A D | nct6775.rst | 19 * Nuvoton NCT5572D/NCT6771F/NCT6772F/NCT6775F/W83677HG-I
83 * Nuvoton NCT6796D-S/NCT6799D-R
93 Guenter Roeck <linux@roeck-us.net>
96 -----------
120 triggered if the rotation speed has dropped below a programmable limit. On
121 NCT6775F, fan readings can be divided by a programmable divider (1, 2, 4, 8,
130 An alarm is triggered if the voltage has crossed a programmable minimum
138 The mode works for fan1-fan5.
141 ----------------
143 pwm[1-7]
[all …]
|
| H A D | pc87360.rst | 22 -----------------
27 - 0: None
28 - **1**: Forcibly enable internal voltage and temperature channels,
30 - 2: Forcibly enable all voltage and temperature channels, except in9
31 - 3: Forcibly enable all voltage and temperature channels, including in9
42 -----------
56 PC87360 - 2 2 - 0xE1
57 PC87363 - 2 2 - 0xE8
58 PC87364 - 3 3 - 0xE4
60 PC87366 11 3 3 3-4 0xE9
[all …]
|
| /openbmc/linux/tools/perf/pmu-events/arch/x86/tigerlake/ |
| H A D | pipeline.json | 7 …y executing divide or square root operations. Accounts for integer and floating-point operations.",
117 "BriefDescription": "Mispredicted non-taken conditional branch instructions retired.",
135 …"BriefDescription": "All miss-predicted indirect branch instructions retired (excluding RETs. TSX …
139 …"PublicDescription": "Counts all miss-predicted indirect branch instructions retired (excluding RE…
162 …iefDescription": "This event counts the number of mispredicted ret instructions retired. Non PEBS",
166 …"PublicDescription": "This is a non-precise version (that is, does not use PEBS) of the event that…
190 …stal clock cycle counts between active hyperthreads, i.e., those in C0 sleep-state. A hyperthread …
197 … event. It is counted on a dedicated fixed counter, leaving the eight programmable counters availa…
212 … state. It is counted on a dedicated fixed counter, leaving the eight programmable counters availa…
341 …e number of prefixes in a 16B-line. This may result in a three-cycle penalty for each LCP (Length …
[all …]
|
| /openbmc/linux/tools/perf/pmu-events/arch/x86/icelake/ |
| H A D | pipeline.json | 7 …y executing divide or square root operations. Accounts for integer and floating-point operations.",
117 "BriefDescription": "Mispredicted non-taken conditional branch instructions retired.",
135 …"BriefDescription": "All miss-predicted indirect branch instructions retired (excluding RETs. TSX …
139 …"PublicDescription": "Counts all miss-predicted indirect branch instructions retired (excluding RE…
162 …iefDescription": "This event counts the number of mispredicted ret instructions retired. Non PEBS",
166 …"PublicDescription": "This is a non-precise version (that is, does not use PEBS) of the event that…
190 …stal clock cycle counts between active hyperthreads, i.e., those in C0 sleep-state. A hyperthread …
197 … event. It is counted on a dedicated fixed counter, leaving the eight programmable counters availa…
212 … state. It is counted on a dedicated fixed counter, leaving the eight programmable counters availa…
324 …e number of prefixes in a 16B-line. This may result in a three-cycle penalty for each LCP (Length …
[all …]
|
| /openbmc/linux/tools/perf/pmu-events/arch/x86/rocketlake/ |
| H A D | pipeline.json | 7 …y executing divide or square root operations. Accounts for integer and floating-point operations.",
117 "BriefDescription": "Mispredicted non-taken conditional branch instructions retired.",
135 …"BriefDescription": "All miss-predicted indirect branch instructions retired (excluding RETs. TSX …
139 …"PublicDescription": "Counts all miss-predicted indirect branch instructions retired (excluding RE…
162 …iefDescription": "This event counts the number of mispredicted ret instructions retired. Non PEBS",
166 …"PublicDescription": "This is a non-precise version (that is, does not use PEBS) of the event that…
190 …stal clock cycle counts between active hyperthreads, i.e., those in C0 sleep-state. A hyperthread …
197 … event. It is counted on a dedicated fixed counter, leaving the eight programmable counters availa…
212 … state. It is counted on a dedicated fixed counter, leaving the eight programmable counters availa…
324 …e number of prefixes in a 16B-line. This may result in a three-cycle penalty for each LCP (Length …
[all …]
|
| /openbmc/linux/tools/perf/pmu-events/arch/x86/icelakex/ |
| H A D | pipeline.json | 7 …y executing divide or square root operations. Accounts for integer and floating-point operations.",
117 "BriefDescription": "Mispredicted non-taken conditional branch instructions retired.",
135 …"BriefDescription": "All miss-predicted indirect branch instructions retired (excluding RETs. TSX …
139 …"PublicDescription": "Counts all miss-predicted indirect branch instructions retired (excluding RE…
162 …iefDescription": "This event counts the number of mispredicted ret instructions retired. Non PEBS",
166 …"PublicDescription": "This is a non-precise version (that is, does not use PEBS) of the event that…
190 …stal clock cycle counts between active hyperthreads, i.e., those in C0 sleep-state. A hyperthread …
197 … event. It is counted on a dedicated fixed counter, leaving the eight programmable counters availa…
212 … state. It is counted on a dedicated fixed counter, leaving the eight programmable counters availa…
324 …e number of prefixes in a 16B-line. This may result in a three-cycle penalty for each LCP (Length …
[all …]
|
| /openbmc/linux/tools/perf/pmu-events/arch/x86/westmereep-dp/ |
| H A D | pipeline.json | 111 "BriefDescription": "Indirect non call branches executed",
125 "BriefDescription": "All non call branches executed",
191 "BriefDescription": "Mispredicted non call branches executed",
205 "BriefDescription": "Mispredicted indirect non call branches executed",
219 "BriefDescription": "Mispredicted non call branches executed",
269 …ription": "Reference base clock (133 Mhz) cycles when thread is not halted (programmable counter)",
281 "BriefDescription": "Cycles when thread is not halted (programmable counter)",
356 "BriefDescription": "Instructions retired (Programmable counter and Precise Event)",
392 "BriefDescription": "Retired floating-point operations (Precise Event)",
445 "BriefDescription": "Self-Modifying Code detected",
[all …]
|
| /openbmc/linux/tools/perf/pmu-events/arch/x86/westmereex/ |
| H A D | pipeline.json | 111 "BriefDescription": "Indirect non call branches executed",
125 "BriefDescription": "All non call branches executed",
191 "BriefDescription": "Mispredicted non call branches executed",
205 "BriefDescription": "Mispredicted indirect non call branches executed",
219 "BriefDescription": "Mispredicted non call branches executed",
269 …ription": "Reference base clock (133 Mhz) cycles when thread is not halted (programmable counter)",
281 "BriefDescription": "Cycles when thread is not halted (programmable counter)",
356 "BriefDescription": "Instructions retired (Programmable counter and Precise Event)",
392 "BriefDescription": "Retired floating-point operations (Precise Event)",
445 "BriefDescription": "Self-Modifying Code detected",
[all …]
|
| /openbmc/linux/tools/perf/pmu-events/arch/x86/nehalemep/ |
| H A D | pipeline.json | 111 "BriefDescription": "Indirect non call branches executed",
125 "BriefDescription": "All non call branches executed",
191 "BriefDescription": "Mispredicted non call branches executed",
205 "BriefDescription": "Mispredicted indirect non call branches executed",
219 "BriefDescription": "Mispredicted non call branches executed",
253 …ription": "Reference base clock (133 Mhz) cycles when thread is not halted (programmable counter)",
265 "BriefDescription": "Cycles when thread is not halted (programmable counter)",
340 "BriefDescription": "Instructions retired (Programmable counter and Precise Event)",
376 "BriefDescription": "Retired floating-point operations (Precise Event)",
429 "BriefDescription": "Self-Modifying Code detected",
[all …]
|
| /openbmc/linux/tools/perf/pmu-events/arch/x86/nehalemex/ |
| H A D | pipeline.json | 111 "BriefDescription": "Indirect non call branches executed",
125 "BriefDescription": "All non call branches executed",
191 "BriefDescription": "Mispredicted non call branches executed",
205 "BriefDescription": "Mispredicted indirect non call branches executed",
219 "BriefDescription": "Mispredicted non call branches executed",
253 …ription": "Reference base clock (133 Mhz) cycles when thread is not halted (programmable counter)",
265 "BriefDescription": "Cycles when thread is not halted (programmable counter)",
340 "BriefDescription": "Instructions retired (Programmable counter and Precise Event)",
376 "BriefDescription": "Retired floating-point operations (Precise Event)",
429 "BriefDescription": "Self-Modifying Code detected",
[all …]
|
| /openbmc/linux/tools/perf/pmu-events/arch/x86/westmereep-sp/ |
| H A D | pipeline.json | 111 "BriefDescription": "Indirect non call branches executed",
125 "BriefDescription": "All non call branches executed",
191 "BriefDescription": "Mispredicted non call branches executed",
205 "BriefDescription": "Mispredicted indirect non call branches executed",
219 "BriefDescription": "Mispredicted non call branches executed",
269 …ription": "Reference base clock (133 Mhz) cycles when thread is not halted (programmable counter)",
281 "BriefDescription": "Cycles when thread is not halted (programmable counter)",
356 "BriefDescription": "Instructions retired (Programmable counter and Precise Event)",
392 "BriefDescription": "Retired floating-point operations (Precise Event)",
445 "BriefDescription": "Self-Modifying Code detected",
[all …]
|
| /openbmc/linux/drivers/staging/fieldbus/Documentation/ |
| H A D | fieldbus_dev.txt | 1 Fieldbus-Device Subsystem
4 Part 0 - What is a Fieldbus Device ?
5 ------------------------------------
8 for real-time distributed control, standardized as IEC 61158.
10 A complex automated industrial system -- such as manufacturing assembly line --
11 usually needs a distributed control system -- an organized hierarchy of
12 controller systems -- to function. In this hierarchy, there is usually a
14 operate the system. This is typically linked to a middle layer of programmable
15 logic controllers (PLC) via a non-time-critical communications system
29 Part I - Why do we need this subsystem?
[all …]
|