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/openbmc/openbmc/meta-google/classes/
H A Dimage_types_hoth.bbclass12 FLASH_IMAGE_DESC_OFFSET:hoth:aarch64:flash-131072 = "126848"
13 FLASH_HOTH_UPDATE_OFFSET:hoth:aarch64:flash-131072 = "126912"
14 FLASH_HOTH_MAILBOX_OFFSET:hoth:aarch64:flash-131072 = "131008"
16 # Leave a zero-size u-boot env partition.
18 FLASH_UBOOT_ENV_OFFSET:flash-65536 = "${FLASH_KERNEL_OFFSET:flash-65536}"
19 FLASH_UBOOT_ENV_OFFSET:flash-131072 = "${FLASH_KERNEL_OFFSET:flash-131072}"
22 ENABLE_HOTH_SECONDARY ?= "no"
26 'image-hoth-update'),
31 'image-hoth-update-2nd'),
35 do_generate_static[depends] += "virtual/hoth-firmware:do_deploy"
[all …]
/openbmc/u-boot/board/freescale/m5253demo/
H A Dflash.c1 // SPDX-License-Identifier: GPL-2.0+
3 * (C) Copyright 2000-2003
6 * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
7 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
26 /*-----------------------------------------------------------------------
51 CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1, &flash_info[0]); in flash_init()
60 if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) { in flash_get_offsets()
62 info->start[0] = base; in flash_get_offsets()
63 info->protect[0] = 0; in flash_get_offsets()
65 info->start[i] = info->start[i - 1] in flash_get_offsets()
[all …]
/openbmc/qemu/hw/ppc/
H A Dppc_booke.c18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
38 tlb->attr = 0; in booke_set_tlb()
39 tlb->prot = PAGE_RWX << 4 | PAGE_VALID; in booke_set_tlb()
40 tlb->size = size; in booke_set_tlb()
41 tlb->EPN = va & TARGET_PAGE_MASK; in booke_set_tlb()
42 tlb->RPN = pa & TARGET_PAGE_MASK; in booke_set_tlb()
43 tlb->PID = 0; in booke_set_tlb()
54 #define TCR_FP_SHIFT 24 /* Fixed-Interval Timer Period */
56 #define TCR_FIE (1U << 23) /* Fixed-Interval Timer Interrupt Enable */
57 #define TCR_ARE (1U << 22) /* Auto-Reload Enable */
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dimx6sx-sabreauto.dts9 /dts-v1/;
15 compatible = "fsl,imx6sx-sabreauto", "fsl,imx6sx";
22 compatible = "simple-bus";
23 #address-cells = <1>;
24 #size-cells = <0>;
27 compatible = "regulator-fixed";
29 pinctrl-names = "default";
30 pinctrl-0 = <&pinctrl_vcc_sd3>;
31 regulator-name = "VCC_SD3";
32 regulator-min-microvolt = <3000000>;
[all …]
H A Dbitmain-antminer-s9.dts1 // SPDX-License-Identifier: GPL-2.0
8 /dts-v1/;
9 #include "zynq-7000.dtsi"
13 compatible = "bitmain,antminer-s9", "xlnx,zynq-7000";
27 reserved-memory {
28 #address-cells = <1>;
29 #size-cells = <1>;
34 no-map;
39 no-map;
45 stdout-path = "serial0:115200n8";
[all …]
H A Dkirkwood-sheevaplug.dts1 // SPDX-License-Identifier: GPL-2.0
3 * kirkwood-sheevaplug.dts - Device tree file for Sheevaplug
8 /dts-v1/;
10 #include "kirkwood-sheevaplug-common.dtsi"
14 compatible = "globalscale,sheevaplug", "marvell,kirkwood-88f6281", "marvell,kirkwood";
18 pinctrl-0 = <&pmx_sdio>;
19 pinctrl-names = "default";
21 /* No CD or WP GPIOs */
22 broken-cd;
26 gpio-leds {
[all …]
H A Dimx7-colibri.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR X11
3 * Copyright 2016-2019 Toradex AG
6 /dts-v1/;
7 #include <dt-bindings/gpio/gpio.h>
11 pinctrl-names = "default", "gpio";
12 pinctrl-0 = <&pinctrl_i2c1>;
13 pinctrl-1 = <&pinctrl_i2c1_gpio>;
14 sda-gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
15 scl-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
25 pinctrl-names = "default", "gpio";
[all …]
H A Drk3288-rock2-square.dts2 * This file is dual-licensed: you can use it either under the terms
34 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
41 /dts-v1/;
42 #include "rk3288-rock2-som.dtsi"
46 compatible = "radxa,rock2-square", "rockchip,rk3288";
49 stdout-path = "serial2:115200n8";
52 ir: ir-receiver {
53 compatible = "gpio-ir-receiver";
55 pinctrl-names = "default";
56 pinctrl-0 = <&ir_int>;
[all …]
H A Dkirkwood-dreamplug.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
5 #include "kirkwood-6281.dtsi"
9 …compatible = "globalscale,dreamplug-003-ds2001", "globalscale,dreamplug", "marvell,kirkwood-88f628…
18 stdout-path = &uart0;
26 pinctrl: pin-controller@10000 {
27 pmx_led_bluetooth: pmx-led-bluetooth {
31 pmx_led_wifi: pmx-led-wifi {
35 pmx_led_wifi_ap: pmx-led-wifi-ap {
48 #address-cells = <1>;
[all …]
H A Dimx6sx-sdb.dtsi9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
17 compatible = "fsl,imx6sx-sdb", "fsl,imx6sx";
20 stdout-path = &uart1;
28 compatible = "pwm-backlight";
30 brightness-levels = <0 4 8 16 32 64 128 255>;
31 default-brightness-level = <6>;
34 gpio-keys {
35 compatible = "gpio-keys";
[all …]
H A Dzynqmp-zcu100-revC.dts1 // SPDX-License-Identifier: GPL-2.0+
5 * (C) Copyright 2016 - 2018, Xilinx, Inc.
11 /dts-v1/;
14 #include "zynqmp-clk.dtsi"
15 #include <dt-bindings/input/input.h>
16 #include <dt-bindings/interrupt-controller/irq.h>
17 #include <dt-bindings/gpio/gpio.h>
18 #include <dt-bindings/phy/phy.h>
22 compatible = "xlnx,zynqmp-zcu100-revC", "xlnx,zynqmp-zcu100", "xlnx,zynqmp";
41 stdout-path = "serial0:115200n8";
[all …]
H A Drk3288-veyron-chromebook.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/clock/rockchip,rk808.h>
9 #include <dt-bindings/input/input.h>
10 #include "rk3288-veyron.dtsi"
19 gpio_keys: gpio-keys {
20 pinctrl-0 = <&pwr_key_h &ap_lid_int_l>;
25 linux,input-type = <5>; /* EV_SW */
26 debounce-interval = <1>;
27 gpio-key,wakeup;
31 gpio-charger {
[all …]
H A Dsun50i-a64-sopine.dtsi4 * Based on sun50i-a64-pine64.dts, which is:
7 * This file is dual-licensed: you can use it either under the terms
39 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
46 #include "sun50i-a64.dtsi"
48 #include <dt-bindings/gpio/gpio.h>
51 pinctrl-names = "default";
52 pinctrl-0 = <&mmc0_pins>;
53 vmmc-supply = <&reg_dcdc1>;
54 non-removable;
55 disable-wp;
[all …]
/openbmc/u-boot/board/gdsys/common/
H A Dosd.c1 // SPDX-License-Identifier: GPL-2.0+
41 FPGA_SET_REG(screen - OSD_DH_BASE, osd1.fld, val); \
54 FPGA_GET_REG(screen - OSD_DH_BASE, osd1.fld, val); \
160 / (1000000 - 100); in ics8n3qv01_get_fout_calc()
178 n -= 1; in ics8n3qv01_calc_parameters()
180 foutiic = fout - (fout / 10000); in ics8n3qv01_calc_parameters()
206 off_ppm = (fout_calc - ICS8N3QV01_F_DEFAULT_1) * 1000000 in ics8n3qv01_set()
245 return -1; in osd_write_videomem()
248 FPGA_SET_REG(screen - OSD_DH_BASE, in osd_write_videomem()
318 return -1; in osd_probe()
[all …]
/openbmc/openbmc/meta-openembedded/meta-networking/recipes-daemons/keepalived/keepalived/
H A D0001-configure.ac-Do-not-emit-compiler-flags-into-object-.patch3 Date: Thu, 15 Aug 2024 23:13:02 -0700
6 They contain options which have absolute paths in them e.g. --sysroot
9 Upstream-Status: Inappropriate [OE-Specific]
11 Signed-off-by: Khem Raj <raj.khem@gmail.com>
12 ---
13 configure.ac | 3 +--
14 1 file changed, 1 insertion(+), 2 deletions(-)
16 --- a/configure.ac
18 @@ -1013,8 +1013,7 @@ if test "$enable_hardening" != no; then
19 "-Wp,-D_FORTIFY_SOURCE=$FORTIFY_SOURCE" \
[all …]
/openbmc/qemu/include/block/
H A Dblock-common.h18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
27 #include "qapi/qapi-types-block-core.h"
31 * co_wrapper{*}: Function specifiers used by block-coroutine-wrapper.py
34 * generated by scripts/block-coroutine-wrapper.py
36 * Usage: read docs/devel/block-coroutine-wrapper.rst
39 * - co_wrapper functions can be called by only non-coroutine context, because
41 * - co_wrapper_mixed functions can be called by both coroutine and
42 * non-coroutine context.
43 * - co_wrapper_bdrv_rdlock are co_wrapper functions but automatically take and
45 * - co_wrapper_mixed_bdrv_rdlock are co_wrapper_mixed functions but
[all …]
/openbmc/qemu/linux-headers/linux/
H A Duserfaultfd.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
179 * no real functional effect after UFFDIO_API returns, but
199 * UFFD_FEATURE_SIGBUS feature means no page-fault
208 * hugetlbfs-backed pages.
211 * UFFD_FEATURE_MINOR_HUGETLBFS, but for shmem-backed pages instead.
218 * write-protection mode is supported on both shmem and hugetlbfs.
221 * write-protection mode will always apply to unpopulated pages
224 * when userfault write-protection mode is registered.
226 * UFFD_FEATURE_WP_ASYNC indicates that userfaultfd write-protection
228 * automatically resolved and write-protection is un-set.
[all …]
/openbmc/u-boot/include/configs/
H A Dcm_t54.h1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Config file for Compulab CM-T54 board
5 * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/
25 /* Enable SD/MMC CD and WP GPIOs */
79 #define CONFIG_SYS_AUTOLOAD "no"
85 "autoload=no\0" \
87 "fdtfile=omap5-sbc-t54.dtb\0" \
88 "kernel=zImage-cm-t54\0" \
89 "ramdisk=ramdisk-cm-t54.img\0" \
118 "setenv rdaddr - ; " \
H A DM5249EVB.h1 /* SPDX-License-Identifier: GPL-2.0+ */
6 * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
10 * board/config.h - configuration options, board specific
27 #undef CONFIG_MONITOR_IS_IN_RAM /* no pre-loader required!!! ;-) */
63 /*-----------------------------------------------------------------------
68 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
77 #define CONFIG_ENV_SECT_SIZE 0x2000 /* see README - env sector total size */
79 /*-----------------------------------------------------------------------
88 #if 0 /* test-only */
89 #define CONFIG_PRAM 512 /* test-only for SDRAM problem!!!!!!!!!!!!!!!!!!!! */
[all …]
/openbmc/qemu/target/arm/
H A Ddebug_helper.c6 * SPDX-License-Identifier: GPL-2.0-or-later
12 #include "cpu-features.h"
18 #include "exec/helper-proto.h.inc"
32 route_to_el2 = env->cp15.hcr_el2 & HCR_TGE || in arm_debug_target_el()
33 env->cp15.mdcr_el2 & MDCR_TDE; in arm_debug_target_el()
78 && extract32(env->cp15.mdcr_el3, 16, 1)) { in aa64_generate_debug_exceptions()
89 return extract32(env->cp15.mdscr_el1, 13, 1) in aa64_generate_debug_exceptions()
90 && !(env->daif & PSTATE_D); in aa64_generate_debug_exceptions()
108 if (el == 0 && (env->cp15.sder & 1)) { in aa32_generate_debug_exceptions()
117 spd = extract32(env->cp15.mdcr_el3, 14, 2); in aa32_generate_debug_exceptions()
[all …]
/openbmc/qemu/block/
H A Dfile-posix.c18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
28 #include "qemu/error-report.h"
29 #include "block/block-io.h"
36 #include "block/thread-pool.h"
38 #include "block/raw-aio.h"
42 #include "scsi/pr-manager.h"
76 #include <linux/dm-ioctl.h>
146 * - DM_MPATH_PROBE_PATHS returns success, but before SG_IO completes, another
149 * - DM_MPATH_PROBE_PATHS failed all paths in the current path group, so we have
154 * failover), it's rare to have more than eight path groups - and even then
[all …]
/openbmc/u-boot/board/tqc/tqma6/
H A Dtqma6_wru4.c1 // SPDX-License-Identifier: GPL-2.0+
7 * Author: Markus Niebel <markus.niebel@tq-group.com>
14 #include <asm/arch/mx6-pins.h>
15 #include <asm/arch/imx-regs.h>
20 #include <asm/mach-imx/boot_mode.h>
21 #include <asm/mach-imx/mxc_i2c.h>
84 NEW_PAD_CTRL(MX6_PAD_GPIO_2__SD2_WP, USDHC2_PAD_CTRL), /* WP */
97 struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; in tqma6_bb_board_mmc_getcd()
100 if (cfg->esdhc_base == USDHC2_BASE_ADDR) in tqma6_bb_board_mmc_getcd()
108 struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; in tqma6_bb_board_mmc_getwp()
[all …]
/openbmc/u-boot/board/freescale/mpc8349itx/
H A DREADME1 Freescale MPC8349E-mITX and MPC8349E-mITX-GP Boards
2 ---------------------------------------------------
6 The MPC8349E-mITX and MPC8349E-mITX-GP are reference boards featuring
7 the Freescale MPC8349E processor in a Mini-ITX form factor.
9 The MPC8349E-mITX-GP is an MPC8349E-mITX with the following differences:
11 A) One 8MB on-board flash EEPROM chip, instead of two.
12 B) No SATA controller
13 C) No Compact Flash slot
14 D) No Mini-PCI slot
15 E) No Vitesse 7385 5-port Ethernet switch
[all …]
/openbmc/qemu/tests/qtest/
H A Daspeed-smc-utils.c19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
28 #include "libqtest-single.h"
30 #include "aspeed-smc-utils.h"
44 qtest_writel(data->s, data->spi_base + offset, value); in spi_writel()
49 return qtest_readl(data->s, data->spi_base + offset); in spi_readl()
55 qtest_writeb(data->s, data->flash_base + offset, value); in flash_writeb()
61 qtest_writel(data->s, data->flash_base + offset, value); in flash_writel()
67 return qtest_readb(data->s, data->flash_base + offset); in flash_readb()
73 return qtest_readl(data->s, data->flash_base + offset); in flash_readl()
103 uint32_t ctrl_reg = R_CTRL0 + data->cs * 4; in spi_ctrl_setmode()
[all …]
/openbmc/u-boot/drivers/mtd/
H A Dcfi_flash.c1 // SPDX-License-Identifier: GPL-2.0+
3 * (C) Copyright 2002-2004
34 * U-Boot.
41 * JEDEC Standard JESD68 - Common Flash Interface (CFI)
42 * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
44 * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
46 * AMD/Spansion Application Note: Migration from Single-byte to Three-byte
152 /* No architectures currently implement __raw_writeq() */ in flash_write64()
173 /* No architectures currently implement __raw_readq() */ in flash_read64()
177 /*-----------------------------------------------------------------------
[all …]

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