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/openbmc/qemu/hw/hppa/
H A Dmachine.c3 * (C) Copyright 2018-2023 Helge Deller <deller@gmx.de>
13 #include "qemu/error-report.h"
21 #include "hw/char/serial-mm.h"
30 #include "hw/pci-host/astro.h"
31 #include "hw/pci-host/dino.h"
41 #define HPA_POWER_BUTTON (FIRMWARE_END - 0x10)
100 NULL, "isa-io", 0x800); in hppa_isa_bus()
126 return 0xe9; /* readback */ in io_cpu_read()
139 rtc_ref = val - time(NULL); in io_cpu_write()
145 qemu_chr_fe_write_all(debugout->be, &ch, 1); in io_cpu_write()
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/openbmc/u-boot/arch/arm/mach-imx/mx6/
H A Dddr.c1 // SPDX-License-Identifier: GPL-2.0+
10 #include <asm/arch/mx6-ddr.h>
22 setbits_le32(&mmdc0->mpdgctrl0, 1 << 31); in reset_read_data_fifos()
23 wait_for_bit_le32(&mmdc0->mpdgctrl0, 1 << 31, 0, 100, 0); in reset_read_data_fifos()
25 setbits_le32(&mmdc0->mpdgctrl0, 1 << 31); in reset_read_data_fifos()
26 wait_for_bit_le32(&mmdc0->mpdgctrl0, 1 << 31, 0, 100, 0); in reset_read_data_fifos()
34 * Issue the Precharge-All command to the DDR device for both in precharge_all()
40 writel(0x04008050, &mmdc0->mdscr); in precharge_all()
41 wait_for_bit_le32(&mmdc0->mdscr, 1 << 14, 1, 100, 0); in precharge_all()
45 writel(0x04008058, &mmdc0->mdscr); in precharge_all()
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/openbmc/qemu/target/arm/
H A Dhelper.c6 * SPDX-License-Identifier: GPL-2.0-or-later
14 #include "cpu-features.h"
15 #include "exec/page-protection.h"
16 #include "exec/mmap-lock.h"
17 #include "qemu/main-loop.h"
20 #include "qemu/qemu-print.h"
22 #include "exec/translation-block.h"
24 #include "system/cpu-timers.h"
29 #include "qemu/guest-random.h"
33 #include "semihosting/common-semi.h"
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