Searched full:nand_ctrl (Results 1 – 5 of 5) sorted by relevance
| /openbmc/linux/Documentation/devicetree/bindings/pinctrl/ |
| H A D | brcm,bcm4908-pinctrl.yaml | 34 hs_uart, i2c, i2s, nand_ctrl, nand_data, emmc_ctrl, usb0_pwr,
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| /openbmc/linux/arch/arm64/boot/dts/broadcom/bcmbca/ |
| H A D | bcm4908.dtsi | 534 pins_nand_ctrl: nand_ctrl-pins {
535 function = "nand_ctrl";
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| /openbmc/linux/drivers/mtd/nand/raw/ |
| H A D | qcom_nandc.c | 45 #define NAND_CTRL 0xf00 macro
168 /* NAND_CTRL bits */
3151 u32 nand_ctrl; in qcom_nandc_setup() local
3163 nand_ctrl = nandc_read(nandc, NAND_CTRL); in qcom_nandc_setup()
3166 *NAND_CTRL is an operational registers, and CPU in qcom_nandc_setup()
3168 * in BAM mode. So update the NAND_CTRL register in qcom_nandc_setup()
3172 if (!(nand_ctrl & BAM_MODE_EN)) in qcom_nandc_setup()
3173 nandc_write(nandc, NAND_CTRL, nand_ctrl | BAM_MODE_EN); in qcom_nandc_setup()
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| /openbmc/u-boot/drivers/mtd/nand/raw/ |
| H A D | tegra_nand.c | 103 struct nand_drv nand_ctrl; member
922 struct nand_drv *info = &tegra->nand_ctrl; in tegra_probe()
950 nand_set_controller_data(nand, &tegra->nand_ctrl); in tegra_probe()
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| /openbmc/linux/drivers/pinctrl/bcm/ |
| H A D | pinctrl-bcm4908.c | 394 { "nand_ctrl", nand_ctrl_groups, ARRAY_SIZE(nand_ctrl_groups) },
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