/openbmc/qemu/tests/qemu-iotests/ |
H A D | 142.out | 8 Testing: -drive file=TEST_DIR/t.qcow2,cache=none 9 QEMU X.Y.Z monitor - type 'help' for more information 12 Testing: -drive file=TEST_DIR/t.qcow2,cache=directsync 13 QEMU X.Y.Z monitor - type 'help' for more information 16 Testing: -drive file=TEST_DIR/t.qcow2,cache=writeback 17 QEMU X.Y.Z monitor - type 'help' for more information 20 Testing: -drive file=TEST_DIR/t.qcow2,cache=writethrough 21 QEMU X.Y.Z monitor - type 'help' for more information 24 Testing: -drive file=TEST_DIR/t.qcow2,cache=unsafe 25 QEMU X.Y.Z monitor - type 'help' for more information [all …]
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/openbmc/linux/drivers/gpu/drm/tests/ |
H A D | drm_cmdline_parser_test.c | 1 // SPDX-License-Identifier: GPL-2.0 16 struct drm_cmdline_mode mode = { }; in drm_test_cmdline_force_e_only() local 20 &no_connector, &mode)); in drm_test_cmdline_force_e_only() 21 KUNIT_EXPECT_FALSE(test, mode.specified); in drm_test_cmdline_force_e_only() 22 KUNIT_EXPECT_FALSE(test, mode.refresh_specified); in drm_test_cmdline_force_e_only() 23 KUNIT_EXPECT_FALSE(test, mode.bpp_specified); in drm_test_cmdline_force_e_only() 25 KUNIT_EXPECT_FALSE(test, mode.rb); in drm_test_cmdline_force_e_only() 26 KUNIT_EXPECT_FALSE(test, mode.cvt); in drm_test_cmdline_force_e_only() 27 KUNIT_EXPECT_FALSE(test, mode.interlace); in drm_test_cmdline_force_e_only() 28 KUNIT_EXPECT_FALSE(test, mode.margins); in drm_test_cmdline_force_e_only() [all …]
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/openbmc/u-boot/board/ti/ks2_evm/ |
H A D | mux-k2g.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */ 11 #include <asm/arch/mux-k2g.h> 17 { 115, MODE(0) }, /* SOC_UART0_RXD */ 18 { 116, MODE(0) }, /* SOC_UART0_TXD */ 21 { 223, MODE(0) }, /* SOC_I2C0_SCL */ 22 { 224, MODE(0) }, /* SOC_I2C0_SDA */ 25 { 225, MODE(0) }, /* SOC_I2C1_SCL */ 26 { 226, MODE(0) }, /* SOC_I2C1_SDA */ 32 { 0, MODE(0) }, /* GPMCAD0 */ 33 { 1, MODE(0) }, /* GPMCAD1 */ [all …]
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/openbmc/u-boot/board/siemens/rut/ |
H A D | mux.c | 1 // SPDX-License-Identifier: GPL-2.0+ 9 * u-boot:/board/ti/am335x/mux.c 11 * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ 22 {OFFSET(uart0_rxd), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* UART0_RXD */ 23 {OFFSET(uart0_txd), (MODE(0) | PULLUDDIS)}, /* UART0_TXD */ 24 {-1}, 28 {OFFSET(ddr_resetn), (MODE(0))}, 29 {OFFSET(ddr_csn0), (MODE(0) | PULLUP_EN)}, 30 {OFFSET(ddr_ck), (MODE(0))}, 31 {OFFSET(ddr_nck), (MODE(0))}, [all …]
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/openbmc/u-boot/board/bosch/shc/ |
H A D | mux.c | 1 // SPDX-License-Identifier: GPL-2.0+ 9 * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ 21 {OFFSET(uart0_rxd), (MODE(0) | PULLUDEN | RXACTIVE)}, /* UART0_RXD */ 22 {OFFSET(uart0_txd), (MODE(0) | PULLUDDIS)}, /* UART0_TXD */ 23 {OFFSET(uart0_ctsn), (MODE(0) | PULLUDEN | RXACTIVE)}, /* UART0_CTS */ 24 {OFFSET(uart0_rtsn), (MODE(0) | PULLUDDIS)}, /* UART0_RTS */ 25 {-1}, 29 {OFFSET(uart1_rxd), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* UART1_RXD */ 30 {OFFSET(uart1_txd), (MODE(0) | PULLUDDIS)}, /* UART1_TXD */ 31 {OFFSET(uart1_ctsn), (MODE(0) | PULLUDEN | RXACTIVE)}, /* UART1_CTS */ [all …]
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/openbmc/u-boot/board/BuR/brppt1/ |
H A D | mux.c | 1 // SPDX-License-Identifier: GPL-2.0+ 8 * Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com 20 {OFFSET(uart0_rtsn), (MODE(0) | PULLUDEN)}, 22 {OFFSET(uart0_ctsn), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)}, 24 {OFFSET(uart0_rxd), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)}, 26 {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)}, 27 {-1}, 30 /* UART1_RTS as I2C2-SCL */ 31 {OFFSET(uart1_rtsn), (MODE(3) | PULLUDEN | PULLUP_EN | RXACTIVE)}, 32 /* UART1_CTS as I2C2-SDA */ [all …]
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/openbmc/u-boot/board/siemens/draco/ |
H A D | mux.c | 1 // SPDX-License-Identifier: GPL-2.0+ 9 * u-boot:/board/ti/am335x/mux.c 10 * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ 22 {OFFSET(uart0_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* UART0_RXD */ 23 {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)}, /* UART0_TXD */ 24 {-1}, 28 {OFFSET(spi0_cs1), (MODE(1) | PULLUP_EN | RXACTIVE)}, /* UART3_RXD */ 29 {OFFSET(ecap0_in_pwm0_out), (MODE(1) | PULLUDEN)}, /* UART3_TXD */ 30 {-1}, 34 {OFFSET(i2c0_sda), (MODE(0) | RXACTIVE | [all …]
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/openbmc/u-boot/board/BuR/brxre1/ |
H A D | mux.c | 1 // SPDX-License-Identifier: GPL-2.0+ 8 * Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com 20 {OFFSET(spi0_sclk), MODE(0) | PULLUDEN | RXACTIVE}, 22 {OFFSET(spi0_d0), MODE(0) | PULLUDEN | RXACTIVE}, 24 {OFFSET(spi0_d1), MODE(0) | PULLUDEN | RXACTIVE}, 26 {OFFSET(spi0_cs0), MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE}, 28 {OFFSET(spi0_cs1), MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE}, 29 {-1}, 34 {OFFSET(uart1_ctsn), MODE(2) | PULLUDEN | PULLUP_EN}, 36 {OFFSET(uart1_rtsn), MODE(2) | RXACTIVE}, [all …]
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/openbmc/u-boot/board/siemens/pxm2/ |
H A D | mux.c | 1 // SPDX-License-Identifier: GPL-2.0+ 9 * u-boot:/board/ti/am335x/mux.c 11 * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ 23 {OFFSET(uart0_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* UART0_RXD */ 24 {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)}, /* UART0_TXD */ 25 {OFFSET(nnmi), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* UART0_TXD */ 26 {-1}, 31 {OFFSET(gpmc_ad0), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD0 */ 32 {OFFSET(gpmc_ad1), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD1 */ 33 {OFFSET(gpmc_ad2), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD2 */ [all …]
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/openbmc/linux/sound/soc/codecs/ |
H A D | wcd-clsh-v2.c | 1 // SPDX-License-Identifier: GPL-2.0 2 // Copyright (c) 2015-2016, The Linux Foundation. All rights reserved. 3 // Copyright (c) 2017-2018, Linaro Limited 10 #include "wcd-clsh-v2.h" 14 int mode; member 22 /* Class-H registers for codecs from and above WCD9335 */ 122 struct snd_soc_component *comp = ctrl->comp; in wcd_enable_clsh_block() 124 if ((enable && ++ctrl->clsh_users == 1) || in wcd_enable_clsh_block() 125 (!enable && --ctrl->clsh_users == 0)) in wcd_enable_clsh_block() 129 if (ctrl->clsh_users < 0) in wcd_enable_clsh_block() [all …]
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/openbmc/u-boot/board/compulab/cm_t43/ |
H A D | mux.c | 1 // SPDX-License-Identifier: GPL-2.0+ 12 {OFFSET(mii1_txen), MODE(2)}, 13 {OFFSET(mii1_txd3), MODE(2)}, 14 {OFFSET(mii1_txd2), MODE(2)}, 15 {OFFSET(mii1_txd1), MODE(2)}, 16 {OFFSET(mii1_txd0), MODE(2)}, 17 {OFFSET(mii1_txclk), MODE(2)}, 18 {OFFSET(mii1_rxdv), MODE(2) | RXACTIVE | PULLDOWN_EN}, 19 {OFFSET(mii1_rxclk), MODE(2) | RXACTIVE | PULLDOWN_EN}, 20 {OFFSET(mii1_rxd3), MODE(2) | RXACTIVE | PULLDOWN_EN}, [all …]
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/openbmc/u-boot/board/ti/am335x/ |
H A D | mux.c | 4 * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ 26 {OFFSET(uart0_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* UART0_RXD */ 27 {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)}, /* UART0_TXD */ 28 {-1}, 32 {OFFSET(uart1_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* UART1_RXD */ 33 {OFFSET(uart1_txd), (MODE(0) | PULLUDEN)}, /* UART1_TXD */ 34 {-1}, 38 {OFFSET(spi0_sclk), (MODE(1) | PULLUP_EN | RXACTIVE)}, /* UART2_RXD */ 39 {OFFSET(spi0_d0), (MODE(1) | PULLUDEN)}, /* UART2_TXD */ 40 {-1}, [all …]
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/openbmc/u-boot/drivers/video/ |
H A D | ati_radeon_fb.c | 1 // SPDX-License-Identifier: GPL-2.0+ 47 & ~RADEON_BUFFER_ALIGN) - 1) 48 #define RADEON_CRT_PITCH(width, bpp) ((((width) * (bpp) + ((bpp) * 8 - 1)) / ((bpp) * 8)) | \ 49 ((((width) * (bpp) + ((bpp) * 8 - 1)) / ((bpp) * 8)) << 16)) 52 (((((htotal) / 8) - 1) & 0x3ff) | (((((hdisp) / 8) - 1) & 0x1ff) << 16)) 56 ((((vtotal) - 1) & 0xffff) | (((vdisp) - 1) << 16)) 58 ((((vsync_srtr) - 1) & 0xfff) | (((vsync_wid) & 0x1f) << 16)) 110 if ((rinfo->family == CHIP_FAMILY_RS100) || in radeon_identify_vram() 111 (rinfo->family == CHIP_FAMILY_RS200) || in radeon_identify_vram() 112 (rinfo->family == CHIP_FAMILY_RS300)) { in radeon_identify_vram() [all …]
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/openbmc/u-boot/board/birdland/bav335x/ |
H A D | mux.c | 4 * Copyright (c) 2012-2014 Birdland Audio - http://birdland.com/oem 5 * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ 26 {OFFSET(uart0_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* UART0_RXD */ 27 {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)}, /* UART0_TXD */ 28 {-1}, 32 {OFFSET(uart1_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* UART1_RXD */ 33 {OFFSET(uart1_txd), (MODE(0) | PULLUDEN)}, /* UART1_TXD */ 34 {-1}, 38 {OFFSET(spi0_sclk), (MODE(1) | PULLUP_EN | RXACTIVE)}, /* UART2_RXD */ 39 {OFFSET(spi0_d0), (MODE(1) | PULLUDEN)}, /* UART2_TXD */ [all …]
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/openbmc/u-boot/board/ti/am43xx/ |
H A D | mux.c | 1 // SPDX-License-Identifier: GPL-2.0+ 5 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ 15 {OFFSET(mii1_txen), MODE(1)}, /* RMII1_TXEN */ 16 {OFFSET(mii1_txd1), MODE(1)}, /* RMII1_TD1 */ 17 {OFFSET(mii1_txd0), MODE(1)}, /* RMII1_TD0 */ 18 {OFFSET(mii1_rxd1), MODE(1) | RXACTIVE}, /* RMII1_RD1 */ 19 {OFFSET(mii1_rxd0), MODE(1) | RXACTIVE}, /* RMII1_RD0 */ 20 {OFFSET(mii1_rxdv), MODE(1) | RXACTIVE}, /* RMII1_RXDV */ 21 {OFFSET(mii1_crs), MODE(1) | RXACTIVE}, /* RMII1_CRS_DV */ 22 {OFFSET(mii1_rxerr), MODE(1) | RXACTIVE}, /* RMII1_RXERR */ [all …]
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/openbmc/u-boot/board/compulab/cm_t335/ |
H A D | mux.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Pinmux configuration for Compulab CM-T335 board 5 * Copyright (C) 2013, Compulab Ltd - http://compulab.co.il/ 17 {OFFSET(uart0_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)}, 18 {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)}, 19 {-1}, 23 {OFFSET(uart1_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)}, 24 {OFFSET(uart1_txd), (MODE(0) | PULLUDEN)}, 25 {OFFSET(uart1_ctsn), (MODE(0) | PULLUP_EN | RXACTIVE)}, 26 {OFFSET(uart1_rtsn), (MODE(0) | PULLUDEN)}, [all …]
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/openbmc/u-boot/board/tcl/sl50/ |
H A D | mux.c | 1 // SPDX-License-Identifier: GPL-2.0+ 5 * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ 17 {OFFSET(uart0_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* UART0_RXD */ 18 {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)}, /* UART0_TXD */ 19 {-1}, 23 {OFFSET(uart1_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* UART1_RXD */ 24 {OFFSET(uart1_txd), (MODE(0) | PULLUDEN)}, /* UART1_TXD */ 25 {-1}, 29 {OFFSET(spi0_sclk), (MODE(1) | PULLUP_EN | RXACTIVE)}, /* UART2_RXD */ 30 {OFFSET(spi0_d0), (MODE(1) | PULLUDEN)}, /* UART2_TXD */ [all …]
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/openbmc/u-boot/board/silica/pengwyn/ |
H A D | mux.c | 1 // SPDX-License-Identifier: GPL-2.0+ 17 {OFFSET(uart0_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* UART0_RXD */ 18 {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)}, /* UART0_TXD */ 19 {-1}, 26 {OFFSET(i2c0_sda), (MODE(0) | RXACTIVE | 28 {OFFSET(i2c0_scl), (MODE(0) | RXACTIVE | 30 {-1}, 35 {OFFSET(mmc0_dat3), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT3 */ 36 {OFFSET(mmc0_dat2), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT2 */ 37 {OFFSET(mmc0_dat1), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT1 */ [all …]
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/openbmc/linux/tools/testing/selftests/bpf/ |
H A D | test_xdp_redirect_multi.sh | 2 # SPDX-License-Identifier: GPL-2.0 5 # - - - - - - - - - - - - - - - - - - - 7 # - -| - - - - - - | - - - - - - | - - 8 # --------- --------- --------- 10 # --------- --------- --------- 19 # ns1 -> gw: ns1, ns2, ns3, should receive the arp request 22 # ns1 -> gw: ns1 should not receive, ns2, ns3 should receive redirects. 24 # ping test: ns1 -> ns2 (block), echo requests will be redirect back 34 LOG_DIR=$(mktemp -d) 35 declare -a NS [all …]
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/openbmc/linux/Documentation/driver-api/usb/ |
H A D | typec_bus.rst | 2 API for USB Type-C Alternate Mode drivers 6 ------------ 9 Messages (VDM) as defined in USB Type-C and USB Power Delivery Specifications. 11 every alternate mode, so every alternate mode will need a custom driver. 13 USB Type-C bus allows binding a driver to the discovered partner alternate 14 modes by using the SVID and the mode number. 16 :ref:`USB Type-C Connector Class <typec>` provides a device for every alternate 17 mode a port supports, and separate device for every alternate mode the partner 19 mode devices, and the port alternate mode devices must be handled by the port 22 When a new partner alternate mode device is registered, it is linked to the [all …]
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/openbmc/linux/drivers/gpu/drm/ |
H A D | drm_modes.c | 2 * Copyright © 1997-2003 by The XFree86 Project, Inc. 4 * Copyright © 2007-2008 Intel Corporation 6 * Copyright 2005-2006 Luc Verhaegen 53 * drm_mode_debug_printmodeline - print a mode to dmesg 54 * @mode: mode to print 56 * Describe @mode using DRM_DEBUG. 58 void drm_mode_debug_printmodeline(const struct drm_display_mode *mode) in drm_mode_debug_printmodeline() argument 60 DRM_DEBUG_KMS("Modeline " DRM_MODE_FMT "\n", DRM_MODE_ARG(mode)); in drm_mode_debug_printmodeline() 93 drm_mode_destroy(struct drm_device * dev,struct drm_display_mode * mode) drm_mode_destroy() argument 112 drm_mode_probed_add(struct drm_connector * connector,struct drm_display_mode * mode) drm_mode_probed_add() argument 326 fill_analog_mode(struct drm_device * dev,struct drm_display_mode * mode,const struct analog_parameters * params,unsigned long pixel_clock_hz,unsigned int hactive,unsigned int vactive,bool interlace) fill_analog_mode() argument 551 struct drm_display_mode *mode; drm_analog_tv_mode() local 1268 drm_mode_set_name(struct drm_display_mode * mode) drm_mode_set_name() argument 1286 drm_mode_vrefresh(const struct drm_display_mode * mode) drm_mode_vrefresh() argument 1316 drm_mode_get_hv_timing(const struct drm_display_mode * mode,int * hdisplay,int * vdisplay) drm_mode_get_hv_timing() argument 1454 drm_mode_duplicate(struct drm_device * dev,const struct drm_display_mode * mode) drm_mode_duplicate() argument 1625 drm_mode_validate_basic(const struct drm_display_mode * mode) drm_mode_validate_basic() argument 1668 drm_mode_validate_driver(struct drm_device * dev,const struct drm_display_mode * mode) drm_mode_validate_driver() argument 1698 drm_mode_validate_size(const struct drm_display_mode * mode,int maxX,int maxY) drm_mode_validate_size() argument 1723 drm_mode_validate_ycbcr420(const struct drm_display_mode * mode,struct drm_connector * connector) drm_mode_validate_ycbcr420() argument 1805 struct drm_display_mode *mode, *t; drm_mode_prune_invalid() local 1892 struct drm_display_mode *mode; drm_connector_list_update() local 1937 drm_mode_parse_cmdline_bpp(const char * str,char ** end_ptr,struct drm_cmdline_mode * mode) drm_mode_parse_cmdline_bpp() argument 1956 drm_mode_parse_cmdline_refresh(const char * str,char ** end_ptr,struct drm_cmdline_mode * mode) drm_mode_parse_cmdline_refresh() argument 1977 drm_mode_parse_cmdline_extra(const char * str,int length,bool freestanding,const struct drm_connector * connector,struct drm_cmdline_mode * mode) drm_mode_parse_cmdline_extra() argument 2028 drm_mode_parse_cmdline_res_mode(const char * str,unsigned int length,bool extras,const struct drm_connector * connector,struct drm_cmdline_mode * mode) drm_mode_parse_cmdline_res_mode() argument 2113 drm_mode_parse_panel_orientation(const char * delim,struct drm_cmdline_mode * mode) drm_mode_parse_panel_orientation() argument 2140 drm_mode_parse_tv_mode(const char * delim,struct drm_cmdline_mode * mode) drm_mode_parse_tv_mode() argument 2166 drm_mode_parse_cmdline_options(const char * str,bool freestanding,const struct drm_connector * connector,struct drm_cmdline_mode * mode) drm_mode_parse_cmdline_options() argument 2313 const struct drm_named_mode *mode = &drm_named_modes[i]; drm_mode_parse_cmdline_named_mode() local 2361 drm_mode_parse_command_line_for_connector(const char * mode_option,const struct drm_connector * connector,struct drm_cmdline_mode * mode) drm_mode_parse_command_line_for_connector() argument 2541 struct drm_display_mode *mode; drm_mode_create_from_cmdline_mode() local 2712 drm_mode_is_420_only(const struct drm_display_info * display,const struct drm_display_mode * mode) drm_mode_is_420_only() argument 2732 drm_mode_is_420_also(const struct drm_display_info * display,const struct drm_display_mode * mode) drm_mode_is_420_also() argument 2751 drm_mode_is_420(const struct drm_display_info * display,const struct drm_display_mode * mode) drm_mode_is_420() argument [all...] |
/openbmc/u-boot/board/vscom/baltos/ |
H A D | mux.c | 4 * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ 25 {OFFSET(uart0_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* UART0_RXD */ 26 {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)}, /* UART0_TXD */ 27 {-1}, 31 {OFFSET(mmc0_dat3), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT3 */ 32 {OFFSET(mmc0_dat2), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT2 */ 33 {OFFSET(mmc0_dat1), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT1 */ 34 {OFFSET(mmc0_dat0), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT0 */ 35 {OFFSET(mmc0_clk), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_CLK */ 36 {OFFSET(mmc0_cmd), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_CMD */ [all …]
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/openbmc/openbmc/poky/bitbake/lib/bb/compress/ |
H A D | _pipecompress.py | 4 # SPDX-License-Identifier: GPL-2.0-only 19 cls, filename, mode="rb", *, encoding=None, errors=None, newline=None, **kwargs argument 22 Open a compressed file in binary or text mode. 30 The mode argument can be "r", "rb", "w", "wb", "x", "xb", "a" or "ab" for 31 binary mode, or "rt", "wt", "xt" or "at" for text mode. The default mode is 34 For binary mode, this function is equivalent to the cls constructor: 35 cls(filename, mode). In this case, the encoding, errors and newline 38 For text mode, a cls object is created, and wrapped in an 42 if "t" in mode: 43 if "b" in mode: [all …]
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/openbmc/openbmc/meta-openembedded/meta-oe/recipes-graphics/gphoto2/libgphoto2/ |
H A D | 40-libgphoto2.rules | 10 ATTRS{idVendor}=="0979", ATTRS{idProduct}=="0227", MODE="l36" 11 ATTRS{idVendor}=="0502", ATTRS{idProduct}=="33c3", ENV{ID_MEDIA_PLAYER}="1", MODE="l36" 12 ATTRS{idVendor}=="0502", ATTRS{idProduct}=="33c4", ENV{ID_MEDIA_PLAYER}="1", MODE="l36" 13 ATTRS{idVendor}=="0502", ATTRS{idProduct}=="3643", ENV{ID_MEDIA_PLAYER}="1", MODE="l36" 14 ATTRS{idVendor}=="0502", ATTRS{idProduct}=="353c", ENV{ID_MEDIA_PLAYER}="1", MODE="l36" 15 ATTRS{idVendor}=="0502", ATTRS{idProduct}=="362d", ENV{ID_MEDIA_PLAYER}="1", MODE="l36" 16 ATTRS{idVendor}=="0502", ATTRS{idProduct}=="3586", ENV{ID_MEDIA_PLAYER}="1", MODE="l36" 17 ATTRS{idVendor}=="0502", ATTRS{idProduct}=="3348", ENV{ID_MEDIA_PLAYER}="1", MODE="l36" 18 ATTRS{idVendor}=="0502", ATTRS{idProduct}=="3349", ENV{ID_MEDIA_PLAYER}="1", MODE="l36" 19 ATTRS{idVendor}=="0502", ATTRS{idProduct}=="334a", ENV{ID_MEDIA_PLAYER}="1", MODE="l36" [all …]
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/openbmc/u-boot/board/phytec/pcm051/ |
H A D | mux.c | 25 {OFFSET(uart0_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* UART0_RXD */ 26 {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)}, /* UART0_TXD */ 27 {-1}, 32 {OFFSET(mmc0_dat3), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT3 */ 33 {OFFSET(mmc0_dat2), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT2 */ 34 {OFFSET(mmc0_dat1), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT1 */ 35 {OFFSET(mmc0_dat0), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT0 */ 36 {OFFSET(mmc0_clk), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_CLK */ 37 {OFFSET(mmc0_cmd), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_CMD */ 38 {OFFSET(spi0_cs1), (MODE(5) | RXACTIVE | PULLUP_EN)}, /* MMC0_CD */ [all …]
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