Home
last modified time | relevance | path

Searched +full:mhu +full:- +full:rx (Results 1 – 12 of 12) sorted by relevance

/openbmc/linux/Documentation/devicetree/bindings/mailbox/
H A Darm,mhuv2.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tushar Khandelwal <tushar.khandelwal@arm.com>
11 - Viresh Kumar <viresh.kumar@linaro.org>
14 The Arm Message Handling Unit (MHU) Version 2 is a mailbox controller that has
15 between 1 and 124 channel windows (each 32-bit wide) to provide unidirectional
20 be written to or read from. If a pair of MHU controllers is implemented
27 An MHU controller must be specified along with the supported transport
33 - Data-transfer: Each transfer is made of one or more words, using one or more
[all …]
H A Darm,mhu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mailbox/arm,mhu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ARM MHU Mailbox Controller
10 - Jassi Brar <jaswinder.singh@linaro.org>
13 The ARM's Message-Handling-Unit (MHU) is a mailbox controller that has 3
14 independent channels/links to communicate with remote processor(s). MHU links
21 The MHU hardware also allows operations in doorbell mode. The MHU drives the
22 interrupt signal using a 32-bit register, with all 32-bits logically ORed
[all …]
/openbmc/linux/drivers/mailbox/
H A Darm_mhuv2.c1 // SPDX-License-Identifier: GPL-2.0
10 * protocol modes: data-transfer and doorbell, to be used on those channel
19 * hardware - mainly the number of channel windows implemented by the platform,
45 #define LSB_MASK(n) ((1 << (n * __CHAR_BIT__)) - 1)
46 #define MHUV2_PROTOCOL_PROP "arm,mhuv2-protocols"
94 u8 pad1[0x0C - 0x04];
99 u8 pad2[0x20 - 0x1C];
114 u8 pad[0xFC8 - 0xFB0];
124 u8 reserved0[0x10 - 0x0C];
128 u8 pad[0x20 - 0x1C];
[all …]
/openbmc/linux/arch/arm64/boot/dts/arm/
H A Djuno-scmi.dtsi3 power-domains = <&scmi_devpd 8>;
7 power-domains = <&scmi_devpd 8>;
11 power-domains = <&scmi_devpd 8>;
15 power-domains = <&scmi_devpd 8>;
19 power-domains = <&scmi_devpd 8>;
23 power-domains = <&scmi_devpd 8>;
27 power-domains = <&scmi_devpd 8>;
31 power-domains = <&scmi_devpd 8>;
42 /delete-node/ scpi;
47 mbox-names = "tx", "rx";
[all …]
/openbmc/qemu/hw/arm/
H A Dmusca.c2 * Arm Musca-B1 test chip board emulation
14 * the SSE-200 subsystem for embedded:
15 …https://developer.arm.com/products/system-design/development-boards/iot-test-chips-and-boards/musc…
16 …https://developer.arm.com/products/system-design/development-boards/iot-test-chips-and-boards/musc…
23 #include "qemu/error-report.h"
25 #include "exec/address-spaces.h"
31 #include "hw/core/split-irq.h"
32 #include "hw/misc/tz-mpc.h"
33 #include "hw/misc/tz-ppc.h"
36 #include "hw/qdev-clock.h"
[all …]
/openbmc/linux/drivers/firmware/
H A Darm_scpi.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * and the Application Processors(AP). The Message Handling Unit(MHU)
7 * provides a mechanism for inter-processor communication between SCP's
207 -1, /* GET_CLOCK_INFO */
216 -1, /* SET_DEVICE_PWR_STATE */
217 -1, /* GET_DEVICE_PWR_STATE */
240 spinlock_t rx_lock; /* locking for the rx pending list */
259 * The SCP firmware only executes in little-endian mode, so any buffers
260 * shared through SCPI should have their contents converted to little-endian
332 -EINVAL, /* SCPI_ERR_PARAM */
[all …]
/openbmc/linux/arch/arm64/boot/dts/amlogic/
H A Dmeson-gx.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-bindings/interrupt-controller/arm-gic.h>
15 #include <dt-bindings/power/meson-gxbb-power.h>
16 #include <dt-bindings/thermal/thermal.h>
19 interrupt-parent = <&gic>;
20 #address-cells = <2>;
21 #size-cells = <2>;
29 reserved-memory {
[all …]
H A Dmeson-axg.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/axg-aoclkc.h>
7 #include <dt-bindings/clock/axg-audio-clkc.h>
8 #include <dt-bindings/clock/axg-clkc.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/gpio/meson-axg-gpio.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/reset/amlogic,meson-axg-audio-arb.h>
14 #include <dt-bindings/reset/amlogic,meson-axg-reset.h>
[all …]
/openbmc/linux/drivers/firmware/arm_scmi/
H A Ddriver.c1 // SPDX-License-Identifier: GPL-2.0
6 * and the Application Processors(AP). The Message Handling Unit(MHU)
7 * provides a mechanism for inter-processor communication between SCP's
14 * Copyright (C) 2018-2021 ARM Ltd.
25 #include <linux/io-64-nonatomic-hi-lo.h>
60 * struct scmi_xfers_info - Structure to manage transfer information
68 * a number of xfers equal to the maximum allowed in-flight
71 * currently in-flight messages.
82 * struct scmi_protocol_instance - Describe an initialized protocol instance.
85 * @gid: A reference for per-protocol devres management.
[all …]
/openbmc/qemu/
H A DMAINTAINERS10 consult qemu-devel and not any specific individual privately.
23 W: Web-page with status/info
59 ------------------------------
63 L: qemu-devel@nongnu.org
72 R: Philippe Mathieu-Daudé <philmd@linaro.org>
76 F: docs/devel/code-of-conduct.rst
77 F: docs/devel/conflict-resolution.rst
78 F: docs/devel/submitting-a-patch.rst
79 F: docs/devel/submitting-a-pull-request.rst
82 -------------------------------------------------
[all …]
/openbmc/linux/
H A Dopengrok0.0.log1 2024-12-28 20:09:05.996-0600 FINEST t1171 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/linux/drivers/staging/media/av7110/video-continue.rst.gz'
2 2024-12-28 20:09:05.942-0600 FINEST t1149 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/u-boot/arch/sh/config.mk.gz'
3 2024-12-2
[all...]
H A Dopengrok2.0.log1 2024-12-28 20:05:26.116-0600 FINEST t586 Statistics.logIt: Added: '/openbmc/linux/tools/testing/selftests/drivers/net/mlxsw/rtnetlink.sh' (ShAnalyzer) (took 79 ms)
2 2024-12-28 20:05:26.112-0600 FINER t592 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/qemu',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/qemu/chardev/spice.c'
3 2024-12-28 20:05:26.116-0600 FINEST t592 Statistics.logIt: Added: '/openbmc/qemu/chardev/spice.c' (CAnalyzer) (took 33 ms)
4 2024-1
[all...]