| /openbmc/phosphor-dbus-interfaces/yaml/xyz/openbmc_project/Control/Host/ |
| H A D | NMI.interface.yaml | 2 It is a non-maskable interrupt or signal for triggering dumps from the host
8 Generic method to initiate non maskable interrupt on all host
|
| /openbmc/openbmc-test-automation/openpower/ |
| H A D | test_nmi_interface.robot | 2 Documentation Test Non-maskable interrupt functionality.
71 [Documentation] Inject non-maskable interrupt Redfish URI.
|
| /openbmc/phosphor-dbus-interfaces/yaml/xyz/openbmc_project/Chassis/Buttons/ |
| H A D | NMI.interface.yaml | 3 is a non-maskable interrupt or signal for generating diagnostic traces and
|
| /openbmc/qemu/hw/audio/ |
| H A D | gusemu_hal.c | 218 … GUSregb(TimerStatus2x8) &= 0x1f; /* AdLib IRQ reset? -> clear maskable adl. timer int regs */ in gus_write()
397 GUSregb(TimerStatus2x8) |= 0xc0; /* maskable bits */ in gus_write()
407 GUSregb(TimerStatus2x8) |= 0xa0; /* maskable bits */ in gus_write()
426 GUSregb(TimerStatus2x8) &= 0xfb; /* clear non-maskable timer1 bit */ in gus_write()
431 GUSregb(TimerStatus2x8) &= 0xfd; /* clear non-maskable timer2 bit */ in gus_write()
|
| H A D | gusemu_mixer.c | 201 GUSregb(TimerStatus2x8) |= 0xc0; /* maskable bits */ in gus_irqgen()
220 GUSregb(TimerStatus2x8) |= 0xa0; /* maskable bits */ in gus_irqgen()
|
| /openbmc/qemu/include/hw/s390x/ |
| H A D | s390_flic.h | 52 bool swap, bool maskable, uint8_t flags);
|
| H A D | css.h | 238 void css_register_io_adapters(CssIoAdapterType type, bool swap, bool maskable,
|
| /openbmc/qemu/target/mips/tcg/ |
| H A D | exception.c | 95 [EXCP_NMI] = "non-maskable interrupt",
|
| /openbmc/qemu/target/rx/ |
| H A D | helper.c | 109 expname = "non-maskable interrupt"; in rx_cpu_do_interrupt()
|
| /openbmc/u-boot/arch/x86/include/asm/arch-braswell/ |
| H A D | gpio.h | 77 MASKABLE, enumerator
|
| /openbmc/qemu/hw/m68k/ |
| H A D | q800-glue.c | 65 * Level 7: Non-maskable: parity errors, RESET button
|
| /openbmc/qemu/target/xtensa/core-dc232b/ |
| H A D | core-isa.h | 184 #define XCHAL_HAVE_NMI 1 /* non-maskable interrupt */
279 #define XCHAL_NMI_INTERRUPT 14 /* non-maskable interrupt */
|
| /openbmc/u-boot/arch/xtensa/include/asm/arch-dc232b/ |
| H A D | core.h | 183 #define XCHAL_HAVE_NMI 1 /* non-maskable interrupt */
278 #define XCHAL_NMI_INTERRUPT 14 /* non-maskable interrupt */
|
| /openbmc/qemu/docs/system/arm/ |
| H A D | emulation.rst | 100 - FEAT_NMI (Non-maskable Interrupt)
|
| /openbmc/qemu/target/xtensa/core-dc233c/ |
| H A D | core-isa.h | 232 #define XCHAL_HAVE_NMI 1 /* non-maskable interrupt */
327 #define XCHAL_NMI_INTERRUPT 14 /* non-maskable interrupt */
|
| /openbmc/u-boot/arch/xtensa/include/asm/arch-dc233c/ |
| H A D | core.h | 211 #define XCHAL_HAVE_NMI 1 /* non-maskable interrupt */
306 #define XCHAL_NMI_INTERRUPT 14 /* non-maskable interrupt */
|
| /openbmc/qemu/target/xtensa/core-lx106/ |
| H A D | core-isa.h | 264 #define XCHAL_HAVE_NMI 1 /* non-maskable interrupt */
345 #define XCHAL_NMI_INTERRUPT 14 /* non-maskable interrupt */
|
| /openbmc/u-boot/drivers/gpio/ |
| H A D | zynq_gpio.c | 229 /* only 16 data bits in bit maskable reg */ in zynq_gpio_set_value()
|
| /openbmc/qemu/target/xtensa/core-test_kc705_be/ |
| H A D | core-isa.h | 299 #define XCHAL_HAVE_NMI 1 /* non-maskable interrupt */
395 #define XCHAL_NMI_INTERRUPT 14 /* non-maskable interrupt */
|
| /openbmc/u-boot/arch/xtensa/include/asm/arch-de212/ |
| H A D | core.h | 296 #define XCHAL_HAVE_NMI 1 /* non-maskable interrupt */
392 #define XCHAL_NMI_INTERRUPT 14 /* non-maskable interrupt */
|
| /openbmc/qemu/target/xtensa/core-de212/ |
| H A D | core-isa.h | 329 #define XCHAL_HAVE_NMI 1 /* non-maskable interrupt */
428 #define XCHAL_NMI_INTERRUPT 14 /* non-maskable interrupt */
|
| /openbmc/qemu/linux-headers/asm-s390/ |
| H A D | kvm.h | 355 __u8 maskable; member
|
| /openbmc/qemu/target/xtensa/core-sample_controller/ |
| H A D | core-isa.h | 350 #define XCHAL_HAVE_NMI 1 /* non-maskable interrupt */
449 #define XCHAL_NMI_INTERRUPT 14 /* non-maskable interrupt */
|
| /openbmc/qemu/hw/intc/ |
| H A D | arm_gicv3.c | 38 * The same priority IRQ with non-maskable property should signal to in irqbetter()
|
| /openbmc/qemu/target/xtensa/core-de233_fpu/ |
| H A D | core-isa.h | 410 #define XCHAL_HAVE_NMI 1 /* non-maskable interrupt */
518 #define XCHAL_NMI_INTERRUPT 14 /* non-maskable interrupt */
|