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/openbmc/qemu/include/qemu/
H A Dstats64.h2 * Atomic operations on 64-bit quantities.
9 * See the COPYING file in the top-level directory.
17 /* This provides atomic operations on 64-bit type, using a reader-writer
18 * spinlock on architectures that do not have 64-bit accesses. Even on
19 * those architectures, it tries hard not to take the lock.
26 uint32_t low, high;
34 /* This is not guaranteed to be atomic! */ in stat64_init()
40 return qatomic_read__nocheck(&s->value); in stat64_get()
45 qatomic_set__nocheck(&s->value, value); in stat64_set()
50 qatomic_add(&s->value, value); in stat64_add()
[all …]
/openbmc/qemu/util/
H A Dstats64.c2 * Atomic operations on 64-bit quantities.
9 * See the COPYING file in the top-level directory.
20 /* Keep out incoming writers to avoid them starving us. */ in stat64_rdlock()
21 qatomic_add(&s->lock, 2); in stat64_rdlock()
24 while (qatomic_read(&s->lock) & 1) { in stat64_rdlock()
31 qatomic_sub(&s->lock, 2); in stat64_rdunlock()
36 return qatomic_cmpxchg(&s->lock, 0, 1) == 0; in stat64_wrtrylock()
41 qatomic_dec(&s->lock); in stat64_wrunlock()
46 uint32_t high, low; in stat64_get() local
50 /* 64-bit writes always take the lock, so we can read in in stat64_get()
[all …]
/openbmc/linux/Documentation/arch/arm64/
H A Dkdump.rst7 Kdump mechanism is used to capture a corrupted kernel vmcore so that
8 it can be subsequently analyzed. In order to do this, a preliminarily
9 reserved memory is needed to pre-load the kdump kernel and boot such
12 That reserved memory for kdump is adapted to be able to minimally
21 large chunk of memomy can be found. The low memory reservation needs to
22 be considered if the crashkernel is reserved from the high memory area.
24 - crashkernel=size@offset
25 - crashkernel=size
26 - crashkernel=size,high crashkernel=size,low
28 Low memory and high memory
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/openbmc/linux/drivers/net/ethernet/intel/i40e/
H A Di40e_ptp.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2013 - 2018 Intel Corporation. */
5 #include <linux/posix-clock.h>
9 /* The XL710 timesync is very much like Intel's 82599 design when it comes to
39 CANT_DO_PINS = -1,
52 end = -2,
66 led_end = -2,
67 low = 0, enumerator
68 high, enumerator
83 {off, off, off, high, high, high, high},
[all …]
/openbmc/linux/arch/x86/include/asm/
H A Dmsr.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 #include "msr-index.h"
38 * both i386 and x86_64 returns 64-bit value in edx:eax, but gcc's "A"
44 /* Using 64-bit values saves one instruction clearing the high half of low */
45 #define DECLARE_ARGS(val, low, high) unsigned long low, high argument
46 #define EAX_EDX_VAL(val, low, high) ((low) | (high) << 32) argument
47 #define EAX_EDX_RET(val, low, high) "=a" (low), "=d" (high) argument
49 #define DECLARE_ARGS(val, low, high) unsigned long long val argument
50 #define EAX_EDX_VAL(val, low, high) (val) argument
51 #define EAX_EDX_RET(val, low, high) "=A" (val) argument
[all …]
/openbmc/linux/drivers/net/ethernet/sfc/falcon/
H A Dbitfield.h1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright 2005-2006 Fen Systems Ltd.
5 * Copyright 2006-2013 Solarflare Communications Inc.
14 * Efx NICs make extensive use of bitfields up to 128 bits
15 * wide. Since there is no native 128-bit datatype on most systems,
16 * and since 64-bit datatypes are inefficient on 32-bit systems and
20 * The NICs are PCI devices and therefore little-endian. Since most
21 * of the quantities that we deal with are DMAed to/from host memory,
23 * ef4_dword_t) to be little-endian.
46 /* Low bit number of the specified field */
[all …]
/openbmc/linux/drivers/thermal/intel/
H A Dintel_tcc.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * intel_tcc.c - Library for Intel TCC (thermal control circuitry) MSR access
12 * intel_tcc_get_tjmax() - returns the default TCC activation Temperature
22 u32 low, high; in intel_tcc_get_tjmax() local
26 err = rdmsr_safe(MSR_IA32_TEMPERATURE_TARGET, &low, &high); in intel_tcc_get_tjmax()
28 err = rdmsr_safe_on_cpu(cpu, MSR_IA32_TEMPERATURE_TARGET, &low, &high); in intel_tcc_get_tjmax()
32 val = (low >> 16) & 0xff; in intel_tcc_get_tjmax()
34 return val ? val : -ENODATA; in intel_tcc_get_tjmax()
39 * intel_tcc_get_offset() - returns the TCC Offset value to Tjmax
42 * Get the TCC offset value to Tjmax. The effective thermal throttling or TCC
[all …]
/openbmc/linux/Documentation/userspace-api/media/v4l/
H A Dpixfmt-z16.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _V4L2-PIX-FMT-Z16:
10 16-bit depth data with distance values at each pixel
16 This is a 16-bit format, representing depth data. Each pixel is a
17 distance to the respective point in the image coordinates. Distance unit
18 can vary and has to be negotiated with the device separately. Each pixel
19 is stored in a 16-bit word in the little endian byte order.
27 .. flat-table::
28 :header-rows: 0
29 :stub-columns: 0
[all …]
H A Dpixfmt-srggb10-ipu3.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _v4l2-pix-fmt-ipu3-sbggr10:
4 .. _v4l2-pix-fmt-ipu3-sgbrg10:
5 .. _v4l2-pix-fmt-ipu3-sgrbg10:
6 .. _v4l2-pix-fmt-ipu3-srggb10:
13 10-bit Bayer formats
21 to 32 bytes leaving 6 most significant bits padding in the last byte.
24 In other respects this format is similar to :ref:`V4L2-PIX-FMT-SRGGB10`.
36 .. flat-table::
38 * - start + 0:
[all …]
H A Dpixfmt-tch-tu16.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _V4L2-TCH-FMT-TU16:
11 16-bit unsigned little endian raw touch data
17 This format represents unsigned 16-bit data from a touch controller.
20 0 to 65535.
26 .. flat-table::
27 :header-rows: 0
28 :stub-columns: 0
31 * - start + 0:
32 - R'\ :sub:`00low`
[all …]
H A Dpixfmt-tch-td16.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _V4L2-TCH-FMT-DELTA-TD16:
11 16-bit signed little endian Touch Delta
19 Delta values may range from -32768 to 32767. Typically the values will vary
27 .. flat-table::
28 :header-rows: 0
29 :stub-columns: 0
32 * - start + 0:
33 - D'\ :sub:`00low`
34 - D'\ :sub:`00high`
[all …]
H A Dpixfmt-srggb12.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _V4L2-PIX-FMT-SRGGB12:
4 .. _v4l2-pix-fmt-sbggr12:
5 .. _v4l2-pix-fmt-sgbrg12:
6 .. _v4l2-pix-fmt-sgrbg12:
17 12-bit Bayer formats expanded to 16 bits
24 colour. Each colour component is stored in a 16-bit word, with 4 unused
25 high bits filled with zeros. Each n-pixel row contains n/2 green samples
32 Each cell is one byte, the 4 most significant bits in the high bytes are
38 .. flat-table::
[all …]
H A Dpixfmt-srggb10.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _V4L2-PIX-FMT-SRGGB10:
4 .. _v4l2-pix-fmt-sbggr10:
5 .. _v4l2-pix-fmt-sgbrg10:
6 .. _v4l2-pix-fmt-sgrbg10:
16 10-bit Bayer formats expanded to 16 bits
23 sample. Each sample is stored in a 16-bit word, with 6 unused
24 high bits filled with zeros. Each n-pixel row contains n/2 green samples and
31 Each cell is one byte, the 6 most significant bits in the high bytes
37 .. flat-table::
[all …]
H A Dpixfmt-srggb14.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _V4L2-PIX-FMT-SRGGB14:
4 .. _v4l2-pix-fmt-sbggr14:
5 .. _v4l2-pix-fmt-sgbrg14:
6 .. _v4l2-pix-fmt-sgrbg14:
15 14-bit Bayer formats expanded to 16 bits
23 colour. Each sample is stored in a 16-bit word, with two unused high
24 bits filled with zeros. Each n-pixel row contains n/2 green samples
31 Each cell is one byte, the two most significant bits in the high bytes are
36 .. flat-table::
[all …]
/openbmc/linux/drivers/net/ethernet/sfc/siena/
H A Dbitfield.h1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright 2005-2006 Fen Systems Ltd.
5 * Copyright 2006-2013 Solarflare Communications Inc.
14 * Efx NICs make extensive use of bitfields up to 128 bits
15 * wide. Since there is no native 128-bit datatype on most systems,
16 * and since 64-bit datatypes are inefficient on 32-bit systems and
20 * The NICs are PCI devices and therefore little-endian. Since most
21 * of the quantities that we deal with are DMAed to/from host memory,
23 * efx_dword_t) to be little-endian.
46 /* Low bit number of the specified field */
[all …]
/openbmc/linux/drivers/net/ethernet/sfc/
H A Dbitfield.h1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright 2005-2006 Fen Systems Ltd.
5 * Copyright 2006-2013 Solarflare Communications Inc.
14 * Efx NICs make extensive use of bitfields up to 128 bits
15 * wide. Since there is no native 128-bit datatype on most systems,
16 * and since 64-bit datatypes are inefficient on 32-bit systems and
20 * The NICs are PCI devices and therefore little-endian. Since most
21 * of the quantities that we deal with are DMAed to/from host memory,
23 * efx_dword_t) to be little-endian.
48 /* Low bit number of the specified field */
[all …]
/openbmc/linux/drivers/net/ethernet/engleder/
H A Dtsnep_ptp.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright (C) 2021 Gerhard Engleder <gerhard@engleder-embedded.com> */
9 u32 low; in tsnep_get_system_time() local
10 u32 high; in tsnep_get_system_time() local
12 /* read high dword twice to detect overrun */ in tsnep_get_system_time()
13 high = ioread32(adapter->addr + ECM_SYSTEM_TIME_HIGH); in tsnep_get_system_time()
15 low = ioread32(adapter->addr + ECM_SYSTEM_TIME_LOW); in tsnep_get_system_time()
16 high_before = high; in tsnep_get_system_time()
17 high = ioread32(adapter->addr + ECM_SYSTEM_TIME_HIGH); in tsnep_get_system_time()
18 } while (high != high_before); in tsnep_get_system_time()
[all …]
/openbmc/linux/arch/arm64/kvm/
H A Dstacktrace.c1 /* SPDX-License-Identifier: GPL-2.0-only */
7 * 1) Non-protected nVHE mode - the host can directly access the
9 * to allocate shared buffers for the host to read the unwinded
12 * 2) pKVM (protected nVHE) mode - the host cannot directly access
13 * the HYP memory. The stack is unwinded in EL2 and dumped to a shared
28 unsigned long low = (unsigned long)stacktrace_info->overflow_stack_base; in stackinfo_get_overflow() local
29 unsigned long high = low + OVERFLOW_STACK_SIZE; in stackinfo_get_overflow() local
32 .low = low, in stackinfo_get_overflow()
33 .high = high, in stackinfo_get_overflow()
39 unsigned long low = (unsigned long)this_cpu_ptr_nvhe_sym(overflow_stack); in stackinfo_get_overflow_kern_va() local
[all …]
/openbmc/u-boot/arch/x86/include/asm/
H A Dmsr.h1 /* SPDX-License-Identifier: GPL-2.0+ */
12 #include <asm/msr-index.h>
50 unsigned long low, high; in native_read_tscp() local
52 : "=a" (low), "=d" (high), "=c" (*aux)); in native_read_tscp()
53 return low | ((u64)high << 32); in native_read_tscp()
57 * both i386 and x86_64 returns 64-bit value in edx:eax, but gcc's "A"
63 #define DECLARE_ARGS(val, low, high) unsigned low, high argument
64 #define EAX_EDX_VAL(val, low, high) ((low) | ((u64)(high) << 32)) argument
65 #define EAX_EDX_ARGS(val, low, high) "a" (low), "d" (high) argument
66 #define EAX_EDX_RET(val, low, high) "=a" (low), "=d" (high) argument
[all …]
/openbmc/linux/include/media/
H A Dcec-pin.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * cec-pin.h - low-level CEC pin control
15 * struct cec_pin_ops - low-level CEC pin operations
16 * @read: read the CEC pin. Returns > 0 if high, 0 if low, or an error
18 * @low: drive the CEC pin low.
19 * @high: stop driving the CEC pin. The pull-up will drive the pin
20 * high, unless someone else is driving the pin low.
21 * @enable_irq: optional, enable the interrupt to detect pin voltage changes.
26 * @read_hpd: optional. Read the HPD pin. Returns > 0 if high, 0 if low or
28 * @read_5v: optional. Read the 5V pin. Returns > 0 if high, 0 if low or
[all …]
/openbmc/linux/Documentation/hwmon/
H A Dadm9240.rst10 Addresses scanned: I2C 0x2c - 0x2f
20 Addresses scanned: I2C 0x2c - 0x2f
24 http://pdfserv.maxim-ic.com/en/ds/DS1780.pdf
30 Addresses scanned: I2C 0x2c - 0x2f
37 - Frodo Looijaard <frodol@dds.nl>,
38 - Philip Edelbrock <phil@netroedge.com>,
39 - Michiel Rook <michiel@grendelproject.nl>,
40 - Grant Coady <gcoady.lk@gmail.com> with guidance
44 ---------
46 chip MSB 5-bit address. Each chip reports a unique manufacturer
[all …]
/openbmc/linux/include/linux/
H A Dmath64.h1 /* SPDX-License-Identifier: GPL-2.0 */
16 * div_u64_rem - unsigned 64bit divide with 32bit divisor with remainder
19 * @remainder: pointer to unsigned 32bit remainder
23 * This is commonly provided by 32bit archs to provide an optimized 64bit
33 * div_s64_rem - signed 64bit divide with 32bit divisor with remainder
36 * @remainder: pointer to signed 32bit remainder
47 * div64_u64_rem - unsigned 64bit divide with 64bit divisor and remainder
50 * @remainder: pointer to unsigned 64bit remainder
61 * div64_u64 - unsigned 64bit divide with 64bit divisor
73 * div64_s64 - signed 64bit divide with 64bit divisor
[all …]
/openbmc/linux/Documentation/driver-api/gpio/
H A Dintro.rst9 The documents in this directory give detailed instructions on how to access
10 GPIOs in drivers, and how to write a driver for a device that provides GPIOs
13 Due to the history of GPIO interfaces in the kernel, there are two different
14 ways to obtain and use GPIOs:
16 - The descriptor-based interface is the preferred way to manipulate GPIOs,
18 - The legacy integer-based interface which is considered deprecated (but still
21 The remainder of this document applies to the new descriptor-based interface.
22 legacy.rst contains the same information applied to the legacy
23 integer-based interface.
29 A "General Purpose Input/Output" (GPIO) is a flexible software-controlled
[all …]
/openbmc/u-boot/arch/arm/mach-socfpga/
H A Dfreeze_controller.c1 // SPDX-License-Identifier: GPL-2.0+
18 * flag is set to TRUE to indicate the IO banks are frozen
33 writel(SYSMGR_FRZCTRL_SRC_VIO1_ENUM_SW, &freeze_controller_base->src); in sys_mgr_frzctrl_freeze_req()
35 /* Freeze channel 0 to 2 */ in sys_mgr_frzctrl_freeze_req()
38 &freeze_controller_base->vioctrl + channel_id); in sys_mgr_frzctrl_freeze_req()
41 * Assert active low enrnsl, plniotri in sys_mgr_frzctrl_freeze_req()
52 * Assert active low bhniotri signal and de-assert in sys_mgr_frzctrl_freeze_req()
53 * active high csrdone in sys_mgr_frzctrl_freeze_req()
60 /* Set global flag to indicate channel is frozen */ in sys_mgr_frzctrl_freeze_req()
66 * Assert active low enrnsl, plniotri and in sys_mgr_frzctrl_freeze_req()
[all …]
/openbmc/linux/drivers/gpu/drm/panfrost/
H A Dpanfrost_regs.h1 /* SPDX-License-Identifier: GPL-2.0 */
6 * (C) COPYRIGHT 2010-2018 ARM Limited. All rights reserved.
87 #define GPU_SHADER_PRESENT_LO 0x100 /* (RO) Shader core present bitmap, low word */
88 #define GPU_SHADER_PRESENT_HI 0x104 /* (RO) Shader core present bitmap, high word */
89 #define GPU_TILER_PRESENT_LO 0x110 /* (RO) Tiler core present bitmap, low word */
90 #define GPU_TILER_PRESENT_HI 0x114 /* (RO) Tiler core present bitmap, high word */
92 #define GPU_L2_PRESENT_LO 0x120 /* (RO) Level 2 cache present bitmap, low word */
93 #define GPU_L2_PRESENT_HI 0x124 /* (RO) Level 2 cache present bitmap, high word */
99 #define GPU_STACK_PRESENT_LO 0xE00 /* (RO) Core stack present bitmap, low word */
100 #define GPU_STACK_PRESENT_HI 0xE04 /* (RO) Core stack present bitmap, high word */
[all …]

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