| /openbmc/linux/Documentation/devicetree/bindings/iio/frequency/ |
| H A D | adi,adf4350.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Michael Hennerich <michael.hennerich@analog.com>
15 - adi,adf4350
16 - adi,adf4351
21 spi-max-frequency:
28 clock-names:
35 adi,channel-spacing:
40 adi,power-up-frequency:
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| /openbmc/linux/drivers/net/wireless/ath/ath5k/ |
| H A D | ani.c | 33 * - "noise immunity"
35 * - "spur immunity"
37 * - "firstep level"
39 * - "OFDM weak signal detection"
41 * - "CCK weak signal detection"
48 * interrupt when they overflow. Older hardware has too enable PHY error frames
61 * ath5k_ani_set_noise_immunity_level() - Set noise immunity level
75 static const s8 lo[] = { -52, -56, -60, -64, -70 }; in ath5k_ani_set_noise_immunity_level()
76 static const s8 hi[] = { -18, -18, -16, -14, -12 }; in ath5k_ani_set_noise_immunity_level()
77 static const s8 sz[] = { -34, -41, -48, -55, -62 }; in ath5k_ani_set_noise_immunity_level()
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| H A D | reg.h | 2 * Copyright (c) 2006-2008 Nick Kossifidis <mickflemm@gmail.com>
3 * Copyright (c) 2004-2008 Reyk Floeter <reyk@openbsd.org>
4 * Copyright (c) 2007-2008 Michael Taylor <mike.taylor@apprion.com>
28 * 5210 - http://nova.stanford.edu/~bbaas/ps/isscc2002_slides.pdf
30 * 5211 - http://www.hotchips.org/archives/hc14/3_Tue/16_mcfarland.pdf
33 * Atheros's ART program (Atheros Radio Test), on ath9k, on legacy-hal
42 * AR5210-Specific TXDP registers
46 #define AR5K_NOQCU_TXDP0 0x0000 /* Queue 0 - data */
47 #define AR5K_NOQCU_TXDP1 0x0004 /* Queue 1 - beacons */
53 #define AR5K_CR_TXE0 0x00000001 /* TX Enable for queue 0 on 5210 */
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| H A D | phy.c | 2 * Copyright (c) 2004-2007 Reyk Floeter <reyk@openbsd.org>
3 * Copyright (c) 2006-2009 Nick Kossifidis <mickflemm@gmail.com>
4 * Copyright (c) 2007-2008 Jiri Slaby <jirislaby@gmail.com>
5 * Copyright (c) 2008-2009 Felix Fietkau <nbd@openwrt.org>
42 * Here we handle the low-level functions related to baseband
48 * - Channel setting/switching
50 * - Automatic Gain Control (AGC) calibration
52 * - Noise Floor calibration
54 * - I/Q imbalance calibration (QAM correction)
56 * - Calibration due to thermal changes (gain_F)
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| H A D | debug.c | 2 * Copyright (c) 2007-2008 Bruno Randolf <bruno@thinktube.com>
21 * Copyright (c) 2002-2005 Sam Leffler, Errno Consulting
22 * Copyright (c) 2004-2005 Atheros Communications, Inc.
39 * 3. Neither the names of the above-listed copyright holders nor the names
157 struct ath5k_hw *ah = seq->private; in reg_show()
159 seq_printf(seq, "%-25s0x%08x\n", r->name, in reg_show()
160 ath5k_hw_reg_read(ah, r->addr)); in reg_show()
178 struct ath5k_hw *ah = file->private_data; in read_file_beacon()
185 len += scnprintf(buf + len, sizeof(buf) - len, in read_file_beacon()
186 "%-24s0x%08x\tintval: %d\tTIM: 0x%x\n", in read_file_beacon()
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| H A D | ath5k.h | 2 * Copyright (c) 2004-2007 Reyk Floeter <reyk@openbsd.org>
3 * Copyright (c) 2006-2007 Nick Kossifidis <mickflemm@gmail.com>
62 #define PCI_DEVICE_ID_ATHEROS_AR5312_REV7 0x0057 /* AR5312 WMAC (AP30-040) */
63 #define PCI_DEVICE_ID_ATHEROS_AR5312_REV8 0x0058 /* AR5312 WMAC (AP43-030) */
70 #define PCI_DEVICE_ID_ATHEROS_AR2413 0x001a /* AR2413 (Griffin-lite) */
72 #define PCI_DEVICE_ID_ATHEROS_AR5424 0x001c /* AR5424 (Condor PCI-E) */
189 #define AR5K_TUNE_NOISE_FLOOR -72
190 #define AR5K_TUNE_CCA_MAX_GOOD_VALUE -95
259 * on turbo mode */
274 * enum ath5k_version - MAC Chips
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| /openbmc/linux/drivers/net/wireless/ath/ath9k/ |
| H A D | ar9003_phy.c | 2 * Copyright (c) 2010-2011 Atheros Communications Inc.
39 { -4, -2, 0, 2, 4, 6, 8, 10, 12 }; /* lvl 0-8, default 2 */
43 { -6, -4, -2, 0, 2, 4, 6, 8 }; /* lvl 0-7, default 3 */
125 * ar9003_hw_set_channel - set channel on single-chip device
129 * This is the function to change channel on single-chip devices, that is
159 if (freq < 4800) { /* 2 GHz, fractional mode */ in ar9003_hw_set_channel()
163 if (ah->is_clk_25mhz) in ar9003_hw_set_channel()
172 if (ah->is_clk_25mhz) { in ar9003_hw_set_channel()
182 /* Set to 2G mode */ in ar9003_hw_set_channel()
187 ah->is_clk_25mhz) { in ar9003_hw_set_channel()
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| H A D | ar9003_eeprom.c | 2 * Copyright (c) 2010-2011 Atheros Communications Inc.
36 #define SUB_NUM_CTL_MODES_AT_5G_40 2 /* excluding HT40, EXT-OFDM */
37 #define SUB_NUM_CTL_MODES_AT_2G_40 3 /* excluding HT40, EXT-OFDM, EXT-CCK */
67 * bit0 - enable tx temp comp - disabled
68 * bit1 - enable tx volt comp - disabled
69 * bit2 - enable fastClock - enabled
70 * bit3 - enable doubling - enabled
71 * bit4 - enable internal regulator - disabled
72 * bit5 - enable pa predistortion - disabled
74 .miscConfiguration = 0, /* bit0 - turn down drivestrength */
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| /openbmc/linux/drivers/iio/frequency/ |
| H A D | adf4350.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright 2012-2013 Analog Devices Inc.
77 for (i = ADF4350_REG5; i >= ADF4350_REG0; i--) { in adf4350_sync_config()
78 if ((st->regs_hw[i] != st->regs[i]) || in adf4350_sync_config()
87 st->val = cpu_to_be32(st->regs[i] | i); in adf4350_sync_config()
88 ret = spi_write(st->spi, &st->val, 4); in adf4350_sync_config()
91 st->regs_hw[i] = st->regs[i]; in adf4350_sync_config()
92 dev_dbg(&st->spi->dev, "[%d] 0x%X\n", in adf4350_sync_config()
93 i, (u32)st->regs[i] | i); in adf4350_sync_config()
107 return -EINVAL; in adf4350_reg_access()
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| /openbmc/linux/drivers/bcma/ |
| H A D | driver_chipcommon_pmu.c | 7 * Copyright 2011, 2012, Hauke Mehrtens <hauke@hauke-m.de>
82 struct bcma_bus *bus = cc->core->bus; in bcma_pmu2_pll_init0()
86 switch (bus->chipinfo.id) { in bcma_pmu2_pll_init0()
125 switch (bus->chipinfo.id) { in bcma_pmu2_pll_init0()
132 bcma_wait_value(cc->core, BCMA_CLKCTLST, in bcma_pmu2_pll_init0()
142 if (cc->pmu.rev >= 2) in bcma_pmu2_pll_init0()
150 struct bcma_bus *bus = cc->core->bus; in bcma_pmu_pll_init()
153 switch (bus->chipinfo.id) { in bcma_pmu_pll_init()
164 struct bcma_bus *bus = cc->core->bus; in bcma_pmu_resources_init()
167 switch (bus->chipinfo.id) { in bcma_pmu_resources_init()
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| /openbmc/linux/drivers/media/tuners/ |
| H A D | r820t.c | 1 // SPDX-License-Identifier: GPL-2.0
7 // that it is part of rtl-sdr git tree, released under GPLv2:
8 // https://groups.google.com/forum/#!topic/ultra-cheap-sdr/Y3rBEOFtHug
9 // https://github.com/n1gp/gr-baz
30 #include "tuner-i2c.h"
46 MODULE_PARM_DESC(debug, "enable verbose debug messages");
88 /* Store current mode */
131 .open_d = 0x08, /* low */
132 .rf_mux_ploy = 0x02, /* R26[7:6]=0 (LPF) R26[1:0]=2 (low) */
140 .open_d = 0x08, /* low */
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| /openbmc/linux/drivers/media/usb/dvb-usb/ |
| H A D | dib0700_devices.c | 1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright (C) 2005-9 DiBcom, SA et al
29 MODULE_PARM_DESC(force_lna_activation, "force the activation of Low-Noise-Amplifier(s) (LNA), if ap…
38 /* Hauppauge Nova-T 500 (aka Bristol)
87 struct dib0700_state *st = adap->dev->priv; in bristol_frontend_attach()
88 if (adap->id == 0) { in bristol_frontend_attach()
89 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0); msleep(10); in bristol_frontend_attach()
90 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1); msleep(10); in bristol_frontend_attach()
91 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0); msleep(10); in bristol_frontend_attach()
92 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1); msleep(10); in bristol_frontend_attach()
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| /openbmc/linux/drivers/net/wireless/broadcom/brcm80211/brcmsmac/ |
| H A D | main.c | 3 * Copyright (c) 2013 Hauke Mehrtens <hauke@hauke-m.de>
50 /* n-mode support capability */
82 #define EDCF_ECW2CW(exp) ((1 << (exp)) - 1)
133 /* Per-AC retry limit register definitions; uses defs.h bitfield macros */
167 #define BRCMS_PLCP_AUTO -1
172 #define BRCMS_PROTECTION_AUTO -1
199 /* MSC in use,indicates b0-6 holds an mcs */
203 /* stf mode mask: siso, cdd, stbc, sdm */
205 /* stf mode shift */
209 #define NRATE_SGI_MASK 0x00800000 /* sgi mode */
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