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/openbmc/u-boot/arch/m68k/cpu/mcf523x/
H A Dstart.S1 /* SPDX-License-Identifier: GPL-2.0+ */
4 * Based on code from Bernhard Kuhn <bkuhn@metrowerks.com>
7 #include <asm-offsets.h>
18 moveml %d0-%d7/%a0-%a6,%sp@;
21 moveml %sp@,%d0-%d7/%a0-%a6; \
29 * These vectors are to catch any un-intended traps.
32 INITSP: .long 0x00000000 /* Initial SP */
33 INITPC: .long _START /* Initial PC */
36 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
37 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
[all …]
/openbmc/u-boot/arch/m68k/cpu/mcf547x_8x/
H A Dstart.S1 /* SPDX-License-Identifier: GPL-2.0+ */
4 * Based on code from Bernhard Kuhn <bkuhn@metrowerks.com>
7 #include <asm-offsets.h>
18 moveml %d0-%d7/%a0-%a6,%sp@;
21 moveml %sp@,%d0-%d7/%a0-%a6; \
29 * These vectors are to catch any un-intended traps.
32 INITSP: .long 0x00000000 /* Initial SP */
33 INITPC: .long _START /* Initial PC */
36 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
37 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
[all …]
/openbmc/u-boot/arch/m68k/cpu/mcf530x/
H A Dstart.S1 /* SPDX-License-Identifier: GPL-2.0+ */
4 * Based on code from Bernhard Kuhn <bkuhn@metrowerks.com>
7 #include <asm-offsets.h>
19 moveml %d0-%d7/%a0-%a6,%sp@
23 moveml %sp@,%d0-%d7/%a0-%a6;
28 /* If we come from a pre-loader we don't need an initial exception
37 * These vectors are to catch any un-intended traps.
41 .long 0x00000000
44 .long _start - CONFIG_SYS_TEXT_BASE
46 .long _START
[all …]
/openbmc/u-boot/arch/m68k/cpu/mcf532x/
H A Dstart.S1 /* SPDX-License-Identifier: GPL-2.0+ */
4 * Based on code from Bernhard Kuhn <bkuhn@metrowerks.com>
6 * (C) Copyright 2004-2008 Freescale Semiconductor, Inc.
7 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
10 #include <asm-offsets.h>
21 moveml %d0-%d7/%a0-%a6,%sp@;
24 moveml %sp@,%d0-%d7/%a0-%a6; \
34 * These vectors are to catch any un-intended traps.
37 INITSP: .long 0x00000000 /* Initial SP */
38 INITPC: .long _START /* Initial PC */
[all …]
/openbmc/u-boot/arch/x86/cpu/
H A Dstart.S1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * U-Boot - x86 Startup Code
5 * (C) Copyright 2008-2011
16 #include <asm/processor-flags.h>
17 #include <generated/generic-asm-offsets.h>
18 #include <generated/asm-offsets.h>
28 * This is the fail-safe 32-bit bootstrap entry point.
30 * This code is used when booting from another boot loader like
37 /* Turn off cache (this might require a 486-class CPU) */
43 /* Tell 32-bit code it is being entered from an in-RAM copy */
[all …]
H A Dsipi_vector.S1 /* SPDX-License-Identifier: GPL-2.0 */
11 * C code
15 #include <asm/msr-index.h>
17 #include <asm/processor-flags.h>
24 * First we have the 16-bit section. Every AP process starts here.
25 * The simple task is to load U-Boot's Global Descriptor Table (GDT) to allow
26 * U-Boot's 32-bit code to become visible, then jump to ap_start.
28 * Note that this code is copied to RAM below 1MB in mp_init.c, and runs from
29 * there, but the 32-bit code (ap_start and onwards) is part of U-Boot and
30 * is therefore relocated to the top of RAM with other U-Boot code. This
[all …]
/openbmc/u-boot/arch/m68k/cpu/mcf52x2/
H A Dstart.S1 /* SPDX-License-Identifier: GPL-2.0+ */
4 * Based on code from Bernhard Kuhn <bkuhn@metrowerks.com>
7 #include <asm-offsets.h>
19 moveml %d0-%d7/%a0-%a6,%sp@; \
22 moveml %sp@,%d0-%d7/%a0-%a6; \
26 /* If we come from a pre-loader we don't need an initial exception
35 * These vectors are to catch any un-intended traps.
38 .long 0x00000000 /* Flash offset is 0 until we setup CS0 */
40 .long _start - CONFIG_SYS_TEXT_BASE
42 .long _START
[all …]
/openbmc/qemu/migration/
H A Dpostcopy-ram.h2 * Postcopy migration for RAM
10 * See the COPYING file in the top-level directory.
16 #include "qapi/qapi-types-migration.h"
18 /* Return true if the host supports everything we need to do postcopy-ram */
23 * Make all of RAM sensitive to accesses to areas that haven't yet been written
29 * Initialise postcopy-ram, setting the RAM to a state where we can go into
31 * called from ram.c's similarly named ram_postcopy_incoming_init
41 * Userfault requires us to mark RAM as NOHUGEPAGE prior to discard
48 * Called at the start of each RAMBlock by the bitmap code.
53 * Called by the bitmap code for each chunk to discard.
[all …]
/openbmc/linux/arch/m68k/atari/
H A Dstram.c2 * Functions for ST-RAM allocations
4 * Copyright 1994-97 Roman Hodek <Roman.Hodek@informatik.uni-erlangen.de>
35 * The ST-RAM allocator allocates memory from a pool of reserved ST-RAM of
36 * configurable size, set aside on ST-RAM init.
37 * As long as this pool is not exhausted, allocation of real ST-RAM can be
41 /* set if kernel is in ST-RAM */
45 .name = "ST-RAM Pool"
48 static unsigned long pool_size = 1024*1024;
50 static unsigned long stram_virt_offset;
73 * determine whether kernel code resides in ST-RAM in atari_stram_init()
[all …]
/openbmc/linux/drivers/net/ethernet/amd/
H A Dmvme147.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Uses the generic 7990.c LANCE code.
30 /* We have 32K of RAM for the init block and buffers. This places
37 #include "7990.h" /* use generic LANCE code */
42 unsigned long ram; member
47 * plus board-specific init, open and close actions.
48 * Oh, and we need to tell the generic code how to read and write LANCE registers...
70 /* Initialise the one and only on-board 7990 */
83 return ERR_PTR(-ENODEV); in mvme147lance_probe()
88 return ERR_PTR(-ENOMEM); in mvme147lance_probe()
[all …]
/openbmc/linux/include/linux/
H A Dcrash_dump.h1 /* SPDX-License-Identifier: GPL-2.0 */
12 #define ELFCORE_ADDR_MAX (-1ULL)
13 #define ELFCORE_ADDR_ERR (-2ULL)
15 extern unsigned long long elfcorehdr_addr;
16 extern unsigned long long elfcorehdr_size;
19 extern int elfcorehdr_alloc(unsigned long long *addr, unsigned long long *size);
20 extern void elfcorehdr_free(unsigned long long addr);
24 unsigned long from, unsigned long pfn,
25 unsigned long size, pgprot_t prot);
27 ssize_t copy_oldmem_page(struct iov_iter *i, unsigned long pfn, size_t csize,
[all …]
/openbmc/u-boot/arch/m68k/cpu/mcf5227x/
H A Dstart.S1 /* SPDX-License-Identifier: GPL-2.0+ */
4 * Based on code from Bernhard Kuhn <bkuhn@metrowerks.com>
7 #include <asm-offsets.h>
18 moveml %d0-%d7/%a0-%a6,%sp@;
21 moveml %sp@,%d0-%d7/%a0-%a6; \
26 #define ASM_DRAMINIT (asm_dram_init - CONFIG_SYS_TEXT_BASE + \
28 #define ASM_SBF_IMG_HDR (asm_sbf_img_hdr - CONFIG_SYS_TEXT_BASE + \
36 * These vectors are to catch any un-intended traps.
40 INITSP: .long 0 /* Initial SP */
41 INITPC: .long ASM_DRAMINIT /* Initial PC */
[all …]
/openbmc/linux/arch/arm/kernel/
H A Dreboot.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 1996-2000 Russell King - Converted to ARM.
17 typedef void (*phys_reset_t)(unsigned long, bool);
30 * code.
54 phys_reset((unsigned long)addr, is_hyp_mode_available()); in __soft_restart()
60 void _soft_restart(unsigned long addr, bool disable_l2) in _soft_restart()
79 void soft_restart(unsigned long addr) in soft_restart()
88 * to execute e.g. a RAM-based pin loop is not sufficient. This allows the
89 * kexec'd kernel to use any and all RAM as it sees fit, without having to
90 * avoid any code or data used by any SW CPU pin loop. The CPU hotplug
[all …]
H A Dtcm.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2008-2009 ST-Ericsson AB
41 .name = "DTCM RAM",
48 .name = "ITCM RAM",
77 unsigned long vaddr; in tcm_alloc()
95 gen_pool_free(tcm_pool, (unsigned long) addr, len); in tcm_free()
114 const int tcm_sizes[16] = { 0, -1, -1, 4, 8, 16, 32, 64, 128, in setup_tcm_bank()
115 256, 512, 1024, -1, -1, -1, -1 }; in setup_tcm_bank()
141 return -EINVAL; in setup_tcm_bank()
145 return -EINVAL; in setup_tcm_bank()
[all …]
/openbmc/u-boot/arch/m68k/cpu/mcf5445x/
H A Dstart.S1 /* SPDX-License-Identifier: GPL-2.0+ */
4 * Based on code from Bernhard Kuhn <bkuhn@metrowerks.com>
6 * Copyright 2010-2012 Freescale Semiconductor, Inc.
7 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
11 #include <asm-offsets.h>
23 moveml %d0-%d7/%a0-%a6,%sp@;
26 moveml %sp@,%d0-%d7/%a0-%a6; \
31 #define ASM_DRAMINIT (asm_dram_init - CONFIG_SYS_TEXT_BASE + \
33 #define ASM_DRAMINIT_N (asm_dram_init - CONFIG_SYS_TEXT_BASE)
34 #define ASM_SBF_IMG_HDR (asm_sbf_img_hdr - CONFIG_SYS_TEXT_BASE + \
[all …]
/openbmc/linux/arch/microblaze/kernel/
H A Dsetup.c2 * Copyright (C) 2007-2009 Michal Simek <monstr@monstr.eu>
3 * Copyright (C) 2007-2009 PetaLogix
32 #include <linux/dma-mapping.h>
46 * ASM code. Default position is BSS section which is cleared
70 code (ie no point checking for CRAMFS if it's not even enabled) */
74 if (memcmp(&addr[0], "-rom1fs-", 8) == 0) /* romfs */ in get_romfs_len()
86 unsigned long kernel_tlb;
88 void __init machine_early_init(const char *cmdline, unsigned int ram, in machine_early_init() argument
92 unsigned long *src, *dst; in machine_early_init()
104 romfs_base = (ram ? ram : (unsigned int)&__init_end); in machine_early_init()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/misc/
H A Dnvidia,tegra20-apbmisc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/misc/nvidia,tegra20-apbmisc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
16 - items:
17 - enum:
18 - nvidia,tegra210-apbmisc
19 - nvidia,tegra124-apbmisc
[all …]
/openbmc/u-boot/include/asm-generic/
H A Dglobal_data.h1 /* SPDX-License-Identifier: GPL-2.0+ */
4 * (C) Copyright 2002-2010
15 * up the memory controller so that we can use RAM).
28 unsigned long flags;
30 unsigned long cpu_clk; /* CPU clock in Hz! */
31 unsigned long bus_clk;
33 unsigned long pci_clk;
34 unsigned long mem_clk;
36 unsigned long fb_base; /* Base address of framebuffer mem */
39 unsigned long post_log_word; /* Record POST activities */
[all …]
/openbmc/linux/arch/m68k/coldfire/
H A Dhead.S1 /* SPDX-License-Identifier: GPL-2.0 */
5 * head.S -- common startup code for ColdFire CPUs.
7 * (C) Copyright 1999-2011, Greg Ungerer <gerg@snapgear.com>.
14 #include <asm/asm-offsets.h>
23 * If we don't have a fixed memory size, then lets build in code
26 * that do not have their RAM starting at address 0, and it only
40 * but the DCMR register is virtually identical - give or take
119 * During startup we store away the RAM setup. These are not in the
124 .long 0
126 .long 0
[all …]
/openbmc/u-boot/arch/arm/mach-tegra/tegra20/
H A Demc.c1 // SPDX-License-Identifier: GPL-2.0+
9 #include <asm/arch-tegra/ap.h>
10 #include <asm/arch-tegra/apb_misc.h>
29 static const unsigned long emc_reg_addr[TEGRA_EMC_NUM_REGS] = {
94 ERR_NO_EMC_NODE = -10,
104 * Find EMC tables for the given ram code.
106 * The tegra EMC binding has two options, one using the ram code and one not.
107 * We detect which is in use by looking for the nvidia,use-ram-code property.
109 * otherwise we select the correct emc-tables subnode based on the 'ram_code'
113 * @param node EMC node (nvidia,tegra20-emc compatible string)
[all …]
/openbmc/u-boot/common/
H A Dboard_f.c1 // SPDX-License-Identifier: GPL-2.0+
4 * (C) Copyright 2002-2006
8 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
37 #include <asm/mach-types.h>
61 * TODO(sjg@chromium.org): IMO this code should be
87 * global data for all modules, so that post-reloc we can avoid the massive
123 gd->baudrate = env_get_ulong("baudrate", 10, CONFIG_BAUDRATE); in init_baud_rate()
141 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n", in display_text_info()
189 dev->name, ret); in print_cpuinfo()
207 unsigned long long size; in show_dram_config()
[all …]
/openbmc/linux/arch/x86/kernel/
H A Debda.c1 // SPDX-License-Identifier: GPL-2.0
12 * are code), that must not be used by the kernel as available
13 * RAM.
20 * guess the reserved BIOS area by looking at the low BIOS RAM size
26 * - This code also contains a quirk for Dell systems that neglect
27 * to reserve the EBDA area in the 'RAM size' value ...
29 * - The same quirk also avoids a problem with the AMD768MPX
34 * - Plus paravirt systems don't have a reliable value in the
35 * 'BIOS RAM size' pointer we can rely on, so we must quirk
43 * rarely a problem, as long as we have enough memory to install
[all …]
/openbmc/linux/drivers/gpu/drm/
H A Ddrm_gem_vram_helper.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 #include <linux/iosys-map.h>
30 * buffer object that is backed by video RAM (VRAM). It can be used for
39 * graphics buffers, such as an on-screen framebuffer. GEM does not provide
43 * library. Each active buffer object is stored in video RAM. Active
54 * .. code-block:: c
70 * unsigned long vram_size;
85 * manages an area of video RAM with VRAM MM and provides GEM VRAM objects
90 * clean-up handler to run during the DRM device's release.
93 * in video RAM. Call drm_gem_vram_pin() with &DRM_GEM_VRAM_PL_FLAG_VRAM or
[all …]
/openbmc/u-boot/lib/efi_loader/
H A Defi_memory.c1 // SPDX-License-Identifier: GPL-2.0+
25 #define EFI_CARVE_NO_OVERLAP -1
26 #define EFI_CARVE_LOOP_AGAIN -2
27 #define EFI_CARVE_OVERLAPS_NONRAM -3
37 * U-Boot services each EFI AllocatePool request as a separate
61 if (mema->desc.physical_start == memb->desc.physical_start) in efi_mem_cmp()
63 else if (mema->desc.physical_start < memb->desc.physical_start) in efi_mem_cmp()
66 return -1; in efi_mem_cmp()
71 return desc->physical_start + (desc->num_pages << EFI_PAGE_SHIFT); in desc_get_end()
87 struct efi_mem_desc *prev = &prevmem->desc; in efi_mem_sort()
[all …]
/openbmc/u-boot/post/drivers/
H A Dmemory.c1 // SPDX-License-Identifier: GPL-2.0+
44 * ---------------
77 * ------------------
79 * hooked up to the RAM work properly. If there is an address line
89 * In the actual code, we start with address sizeof(ulong) since our
95 * 0000 <- base
96 * 0001 <- test 1
97 * 0010 <- test 2
98 * 0100 <- test 3
99 * 1000 <- test 4
[all …]

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