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Searched full:ld2 (Results 1 – 25 of 29) sorted by relevance

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/openbmc/linux/arch/arc/include/asm/
H A Dentry-arcv2.h209 LD2 r58, r59, PT_r58
218 LD2 r10, r11, PT_lpe
225 LD2 r0, r1, PT_r0
226 LD2 r2, r3, PT_r2
227 LD2 r4, r5, PT_r4
228 LD2 r6, r7, PT_r6
229 LD2 r8, r9, PT_r8
230 LD2 r10, r11, PT_r10
265 LD2 r10, r11, PT_ret
H A Dlinkage.h26 .macro LD2 e, o, off
/openbmc/linux/arch/ia64/lib/
H A Dcopy_user.S338 EX(.failure_in1,(p7) ld2 val1[1]=[src1],2) // 2-byte aligned
353 // we have never executed the ld2, therefore st2 is not executed.
397 EX(.failure_in1,(p8) ld2 val2[0]=[src1],2) // at least 2 bytes
500 // size loads, e.g. failing ld4 means no ld1 nor ld2 executed
515 // The combination ld1, ld2, ld4, ld8 where you fail on ld8 is impossible
533 // any stores. For instance, if we fail on ld2, this means we had
/openbmc/qemu/target/hexagon/imported/
H A Dencode_subinsn.def38 /* Ld2-type subinsns */
119 /* NCJ goes with LD1, LD2 */
/openbmc/linux/arch/sparc/boot/
H A Dpiggyback.c43 static unsigned short ld2(char *p) in ld2() function
152 offset = ld2(buffer + AOUT_TEXT_OFFSET + 2) << 2; in get_hdrs_offset()
/openbmc/linux/arch/arm/boot/dts/nvidia/
H A Dtegra20-trimslice.dts138 nvidia,pins = "lcsn", "ld0", "ld1", "ld2",
252 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
H A Dtegra20-tamonten.dtsi129 nvidia,pins = "lcsn", "ld0", "ld1", "ld2",
236 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
H A Dtegra20-paz00.dts141 nvidia,pins = "lcsn", "ld0", "ld1", "ld2",
242 nvidia,pins = "hdint", "ld0", "ld1", "ld2",
H A Dtegra20-ventana.dts154 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
261 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
H A Dtegra20-harmony.dts147 nvidia,pins = "lcsn", "ld0", "ld1", "ld2",
254 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
H A Dtegra20-seaboard.dts153 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
262 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
H A Dtegra20-asus-tf101.dts233 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
363 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
H A Dtegra20-acer-a500-picasso.dts195 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
305 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
H A Dtegra20-colibri.dtsi210 nvidia,pins = "ld0", "ld1", "ld2", "ld3",
/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Dnvidia,tegra20-pinmux.yaml39 ld2, ld3, ld4, ld5, ld6, ld7, ld8, ld9, ld10, ld11, ld12,
/openbmc/u-boot/arch/arm/dts/
H A Dtegra20-tamonten.dtsi118 nvidia,pins = "lcsn", "ld0", "ld1", "ld2",
225 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
H A Dtegra20-paz00.dts157 nvidia,pins = "lcsn", "ld0", "ld1", "ld2",
258 nvidia,pins = "hdint", "ld0", "ld1", "ld2",
H A Dtegra20-ventana.dts173 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
280 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
H A Dtegra20-harmony.dts168 nvidia,pins = "lcsn", "ld0", "ld1", "ld2",
275 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
H A Dtegra20-seaboard.dts184 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
293 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
/openbmc/linux/arch/ia64/include/asm/
H A Dspinlock.h78 asm volatile ("ld2.bias %0=[%1]" : "=r"(tmp) : "r"(p)); in __ticket_spin_unlock()
/openbmc/u-boot/arch/arm/mach-tegra/tegra20/
H A Dpinmux.c360 PINP(LD2, DISPA, DISPB, XIO, RSVD4, LD17),
/openbmc/linux/arch/ia64/kernel/
H A Dfsys.S358 ld2 r20=[r18] // r20 = cpu_to_node_map[cpu]
/openbmc/qemu/tcg/mips/
H A Dtcg-target.c.inc1400 const MIPSInsn ld2 = HOST_BIG_ENDIAN ? OPC_LDR : OPC_LDL;
1437 tcg_out_opc_imm(s, ld2, lo, base, 7);
/openbmc/linux/arch/m68k/include/asm/
H A DMC68EZ328.h397 #define PC_LD2 0x04 /* Use LD2 as PC[2] */

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