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/openbmc/linux/Documentation/devicetree/bindings/display/
H A Datmel,lcdc.txt1 Atmel LCDC Framebuffer
2 -----------------------------------------------------
5 - compatible :
6 "atmel,at91sam9261-lcdc" ,
7 "atmel,at91sam9263-lcdc" ,
8 "atmel,at91sam9g10-lcdc" ,
9 "atmel,at91sam9g45-lcdc" ,
10 "atmel,at91sam9g45es-lcdc" ,
11 "atmel,at91sam9rl-lcdc" ,
12 - reg : Should contain 1 register ranges(address and length).
[all …]
H A Dmarvell,pxa2xx-lcdc.txt2 ------------------
5 - compatible : one of these
6 "marvell,pxa2xx-lcdc",
7 "marvell,pxa270-lcdc",
8 "marvell,pxa300-lcdc"
9 - reg : should contain 1 register range (address and length).
10 - interrupts : framebuffer controller interrupt.
11 - clocks: phandle to input clocks
14 - lcd-supply: A phandle to a power regulator that controls the LCD voltage.
17 - port: connection to the LCD panel (see video-interfaces.txt)
[all …]
/openbmc/linux/Documentation/devicetree/bindings/display/imx/
H A Dfsl,imx-lcdc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/imx/fsl,imx-lcdc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sascha Hauer <s.hauer@pengutronix.de>
11 - Pengutronix Kernel Team <kernel@pengutronix.de>
16 - enum:
17 - fsl,imx1-fb
18 - fsl,imx21-fb
19 - items:
[all …]
/openbmc/linux/Documentation/devicetree/bindings/display/rockchip/
H A Drockchip,lvds.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip low-voltage differential signal (LVDS) transmitter
10 - Sandy Huang <hjc@rock-chips.com>
11 - Heiko Stuebner <heiko@sntech.de>
16 - rockchip,px30-lvds
17 - rockchip,rk3288-lvds
25 clock-names:
28 avdd1v0-supply:
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/openbmc/linux/arch/sh/include/asm/
H A Dsh7760fb.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * sh7760fb.h -- platform data for SH7760/SH7763 LCDC framebuffer driver.
5 * (c) 2006-2008 MSC Vertriebsges.m.b.H.,
19 /* The LCDC dma engine always sets bits 27-26 to 1: this is Area3 */
81 /* DISPLAY-ENABLE polarity inversion */
96 /* Display types supported by the LCDC */
120 /* LCDC Pixclock sources */
128 /* LCDC pixclock input divider. Set to 1 at a minimum! */
148 * Display Enable signal (default high-active) DISPEN_LOWACT
149 * Display Data signals (default high-active) DPOL_LOWACT
[all …]
/openbmc/linux/Documentation/devicetree/bindings/power/
H A Drockchip-io-domain.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/power/rockchip-io-domain.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Heiko Stuebner <heiko@sntech.de>
42 to report their voltage. The IO Voltage Domain for any non-specified
48 - rockchip,px30-io-voltage-domain
49 - rockchip,px30-pmu-io-voltage-domain
50 - rockchip,rk3188-io-voltage-domain
51 - rockchip,rk3228-io-voltage-domain
[all …]
/openbmc/linux/arch/arm/boot/dts/intel/pxa/
H A Dpxa300-raumfeld-controller.dts1 // SPDX-License-Identifier: GPL-2.0
3 /dts-v1/;
5 #include "pxa300-raumfeld-common.dtsi"
9 compatible = "raumfeld,raumfeld-controller-pxa303", "marvell,pxa300";
11 reg_vbatt: regulator-vbatt {
12 compatible = "regulator-fixed";
13 regulator-name = "vbatt-fixed-supply";
14 regulator-min-microvolt = <3700000>;
15 regulator-max-microvolt = <3700000>;
16 regulator-always-on;
[all …]
/openbmc/linux/drivers/video/fbdev/
H A Dsh7760fb.c1 // SPDX-License-Identifier: GPL-2.0
3 * SH7760/SH7763 LCDC Framebuffer driver.
5 * (c) 2006-2008 MSC Vertriebsges.m.b.H.,
11 * Thanks to Siegfried Schaefer <s.schaefer at schaefer-edv.de>
19 #include <linux/dma-mapping.h>
56 /* wait_for_lps - wait until power supply has reached a certain state. */
60 while (--i && ((ioread16(par->base + LDPMMR) & 3) != val)) in wait_for_lps()
64 return -ETIMEDOUT; in wait_for_lps()
69 /* en/disable the LCDC */
72 struct sh7760fb_par *par = info->par; in sh7760fb_blank()
[all …]
H A Dsh_mobile_lcdcfb.c2 * SuperH Mobile LCDC Framebuffer
16 #include <linux/dma-mapping.h>
35 /* ----------------------------------------------------------------------------
147 * struct sh_mobile_lcdc_overlay - LCDC display overlay
149 * @channel: LCDC channel this overlay belongs to
152 * @index: Overlay index (0-3)
156 * @alpha: Global alpha blending value (0-255, for alpha blending mode)
217 int forced_fourcc; /* 2 channel LCDC must share fourcc setting */
220 /* -----------------------------------------------------------------------------
284 return chan->cfg->chan == LCDC_CHAN_SUBLCD; in lcdc_chan_is_sublcd()
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dam335x-brppt1-mmc.dts1 // SPDX-License-Identifier: GPL-2.0+
4 * http://www.br-automation.com
7 /dts-v1/;
15 fset: factory-settings {
16 bl-version = "ABCDEFGHIJKLMNOPQRSTUVWXYZ0123456890";
18 order-no = "6PPT30 (MMC)";
19 hw-revision = "ABCDEFGHIJKLMNOPQRSTUVWXYZ0123456890";
20 serial-no = "0";
21 device-id = <0x0>;
22 parent-id = <0x0>;
[all …]
H A Dam335x-brppt1-spi.dts1 // SPDX-License-Identifier: GPL-2.0+
4 * http://www.br-automation.com
7 /dts-v1/;
15 fset: factory-settings {
16 bl-version = "ABCDEFGHIJKLMNOPQRSTUVWXYZ0123456890";
18 order-no = "6PPT30 (SPI)";
19 hw-revision = "ABCDEFGHIJKLMNOPQRSTUVWXYZ0123456890";
20 serial-no = "0";
21 device-id = <0x0>;
22 parent-id = <0x0>;
[all …]
H A Dam335x-boneblack.dts2 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
8 /dts-v1/;
11 #include "am335x-bone-common.dtsi"
15 compatible = "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx";
17 stdout-path = &uart0;
18 tick-timer = &timer2;
23 regulator-min-microvolt = <1800000>;
24 regulator-max-microvolt = <1800000>;
25 regulator-always-on;
29 vmmc-supply = <&vmmcsd_fixed>;
[all …]
H A Dam335x-brppt1-nand.dts1 // SPDX-License-Identifier: GPL-2.0+
4 * http://www.br-automation.com
7 /dts-v1/;
15 fset: factory-settings {
16 bl-version = "ABCDEFGHIJKLMNOPQRSTUVWXYZ0123456890";
18 order-no = "6PPT30 (NAND)";
19 hw-revision = "ABCDEFGHIJKLMNOPQRSTUVWXYZ0123456890";
20 serial-no = "0";
21 device-id = <0x0>;
22 parent-id = <0x0>;
[all …]
H A Drk3288-miqi.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR X11
14 ext_gmac: external-gmac-clock {
15 compatible = "fixed-clock";
16 #clock-cells = <0>;
17 clock-frequency = <125000000>;
18 clock-output-names = "ext_gmac";
21 io_domains: io-domains {
22 compatible = "rockchip,rk3288-io-voltage-domain";
25 audio-supply = <&vcca_33>;
26 flash0-supply = <&vcc_flash>;
[all …]
/openbmc/linux/arch/arm/boot/dts/ti/omap/
H A Dam335x-myirtech-myd.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* SPDX-FileCopyrightText: Alexander Shiyan, <shc_work@mail.ru> */
4 /* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ */
6 /dts-v1/;
8 #include "am335x-myirtech-myc.dtsi"
10 #include <dt-bindings/display/tda998x.h>
11 #include <dt-bindings/input/input.h>
14 model = "MYIR MYD-AM335X";
15 compatible = "myir,myd-am335x", "myir,myc-am335x", "ti,am33xx";
18 stdout-path = &uart0;
[all …]
/openbmc/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6sx-udoo-neo.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
12 stdout-path = "serial0:115200n8";
16 compatible = "gpio-leds";
18 led-red {
19 label = "udoo-neo:red:mmc";
21 default-state = "off";
22 linux,default-trigger = "mmc0";
25 led-orange {
26 label = "udoo-neo:orange:user";
28 default-state = "keep";
[all …]
H A Dimx25-eukrea-mbimxsd25-baseboard-cmo-qvga.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
6 #include "imx25-eukrea-mbimxsd25-baseboard.dts"
9 model = "Eukrea MBIMXSD25 with the CMO-QVGA Display";
10 …compatible = "eukrea,mbimxsd25-baseboard-cmo-qvga", "eukrea,mbimxsd25-baseboard", "eukrea,cpuimx25…
13 model = "CMO-QVGA";
14 bits-per-pixel = <16>;
16 bus-width = <18>;
17 display-timings {
18 native-mode = <&qvga_timings>;
20 clock-frequency = <6500000>;
[all …]
H A Dimx25-pdk.dts1 // SPDX-License-Identifier: GPL-2.0+
5 /dts-v1/;
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
12 compatible = "fsl,imx25-pdk", "fsl,imx25";
19 reg_fec_3v3: regulator-0 {
20 compatible = "regulator-fixed";
21 regulator-name = "fec-3v3";
22 regulator-min-microvolt = <3300000>;
23 regulator-max-microvolt = <3300000>;
[all …]
/openbmc/linux/arch/arm/boot/dts/rockchip/
H A Drk3288-rock2-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 #include <dt-bindings/pwm/pwm.h>
12 emmc_pwrseq: emmc-pwrseq {
13 compatible = "mmc-pwrseq-emmc";
14 pinctrl-0 = <&emmc_reset>;
15 pinctrl-names = "default";
16 reset-gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_LOW>;
19 ext_gmac: external-gmac-clock {
20 compatible = "fixed-clock";
21 #clock-cells = <0>;
[all …]
H A Drk3288-firefly-reload-core.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/input/input.h>
16 ext_gmac: external-gmac-clock {
17 compatible = "fixed-clock";
18 #clock-cells = <0>;
19 clock-frequency = <125000000>;
20 clock-output-names = "ext_gmac";
24 vcc_flash: flash-regulator {
25 compatible = "regulator-fixed";
26 regulator-name = "vcc_flash";
[all …]
H A Drk3288-miqi.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include <dt-bindings/input/input.h>
15 stdout-path = "serial2:115200n8";
23 ext_gmac: external-gmac-clock {
24 compatible = "fixed-clock";
25 #clock-cells = <0>;
26 clock-frequency = <125000000>;
27 clock-output-names = "ext_gmac";
31 compatible = "gpio-leds";
[all …]
H A Drk3288-phycore-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device tree file for Phytec phyCORE-RK3288 SoM
8 #include <dt-bindings/net/ti-dp83867.h>
13 compatible = "phytec,rk3288-phycore-som", "rockchip,rk3288";
29 ext_gmac: external-gmac-clock {
30 compatible = "fixed-clock";
31 #clock-cells = <0>;
32 clock-frequency = <125000000>;
33 clock-output-names = "ext_gmac";
36 leds: user-leds {
[all …]
H A Drk3288-vyasa.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
10 model = "Amarula Vyasa-RK3288";
11 compatible = "amarula,vyasa-rk3288", "rockchip,rk3288";
14 stdout-path = &uart2;
22 dc12_vbat: dc12-vbat {
23 compatible = "regulator-fixed";
24 regulator-name = "dc12_vbat";
25 regulator-min-microvolt = <12000000>;
26 regulator-max-microvolt = <12000000>;
[all …]
H A Drk3288-popmetal.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2014, 2015 Andy Yan <andy.yan@rock-chips.com>
6 /dts-v1/;
7 #include <dt-bindings/input/input.h>
11 model = "PopMetal-RK3288";
12 compatible = "chipspark,popmetal-rk3288", "rockchip,rk3288";
19 ext_gmac: external-gmac-clock {
20 compatible = "fixed-clock";
21 clock-frequency = <125000000>;
22 clock-output-names = "ext_gmac";
[all …]
/openbmc/linux/drivers/soc/rockchip/
H A Dio-domain.c1 // SPDX-License-Identifier: GPL-2.0-only
26 * - If the voltage on a rail is above the "1.8" voltage (1.98V) we'll tell the
28 * - If the voltage on a rail is above the "3.3" voltage (3.6V) we'll consider
71 int (*write)(struct rockchip_iodomain_supply *supply, int uV);
79 int (*write)(struct rockchip_iodomain_supply *supply, int uV);
82 static int rk3568_iodomain_write(struct rockchip_iodomain_supply *supply, int uV) in rk3568_iodomain_write() argument
84 struct rockchip_iodomain *iod = supply->iod; in rk3568_iodomain_write()
89 switch (supply->idx) { in rk3568_iodomain_write()
93 b = supply->idx; in rk3568_iodomain_write()
95 b = supply->idx + 4; in rk3568_iodomain_write()
[all …]

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