Searched full:lcd_wr_n_pz3 (Results 1 – 15 of 15) sorted by relevance
/openbmc/linux/Documentation/devicetree/bindings/pinctrl/ |
H A D | nvidia,tegra30-pinmux.yaml | 83 sdmmc1_clk_pz0, sdmmc1_cmd_pz1, lcd_sdin_pz2, lcd_wr_n_pz3,
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/openbmc/linux/arch/arm/boot/dts/nvidia/ |
H A D | tegra30-asus-nexus7-grouper-common.dtsi | 610 lcd_wr_n_pz3 { 611 nvidia,pins = "lcd_wr_n_pz3";
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H A D | tegra30-colibri.dtsi | 157 "lcd_wr_n_pz3";
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H A D | tegra30-beaver.dts | 1420 lcd_wr_n_pz3 { 1421 nvidia,pins = "lcd_wr_n_pz3";
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H A D | tegra30-apalis-v1.1.dtsi | 781 "lcd_wr_n_pz3";
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H A D | tegra30-apalis.dtsi | 771 "lcd_wr_n_pz3";
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H A D | tegra30-asus-transformer-common.dtsi | 645 "lcd_wr_n_pz3";
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H A D | tegra30-ouya.dts | 1641 lcd_wr_n_pz3 { 1642 nvidia,pins = "lcd_wr_n_pz3";
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H A D | tegra30-pegatron-chagall.dts | 542 "lcd_wr_n_pz3",
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/openbmc/u-boot/arch/arm/mach-tegra/tegra30/ |
H A D | pinmux.c | 57 PIN(LCD_WR_N_PZ3, DISPLAYA, DISPLAYB, SPI5, HDCP),
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/openbmc/u-boot/board/nvidia/cardhu/ |
H A D | pinmux-config-cardhu.h | 133 DEFAULT_PINMUX(LCD_WR_N_PZ3, DISPLAYA, NORMAL, NORMAL, INPUT),
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/openbmc/u-boot/board/toradex/colibri_t30/ |
H A D | pinmux-config-colibri_t30.h | 134 DEFAULT_PINMUX(LCD_WR_N_PZ3, DISPLAYA, NORMAL, NORMAL, INPUT),
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/openbmc/u-boot/board/avionic-design/common/ |
H A D | pinmux-config-tamonten-ng.h | 168 DEFAULT_PINMUX(LCD_WR_N_PZ3, DISPLAYA, NORMAL, NORMAL, INPUT),
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/openbmc/u-boot/board/toradex/apalis_t30/ |
H A D | pinmux-config-apalis_t30.h | 136 DEFAULT_PINMUX(LCD_WR_N_PZ3, DISPLAYA, DOWN, TRISTATE, OUTPUT), /* NC */
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/openbmc/linux/drivers/pinctrl/tegra/ |
H A D | pinctrl-tegra30.c | 2374 …PINGROUP(lcd_wr_n_pz3, DISPLAYA, DISPLAYB, SPI5, HDCP, 0x3080, N, …
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