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/openbmc/openbmc/meta-yadro/meta-nicole/recipes-bsp/u-boot/files/
H A D0004-aspeed-add-bmc-position-support.patch14 arch/arm/mach-aspeed/ast-late-init.c | 21 +++++++++++++++++++++
17 diff --git a/arch/arm/mach-aspeed/ast-late-init.c b/arch/arm/mach-aspeed/ast-late-init.c
19 --- a/arch/arm/mach-aspeed/ast-late-init.c
20 +++ b/arch/arm/mach-aspeed/ast-late-init.c
H A D0001-Add-system-reset-status-support.patch18 arch/arm/mach-aspeed/ast-late-init.c | 114 ++++++++++++++++++++
21 create mode 100644 arch/arm/mach-aspeed/ast-late-init.c
55 +obj-$(CONFIG_BOARD_LATE_INIT) += ast-late-init.o
56 diff --git a/arch/arm/mach-aspeed/ast-late-init.c b/arch/arm/mach-aspeed/ast-late-init.c
60 +++ b/arch/arm/mach-aspeed/ast-late-init.c
/openbmc/linux/Documentation/arch/x86/
H A Dmicrocode.rst93 Late loading
107 Since kernel 5.19, late loading is not enabled by default.
111 Why is late loading dangerous?
188 Is the microcode suitable for late loading?
191 Late loading is done when the system is fully operational and running
192 real workloads. Late loading behavior depends on what the base patch on
208 for late-loading. This is another one of the problems that caused late
/openbmc/linux/arch/arm64/include/asm/
H A Dcpufeature.h161 * referred to as "Late CPU" w.r.t the capability. e.g, all secondary
162 * CPUs are treated "late CPUs" for capabilities determined by the boot
206 * b) Any late CPU, brought up after (1), the action is triggered via:
210 * 5) Conflicts: Based on the state of the capability on a late CPU vs.
214 * | Type | System | Late CPU |
268 * Is it permitted for a late CPU to have this capability when system
272 /* Is it safe for a late CPU to miss this capability when system has it */
281 * require the workaround. However, it is not safe if a "late" CPU
288 * feature. It is safe for a late CPU to have this feature even though
291 * then every late CPU must have it.
[all …]
/openbmc/linux/drivers/net/ethernet/sun/
H A Dsunqe.h69 #define CREG_STAT_LCOLL 0x02000000 /* Late TX Collision */
76 #define CREG_STAT_TXLERR 0x00040000 /* Late Transmit Error */
83 #define CREG_STAT_RLCOLL 0x00000100 /* RX Late Collision */
89 #define CREG_STAT_RXLERR 0x00000004 /* Receive Late Error */
104 #define CREG_QMASK_TXLERR 0x00040000 /* TX late error */
109 #define CREG_QMASK_RXLEERR 0x00000004 /* RX late error */
116 #define CREG_MMASK_LCOLL 0x02000000 /* Late collision error */
170 #define MREGS_TXFSTAT_LCOLL 0x20 /* TX late collision */
185 #define MREGS_RXFSTAT_LCOLL 0x40 /* RX late collision */
H A Dsunbmac.h60 #define CREG_STAT_TXLERR 0x00040000 /* Late Transmit Error */
66 #define CREG_STAT_RXLERR 0x00000004 /* Receive Late Error */
76 #define CREG_QMASK_TXLERR 0x00040000 /* TX late error */
81 #define CREG_QMASK_RXLEERR 0x00000004 /* RX late error */
108 #define BMAC_LTCTR 0x24cUL /* Transmit late-collision counter */
155 #define BIGMAC_STAT_LCCNTEXP 0x00002000 /* Late-collision counter expired */
172 #define BIGMAC_IMASK_LCCNTEXP 0x00002000 /* Late-collision counter expired */
H A Dsunhme.h49 #define GREG_STAT_LCCNTEXP 0x00002000 /* Late-collision counter expired */
55 #define GREG_STAT_RXLATERR 0x00080000 /* Late error during receive dma */
63 #define GREG_STAT_TXLERR 0x08000000 /* Late error during transmit dma */
86 #define GREG_IMASK_LCCNTEXP 0x00002000 /* Late-collision counter expired */
92 #define GREG_IMASK_RXLATERR 0x00080000 /* Late error during receive dma */
100 #define GREG_IMASK_TXLERR 0x08000000 /* Late error during transmit dma */
177 #define BMAC_LTCTR 0x24cUL /* Transmit late-collision counter */
/openbmc/linux/Documentation/mm/
H A Dhwpoison.rst69 late kill
72 Note some pages are always handled as late kill.
84 Set early/late kill mode/revert to system default
94 Late kill
/openbmc/u-boot/board/freescale/mpc8548cds/
H A Dddr.c23 * 0110 3/4 cycle late in fsl_ddr_board_options()
24 * 0111 7/8 cycle late in fsl_ddr_board_options()
/openbmc/u-boot/board/socrates/
H A Dddr.c23 * 0110 3/4 cycle late in fsl_ddr_board_options()
24 * 0111 7/8 cycle late in fsl_ddr_board_options()
/openbmc/u-boot/board/freescale/mpc8555cds/
H A Dddr.c23 * 0110 3/4 cycle late in fsl_ddr_board_options()
24 * 0111 7/8 cycle late in fsl_ddr_board_options()
/openbmc/u-boot/board/freescale/mpc8541cds/
H A Dddr.c23 * 0110 3/4 cycle late in fsl_ddr_board_options()
24 * 0111 7/8 cycle late in fsl_ddr_board_options()
/openbmc/u-boot/board/freescale/mpc8568mds/
H A Dddr.c23 * 0110 3/4 cycle late in fsl_ddr_board_options()
24 * 0111 7/8 cycle late in fsl_ddr_board_options()
/openbmc/u-boot/board/sbc8641d/
H A Dddr.c23 * 0110 3/4 cycle late in fsl_ddr_board_options()
24 * 0111 7/8 cycle late in fsl_ddr_board_options()
/openbmc/u-boot/board/freescale/mpc8544ds/
H A Dddr.c23 * 0110 3/4 cycle late in fsl_ddr_board_options()
24 * 0111 7/8 cycle late in fsl_ddr_board_options()
/openbmc/u-boot/board/freescale/mpc8610hpcd/
H A Dddr.c23 * 0110 3/4 cycle late in fsl_ddr_board_options()
24 * 0111 7/8 cycle late in fsl_ddr_board_options()
/openbmc/linux/drivers/acpi/acpica/
H A Ddsargs.c38 * DESCRIPTION: Late (deferred) execution of region or field arguments
140 * DESCRIPTION: Get buffer_field Buffer and Index. This implements the late
185 * DESCRIPTION: Get bank_field bank_value. This implements the late
238 * the late evaluation of these attributes.
282 * the late evaluation of these attributes.
327 * DESCRIPTION: Get region address and length. This implements the late
/openbmc/u-boot/board/freescale/mpc8536ds/
H A Dddr.c23 * 0110 3/4 cycle late in fsl_ddr_board_options()
24 * 0111 7/8 cycle late in fsl_ddr_board_options()
/openbmc/u-boot/board/freescale/mpc8569mds/
H A Dddr.c23 * 0110 3/4 cycle late in fsl_ddr_board_options()
24 * 0111 7/8 cycle late in fsl_ddr_board_options()
/openbmc/u-boot/board/xes/xpedite520x/
H A Dddr.c38 * 0110 3/4 cycle late in fsl_ddr_board_options()
39 * 0111 7/8 cycle late in fsl_ddr_board_options()
/openbmc/linux/drivers/net/ethernet/apple/
H A Dbmac.h64 # define TxLateCollExp 0x00002000 /* Late-collision counter expired */
70 # define RxDMALateErr 0x00080000 /* Receive DMA, data late */
78 # define TxDMALateError 0x08000000 /* Late error during transmit DMA */
119 #define LTCNT 0x530 /* Transmit late-collision counter */
/openbmc/linux/tools/perf/pmu-events/arch/arm64/ampere/emag/
H A Dcache.json108 "PublicDescription": "Level 1 data cache late miss",
111 "BriefDescription": "L1D cache late miss"
/openbmc/linux/Documentation/translations/zh_CN/mm/
H A Dhwpoison.rst79 设置early/late kill mode/revert 到系统默认值。
89 Late kill
/openbmc/u-boot/board/sbc8548/
H A Dddr.c24 * 0110 3/4 cycle late in fsl_ddr_board_options()
25 * 0111 7/8 cycle late in fsl_ddr_board_options()
/openbmc/u-boot/tools/binman/test/files/
H A D1.dat1 sorry I'm late

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