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/openbmc/linux/drivers/scsi/
H A D53c700.scr142 JUMP Finish, WHEN STATUS
143 JUMP SendIdentifyMsg, IF MSG_OUT
182 JUMP ResumeSendMessage
193 JUMP ReceiveExtendedMessage, IF EXTENDED_MSG
201 JUMP Receive1Byte, IF 0x01
202 JUMP Receive2Byte, IF 0x02
203 JUMP Receive3Byte, IF 0x03
204 JUMP Receive4Byte, IF 0x04
205 JUMP Receive5Byte, IF 0x05
241 JUMP SendMessage
[all …]
H A D53c700_d.h_shipped148 JUMP Finish, WHEN STATUS
152 JUMP SendIdentifyMsg, IF MSG_OUT
242 JUMP ResumeSendMessage
259 JUMP ReceiveExtendedMessage, IF EXTENDED_MSG
288 JUMP Receive1Byte, IF 0x01
292 JUMP Receive2Byte, IF 0x02
296 JUMP Receive3Byte, IF 0x03
300 JUMP Receive4Byte, IF 0x04
304 JUMP Receive5Byte, IF 0x05
403 JUMP SendMessage
[all …]
/openbmc/linux/arch/hexagon/kernel/
H A Dvm_vectors.S3 * Event jump tables
15 jump 1f;
16 jump 1f;
17 jump 1f;
18 jump 1f;
19 jump 1f;
21 jump 1f;
22 jump 1f;
28 jump 1b; /* Reset */
29 jump _K_enter_machcheck;
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/openbmc/linux/arch/hexagon/lib/
H A Dmemset.S42 if p1 jump 2f /* skip byte loop */
60 if !p0 jump 3f /* skip initial byte store */
73 if !p0 jump 4f /* skip initial half store */
86 if !p0 jump 5f /* skip initial word store */
99 if !p0 jump 7f /* skip double loop */
126 if !p0 jump 8f /* skip final word store */
137 if !p0 jump 9f /* skip final half store */
159 if (r2==#0) jump:nt .L1
164 if (p0.new) jump:nt .L3
179 if (!p0.new) jump:nt .L8
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/openbmc/linux/arch/hexagon/mm/
H A Dcopy_user_template.S20 if (!p0.new) jump:nt .Ldone
27 if (!p0.new) jump:nt .Loop_not_aligned_8
33 if (!p1) jump .Lsmall
47 jump .Lsmall
53 if (p0.new) jump:nt .Lalign
57 if (!p0.new) jump:nt .Loop_not_aligned_4
62 if (!p1) jump .Lsmall
77 jump .Lsmall
83 if (!p0.new) jump:nt .Loop_not_aligned
88 if (!p1) jump .Lsmall
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/openbmc/qemu/target/hexagon/imported/
H A Dbranch.idef20 /* Jump instructions */
31 Q6INSN(J2_jump,"jump #r22:2",ATTRIBS(A_JDIR), "direct unconditional jump",
34 Q6INSN(J2_jumpr,"jumpr Rs32",ATTRIBS(A_JINDIR), "indirect unconditional jump",
37 Q6INSN(J2_jumprh,"jumprh Rs32",ATTRIBS(A_JINDIR, A_HINTED_COF), "indirect unconditional jump",
46 OLDCOND_JUMP(J2_jump,"jump","#r15:2",ATTRIBS(A_CJOLDDIR),"direct conditional jump",
49 OLDCOND_JUMP(J2_jumpr,"jumpr","Rs32",ATTRIBS(A_JINDIROLD),"indirect conditional jump",
58 NEWCOND_JUMP(J2_jump,"jump","#r15:2",ATTRIBS(A_CJNEWDIR,A_ARCHV2),"direct conditional jump",
61 NEWCOND_JUMP(J2_jumpr,"jumpr","Rs32",ATTRIBS(A_JINDIRNEW,A_ARCHV3),"indirect conditional jump",
66 Q6INSN(J4_hintjumpr,"hintjr(Rs32)",ATTRIBS(A_JINDIR),"hint indirect conditional jump",
73 Q6INSN(J2_jumprz,"if (Rs32!=#0) jump:nt #r13:2",ATTRIBS(A_CJNEWDIR,A_ARCHV3),"direct conditional ju…
[all …]
/openbmc/linux/tools/objtool/arch/x86/
H A Dspecial.c49 * There are 3 basic jump table patterns:
54 * jump table which is stored in .rodata.
61 * As part of an optimization, GCC makes a copy of an existing switch jump
62 * table, modifies it, and then hard-codes the jump (albeit with an indirect
63 * jump) to use a single entry in the table. The rest of the jump table and
64 * some of its jump targets remain as dead code.
84 * ensure the same register is used in the mov and jump instructions.
110 * symbol. GCC jump tables are anonymous data. in arch_find_switch_table()
112 * Also support C jump tables which are in the same format as in arch_find_switch_table()
113 * switch jump tables. For objtool to recognize them, they in arch_find_switch_table()
/openbmc/qemu/tests/tcg/hexagon/
H A Dtest_bitcnt.S20 p0 = cmp.eq(r2, #23); if (p0.new) jump:t test2
21 jump fail
29 p0 = cmp.eq(r2, #55); if (p0.new) jump:t test3
30 jump fail
38 p0 = cmp.eq(r2, #1); if (p0.new) jump:t pass
39 jump fail
H A Dtest_cmp.S8 jump signed
18 p0 = cmp.lt(r0, r1); if (p0.new) jump:t unsigned
19 jump fail
29 p0 = cmp.gtu(r0, r1); if (p0.new) jump:t pass
30 jump fail
H A Dtest_bitsplit.S14 p0 = cmp.eq(r2, #3); if (p0.new) jump:t test2
15 jump fail
20 p0 = cmp.eq(r3, #23); if (p0.new) jump:t pass
21 jump fail
H A Dtest_vpmpyh.S20 p0 = cmp.eq(r0, #184945412); if (p0.new) jump:t test2
21 jump fail
26 p0 = cmp.eq(r1, #262150); if (p0.new) jump:t pass
27 jump fail
H A Dsignal_context.c61 " jump 3f\n\t" in main()
63 " jump 4f\n\t" in main()
67 " if (!p0) jump 2b\n\t" in main()
70 " if (!p0) jump 2b\n\t" in main()
73 " if (!p0) jump 2b\n\t" in main()
76 " if (!p0) jump 2b\n\t" in main()
H A Dtest_round.S18 p0 = cmp.eq(r2, #13); if (p0.new) jump:t test2
19 jump fail
27 p0 = cmp.eq(r2, #12); if (p0.new) jump:t pass
28 jump fail
H A Dtest_vavgw.S23 p0 = cmp.eq(r0, #2); if (p0.new) jump:t test2
24 jump fail
29 p0 = cmp.eq(r1, #2); if (p0.new) jump:t pass
30 jump fail
H A Dtest_fibonacci.S11 p0 = cmp.gt(r2, #0); if (!p0.new) jump:nt .LBB0_3
22 p0 = cmp.gt(r2, r5); if (p0.new) jump:nt .LBB0_2
28 p0 = cmp.eq(r3, #144); if (p0.new) jump:t pass
29 jump fail
H A Dtest_reorder.S4 * Here we perform a jump that skips the code resetting R2 from 0xDEADBEEF to 0,
20 if (p0.new) jump:nt skip
31 p0 = cmp.eq(r2, #-559038737); if (p0.new) jump:t pass
32 jump fail
H A Dtest_lsr.S18 p0 = cmp.eq(r0, #0x28); if (p0.new) jump:t test2
19 jump fail
34 p0 = cmp.eq(r0, #0x5); if (p0.new) jump:t pass
35 jump fail
/openbmc/linux/drivers/net/ethernet/chelsio/cxgb4/
H A Dcxgb4_tc_u32_parse.h242 * field's value to jump to next header such as IHL field
247 /* location of jump to make */
248 const struct cxgb4_match_field *jump; member
251 /* Accept a rule with a jump to transport layer header based on IHL field in
256 /* TCP Jump */
268 .jump = cxgb4_tcp_fields,
271 /* UDP Jump */
283 .jump = cxgb4_udp_fields,
285 { .jump = NULL },
288 /* Accept a rule with a jump directly past the 40 Bytes of IPv6 fixed header
[all …]
/openbmc/linux/arch/hexagon/include/asm/
H A Dspinlock.h33 " { if (!P3) jump 1b; }\n" in arch_read_lock()
35 " { if (!P3) jump 1b; }\n" in arch_read_lock()
49 " if (!P3) jump 1b;\n" in arch_read_unlock()
64 " { if (!P3) jump 1f; }\n" in arch_read_trylock()
81 " { if (!P3) jump 1b; }\n" in arch_write_lock()
83 " { if (!P3) jump 1b; }\n" in arch_write_lock()
97 " { if (!P3) jump 1f; }\n" in arch_write_trylock()
120 " { if (!P3) jump 1b; R6 = #1; }\n" in arch_spin_lock()
122 " { if (!P3) jump 1b; }\n" in arch_spin_lock()
142 " { if (!P3) jump 1f; R6 = #1; %0 = #0; }\n" in arch_spin_trylock()
/openbmc/u-boot/doc/
H A DREADME.standalone4 1. The functions are exported by U-Boot via a jump table. The jump
6 (common/exports.c). Other routines may also modify the jump table,
7 however. The jump table can be accessed as the 'jt' field of the
8 'global_data' structure. The struct members for the jump table are
21 2. The pointer to the jump table is passed to the application in a
111 language are stub functions that perform the jump through the jump
/openbmc/linux/samples/seccomp/
H A Dbpf-fancy.c40 SYSCALL(__NR_write, JUMP(&l, write_fd)), in main()
41 SYSCALL(__NR_read, JUMP(&l, read)), in main()
55 JEQ(STDOUT_FILENO, JUMP(&l, write_buf)), in main()
56 JEQ(STDERR_FILENO, JUMP(&l, write_buf)), in main()
61 JEQ((unsigned long)msg1, JUMP(&l, msg1_len)), in main()
62 JEQ((unsigned long)msg2, JUMP(&l, msg2_len)), in main()
63 JEQ((unsigned long)buf, JUMP(&l, buf_len)), in main()
/openbmc/linux/Documentation/staging/
H A Dstatic-keys.rst88 'no-op' in the straight-line codepath with a 'jump' instruction to the
93 This lowlevel patching mechanism is called 'jump label patching', and it gives
180 4) Architecture level code patching interface, 'jump labels'
185 simply fall back to a traditional, load, test, and jump sequence. Also, the
208 5) Static keys / jump label analysis, results (x86_64):
228 The resulting instructions with jump labels generated by GCC is::
248 Without the jump label optimization it looks like::
272 Thus, the disable jump label case adds a 'mov', 'test' and 'jne' instruction
273 vs. the jump label case just has a 'no-op' or 'jmp 0'. (The jmp 0, is patched
274 to a 5 byte atomic no-op instruction at boot-time.) Thus, the disabled jump
[all …]
/openbmc/u-boot/arch/x86/cpu/i386/
H A Dcall64.S54 * Setup for the jump to 64bit mode
56 * When the jump is performed we will be in long mode but
58 * (and in turn EFER.LMA = 1). To jump into 64bit mode we use
61 * used to perform that far jump. See the gdt below.
73 /* Jump from 32bit compatibility mode into 64bit mode. */
80 jmp *%eax /* Jump to the 64-bit target */
/openbmc/linux/drivers/net/ethernet/intel/ixgbe/
H A Dixgbe_model.h83 /* match criteria to make this jump*/
87 /* location of jump to make */
88 struct ixgbe_mat_field *jump; member
93 .off = 8, .val = 0x600, .mask = 0xff00, .jump = ixgbe_tcp_fields},
95 .off = 8, .val = 0x1100, .mask = 0xff00, .jump = ixgbe_udp_fields},
96 { .jump = NULL } /* terminal node */
/openbmc/u-boot/arch/arm/mach-exynos/
H A Dsec_boot.S42 * Jump address for resume and flag to check for resume/reset:
46 * Jump address for cluster switching:
49 * Jump address for core hotplug:
52 * Jump address for C2 state (Reserved for future not being used right now):
69 * Step-2: If it's a resume then continue, else jump to step 4.
70 * Step-3: Clear inform1 PMU register and jump to inform0 value.
73 * Step-6: If address is available, jump to that address.

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