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Searched +full:input +full:- +full:schmitt +full:- +full:disable (Results 1 – 11 of 11) sorted by relevance

/openbmc/u-boot/doc/device-tree-bindings/pinctrl/
H A Dpinctrl-bindings.txt4 such as pull-up/down, tri-state, drive-strength etc are designated as pin
15 need to reconfigure pins at run-time, for example to tri-state pins when the
47 pinctrl-0: List of phandles, each pointing at a pin configuration
65 pinctrl-1: List of phandles, each pointing at a pin configuration
68 pinctrl-n: List of phandles, each pointing at a pin configuration
70 pinctrl-names: The list of names to assign states. List entry 0 defines the
78 pinctrl-names = "active", "idle";
79 pinctrl-0 = <&state_0_node_a>;
80 pinctrl-1 = <&state_1_node_a &state_1_node_b>;
85 pinctrl-0 = <&state_0_node_a>;
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H A Datmel,at91-pio4-pinctrl.txt7 - compatible: "atmel,sama5d2-pinctrl".
8 - reg: base address and length of the PIO controller.
10 Please refer to pinctrl-bindings.txt in this directory for details of the
23 - pinmux: integer array. Each integer represents a pin number plus mux and
24 ioset settings. Use the macros from boot/dts/<soc>-pinfunc.h file to get the
28 - GENERIC_PINCONFIG: generic pinconfig options to use, bias-disable,
29 bias-pull-down, bias-pull-up, drive-open-drain, input-schmitt-enable,
30 input-debounce.
34 #include <sama5d2-pinfunc.h>
39 cs-gpios = <&pioA 17 0>, <0>, <0>, <0>;
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/openbmc/u-boot/arch/arm/mach-at91/include/mach/
H A Dat91_pio.h1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * [origin: Linux kernel include/asm-arm/arch-at91/at91_pio.h]
9 * Parallel I/O Controller (PIO) - System peripherals registers.
40 u32 pdr; /* 0x04 PIO Disable Register */
44 u32 odr; /* 0x14 Output Disable Registerr */
47 u32 ifer; /* 0x20 Input Filter Enable Register */
48 u32 ifdr; /* 0x24 Input Filter Disable Register */
49 u32 ifsr; /* 0x28 Input Filter Status Register */
56 u32 idr; /* 0x44 Interrupt Disable Register */
59 u32 mder; /* 0x50 Multi-driver Enable Register */
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/openbmc/u-boot/drivers/pinctrl/
H A Dpinctrl-at91-pio4.c1 // SPDX-License-Identifier: GPL-2.0+
29 { "bias-disable", PIN_CONFIG_BIAS_DISABLE, 0 },
30 { "bias-pull-up", PIN_CONFIG_BIAS_PULL_UP, 1 },
31 { "bias-pull-down", PIN_CONFIG_BIAS_PULL_DOWN, 1 },
32 { "drive-open-drain", PIN_CONFIG_DRIVE_OPEN_DRAIN, 0 },
33 { "input-schmitt-disable", PIN_CONFIG_INPUT_SCHMITT_ENABLE, 0 },
34 { "input-schmitt-enable", PIN_CONFIG_INPUT_SCHMITT_ENABLE, 1 },
35 { "input-debounce", PIN_CONFIG_INPUT_DEBOUNCE, 0 },
46 if (!fdt_get_property(blob, node, params->property, NULL)) in atmel_pinctrl_get_pinconf()
49 param = params->param; in atmel_pinctrl_get_pinconf()
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H A Dpinctrl-at91.c1 // SPDX-License-Identifier: GPL-2.0+
67 * struct at91_pinctrl_mux_ops - describes an AT91 mux ops group
76 * @set_deglitch: enable/disable the deglitch feature.
77 * @set_debounce: enable/disable the debounce feature.
78 * @set_pulldown: enable/disable the pulldown feature.
79 * @disable_schmitt_trig: disable schmitt trigger
100 ? pin - MAX_NB_GPIO_PER_BANK/2 : pin); in two_bit_pin_value_shift_amount()
105 writel(mask, &pio->idr); in at91_mux_disable_interrupt()
111 writel(mask, &pio->mux.pio3.ppddr); in at91_mux_set_pullup()
113 writel(mask, (on ? &pio->puer : &pio->pudr)); in at91_mux_set_pullup()
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/openbmc/u-boot/include/dt-bindings/pinctrl/
H A Dpinctrl-tegra.h1 /* SPDX-License-Identifier: GPL-2.0 */
14 * Enable/disable for diffeent dt properties. This is applicable for
15 * properties nvidia,enable-input, nvidia,tristate, nvidia,open-drain,
16 * nvidia,lock, nvidia,rcv-sel, nvidia,high-speed-mode, nvidia,schmitt.
/openbmc/u-boot/include/dm/
H A Dpinctrl.h1 /* SPDX-License-Identifier: GPL-2.0+ */
13 * struct pinconf_param - pin config parameters
27 * struct pinctrl_ops - pin control operations, to be implemented by
47 * in this driver. (necessary for pin-muxing)
50 * certain device to. (necessary for pin-muxing)
54 * may be ignored. (necessary for pin-muxing against a single pin)
59 * (necessary for pin-muxing against a pin group)
60 * @pinconf_num_params: number of driver-specific parameters to be parsed
61 * from device trees (necessary for pin-configuration)
63 * device trees (necessary for pin-configuration)
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/openbmc/u-boot/drivers/gpio/
H A Dat91_gpio.c1 // SPDX-License-Identifier: GPL-2.0+
52 writel(mask, &at91_port->puer); in at91_set_port_pullup()
54 writel(mask, &at91_port->pudr); in at91_set_port_pullup()
55 writel(mask, &at91_port->per); in at91_set_port_pullup()
78 writel(mask, &at91_port->idr); in at91_set_pio_periph()
80 writel(mask, &at91_port->per); in at91_set_pio_periph()
96 writel(mask, &at91_port->idr); in at91_set_a_periph()
98 writel(mask, &at91_port->mux.pio2.asr); in at91_set_a_periph()
99 writel(mask, &at91_port->pdr); in at91_set_a_periph()
115 writel(mask, &at91_port->idr); in at91_set_b_periph()
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/openbmc/u-boot/drivers/pinctrl/mediatek/
H A Dpinctrl-mtk-common.c1 // SPDX-License-Identifier: GPL-2.0
9 #include <dm/device-internal.h>
13 #include <asm-generic/gpio.h>
15 #include "pinctrl-mtk-common.h"
18 * struct mtk_drive_desc - the structure that holds the information
25 * formula: output = ((input) / step - 1) * scal
49 __raw_writel(val, priv->base + reg); in mtk_w32()
56 return __raw_readl(priv->base + reg); in mtk_r32()
63 order = fls(count) - 1; in get_count_order()
64 if (count & (count - 1)) in get_count_order()
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/openbmc/u-boot/arch/arm/include/asm/arch-tegra/
H A Dpinmux.h1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * (C) Copyright 2010-2014
76 /* Defines a pin group cfg's low-power mode select */
82 PMUX_LPMD_NONE = -1,
91 PMUX_SCHMT_NONE = -1,
96 /* Defines whether a pin group cfg's high-speed mode is enabled or not */
100 PMUX_HSM_NONE = -1,
116 u32 io:2; /* input or output PMUX_PIN_... */
119 u32 lock:2; /* lock enable/disable PMUX_PIN... */
122 u32 od:2; /* open-drain or push-pull driver */
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/openbmc/u-boot/drivers/pinctrl/rockchip/
H A Dpinctrl-rockchip-core.c1 // SPDX-License-Identifier: GPL-2.0+
13 #include "pinctrl-rockchip.h"
22 struct rockchip_pin_ctrl *ctrl = priv->ctrl; in rockchip_verify_config()
24 if (bank >= ctrl->nr_banks) { in rockchip_verify_config()
25 debug("pin conf bank %d >= nbanks %d\n", bank, ctrl->nr_banks); in rockchip_verify_config()
26 return -EINVAL; in rockchip_verify_config()
32 return -EINVAL; in rockchip_verify_config()
41 struct rockchip_pinctrl_priv *priv = bank->priv; in rockchip_get_recalced_mux()
42 struct rockchip_pin_ctrl *ctrl = priv->ctrl; in rockchip_get_recalced_mux()
46 for (i = 0; i < ctrl->niomux_recalced; i++) { in rockchip_get_recalced_mux()
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