| /openbmc/bmcweb/redfish-core/include/registries/ |
| H A D | openbmc_message_registry.readmefirst.md | 25 require an increment to the subminor revision. Changes to existing messages
26 require an increment to the patch version. If the copyright year is different
27 than the current date, increment it when the version is changed.
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| /openbmc/qemu/include/qemu/ |
| H A D | lockcnt.h | 44 * qemu_lockcnt_inc: increment a QemuLockCnt's counter
48 * to finish and increment lockcnt's count to 1. If the count
49 * is not zero, just increment it.
108 * qemu_lockcnt_inc_and_unlock: combined unlock/increment on a QemuLockCnt.
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| /openbmc/u-boot/arch/xtensa/include/asm/ |
| H A D | asmmacro.h | 34 * inc increment
40 * inc_log2 increment [in log2]
52 * inc increment
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| /openbmc/u-boot/arch/arm/cpu/armv7/ |
| H A D | cache_v7_asm.S | 46 clz r5, r4 @ find bit position of way size increment
64 add r10, r10, #2 @ increment cache number
116 clz r5, r4 @ find bit position of way size increment
134 add r10, r10, #2 @ increment cache number
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| /openbmc/u-boot/arch/arm/include/asm/arch-lpc32xx/ |
| H A D | dma.h | 30 #define DMAC_CHAN_DEST_AUTOINC (1 << 27) /* automatic destination increment */
31 #define DMAC_CHAN_SRC_AUTOINC (1 << 26) /* automatic source increment */
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| /openbmc/u-boot/arch/x86/include/asm/acpi/ |
| H A D | globutil.asl | 56 Increment(Local4)
92 Increment(Local2)
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| /openbmc/u-boot/arch/x86/include/asm/ |
| H A D | atomic.h | 69 * atomic_inc - increment atomic variable
93 * atomic_inc_short - increment of a short integer
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| /openbmc/u-boot/drivers/net/phy/ |
| H A D | ti.c | 82 #define MII_MMD_CTRL_NOINCR 0x4000 /* no post increment */
83 #define MII_MMD_CTRL_INCR_RDWT 0x8000 /* post increment on reads & writes */
84 #define MII_MMD_CTRL_INCR_ON_WT 0xC000 /* post increment on writes only */
145 /* Select the Function : DATA with no post increment */ in phy_read_mmd_indirect()
178 /* Select the Function : DATA with no post increment */ in phy_write_mmd_indirect()
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| /openbmc/u-boot/include/ |
| H A D | bootcount.h | 28 * set() - set a bootcount value (e.g. to reset or increment)
121 /* Only increment bootcount when no bootcount support in SPL */ in bootcount_inc()
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| H A D | MCD_dma.h | 271 * lastSrcAddr - the most-recent or last, post-increment source address
272 * lastDestAddr - the most-recent or last, post-increment destination address
297 * destAddr - the amount to increment the source address per transfer
299 * dmaSize - the amount to increment the destination address per transfer
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| /openbmc/u-boot/drivers/ddr/marvell/axp/ |
| H A D | ddr3_read_leveling.c | 378 * there was match - dont increment in overrun()
500 …DEBUG_RL_FULL_S("DDR3 - Read Leveling - So we will not increment the delay to see if locked again\… in ddr3_read_leveling_single_cs_rl_mode()
502 …DEBUG_RL_FULL_S("DDR3 - Read Leveling - repeat_max_cnt reached max so now we will increment the de… in ddr3_read_leveling_single_cs_rl_mode()
509 * and don't increment the delays in ddr3_read_leveling_single_cs_rl_mode()
523 /* Increment Delay */ in ddr3_read_leveling_single_cs_rl_mode()
597 * phase = 0, need to increment rd_sample_dly in ddr3_read_leveling_single_cs_rl_mode()
893 /* if pup is in not in final state but there was match - dont increment counter */ in ddr3_read_leveling_single_cs_window_mode()
927 …DEBUG_RL_FULL_S("DDR3 - Read Leveling - So we will not increment the delay to see if locked again\… in ddr3_read_leveling_single_cs_window_mode()
929 …DEBUG_RL_FULL_S("DDR3 - Read Leveling - repeat_max_cnt reached max so now we will increment the de… in ddr3_read_leveling_single_cs_window_mode()
936 * and don't increment the delays in ddr3_read_leveling_single_cs_window_mode()
[all …]
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| /openbmc/openbmc/meta-openembedded/meta-oe/recipes-support/dc/files/ |
| H A D | run-ptest | 18 # If the test failed, increment the number of failed tests
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| /openbmc/qemu/hw/audio/ |
| H A D | fmopl.h | 51 uint32_t fc; /* Freq. Increment base */
77 uint32_t FN_TABLE[1024]; /* fnumber -> increment counter */
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| /openbmc/u-boot/lib/zlib/ |
| H A D | inftrees.c | 80 from their more natural integer increment ordering, and so when the in inflate_table()
237 /* backwards increment the len-bit code huff */ in inflate_table()
261 /* increment past last table */ in inflate_table()
290 len is equal to curr + drop, so there is no loop needed to increment in inflate_table()
309 /* backwards increment the len-bit code huff */ in inflate_table()
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| H A D | inffast.c | 15 /* Allow machine dependent optimization for post-increment or pre-increment.
17 Pre-increment preferred for:
20 Post-increment preferred for:
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| /openbmc/qemu/include/hw/gpio/ |
| H A D | pca9552_regs.h | 27 * Bit [4] is used to activate the Auto-Increment option of the
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| /openbmc/openbmc/meta-ibm/recipes-extended/pam/libpam/pam.d/ |
| H A D | common-auth | 18 # Control gets here when no authentication module succeeds. Increment the
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| /openbmc/qemu/hw/timer/ |
| H A D | sse-timer.c | 26 * The timer also has a separate auto-increment timer. When this
33 * When the auto-increment timer is enabled, interrupt generation
192 /* Auto-increment the AIVAL, and set the timer accordingly */ in sse_autoinc()
334 /* Auto-increment toggled on/off */ in sse_timer_write()
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| /openbmc/entity-manager/docs/ |
| H A D | address_size_detection_modes.md | 74 …`All decisions on auto-increment or decrement of previously accessed memory locations, etc., are t…
80 Based on this, the others EEPROM (not ONSEMI EEPROM) auto-increment - observed
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| /openbmc/qemu/hw/core/ |
| H A D | qdev-clock.c | 171 * However object_property_add_link does not increment it since it in qdev_alias_clock()
172 * doesn't know the linked object. Increment it here to ensure the in qdev_alias_clock()
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| /openbmc/openbmc-test-automation/ipmi/ |
| H A D | test_ipmi_poh_counter.robot | 101 # the poh counter reading should not increment.
122 # the pon counter reading should increment by 1.
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| /openbmc/u-boot/arch/arm/mach-uniphier/arm32/ |
| H A D | arm-mpcore.h | 45 /* Auto-increment Register */
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| /openbmc/openbmc/meta-phosphor/recipes-extended/pam/libpam/pam.d/ |
| H A D | common-auth | 14 # Control gets here when no authentication module succeeds. Increment the
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| /openbmc/u-boot/arch/arm/mach-at91/armv7/ |
| H A D | timer.c | 32 * Those registers increment at 1/16 the main clock rate.
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| /openbmc/u-boot/arch/arm/mach-at91/arm926ejs/ |
| H A D | timer.c | 29 * Those registers increment at 1/16 the main clock rate.
|