Home
last modified time | relevance | path

Searched full:i2cr (Results 1 – 16 of 16) sorted by relevance

/openbmc/linux/drivers/fsi/
H A Dfsi-master-i2cr.c11 #include "fsi-master-i2cr.h"
137 int fsi_master_i2cr_read(struct fsi_master_i2cr *i2cr, u32 addr, u64 *data) in fsi_master_i2cr_read() argument
142 mutex_lock(&i2cr->lock); in fsi_master_i2cr_read()
144 ret = i2cr_transfer(i2cr->client, command, data); in fsi_master_i2cr_read()
148 ret = i2cr_check_status(i2cr->client); in fsi_master_i2cr_read()
152 trace_i2cr_read(i2cr->client, command, data); in fsi_master_i2cr_read()
155 mutex_unlock(&i2cr->lock); in fsi_master_i2cr_read()
160 int fsi_master_i2cr_write(struct fsi_master_i2cr *i2cr, u32 addr, u64 data) in fsi_master_i2cr_write() argument
168 mutex_lock(&i2cr->lock); in fsi_master_i2cr_write()
170 ret = i2c_master_send(i2cr->client, (const char *)buf, sizeof(buf)); in fsi_master_i2cr_write()
[all …]
H A Di2cr-scom.c11 #include "fsi-master-i2cr.h"
17 struct fsi_master_i2cr *i2cr; member
44 ret = fsi_master_i2cr_read(scom->i2cr, (u32)*offset, &data); in i2cr_scom_read()
69 ret = fsi_master_i2cr_write(scom->i2cr, (u32)*offset, data); in i2cr_scom_write()
98 scom->i2cr = to_fsi_master_i2cr(fsi_dev->slave->master); in i2cr_scom_probe()
129 { .compatible = "ibm,i2cr-scom" },
H A DKconfig70 behind an IBM I2C Responder (I2CR) chip. The I2CR is an I2C device
102 I2CR has the capability to directly perform SCOM operations instead
H A DMakefile7 obj-$(CONFIG_FSI_MASTER_I2CR) += fsi-master-i2cr.o
12 obj-$(CONFIG_I2CR_SCOM) += i2cr-scom.o
H A Dfsi-master-i2cr.h22 int fsi_master_i2cr_read(struct fsi_master_i2cr *i2cr, u32 addr, u64 *data);
23 int fsi_master_i2cr_write(struct fsi_master_i2cr *i2cr, u32 addr, u64 data);
/openbmc/linux/arch/arm/boot/dts/aspeed/
H A Dibm-power10-quad.dtsi7 i2cr@20 {
8 compatible = "ibm,i2cr-fsi-master";
20 compatible = "ibm,i2cr-scom";
35 i2cr@20 {
36 compatible = "ibm,i2cr-fsi-master";
48 compatible = "ibm,i2cr-scom";
63 i2cr@20 {
64 compatible = "ibm,i2cr-fsi-master";
76 compatible = "ibm,i2cr-scom";
91 i2cr@20 {
[all …]
H A Dibm-power11-quad.dtsi154 compatible = "ibm,i2cr-fsi-master";
166 compatible = "ibm,i2cr-scom";
184 compatible = "ibm,i2cr-fsi-master";
196 compatible = "ibm,i2cr-scom";
214 compatible = "ibm,i2cr-fsi-master";
226 compatible = "ibm,i2cr-scom";
244 compatible = "ibm,i2cr-fsi-master";
256 compatible = "ibm,i2cr-scom";
274 compatible = "ibm,i2cr-fsi-master";
286 compatible = "ibm,i2cr-scom";
[all …]
H A Daspeed-bmc-ibm-everest.dts2585 i2cr@20 {
2586 compatible = "ibm,i2cr-fsi-master";
2598 compatible = "ibm,i2cr-scom";
2617 i2cr@20 {
2618 compatible = "ibm,i2cr-fsi-master";
2630 compatible = "ibm,i2cr-scom";
2649 i2cr@20 {
2650 compatible = "ibm,i2cr-fsi-master";
2662 compatible = "ibm,i2cr-scom";
2681 i2cr@20 {
[all …]
H A Daspeed-bmc-ibm-fuji.dts2524 compatible = "ibm,i2cr-fsi-master";
2536 compatible = "ibm,i2cr-scom";
2554 compatible = "ibm,i2cr-fsi-master";
2566 compatible = "ibm,i2cr-scom";
2584 compatible = "ibm,i2cr-fsi-master";
2596 compatible = "ibm,i2cr-scom";
2614 compatible = "ibm,i2cr-fsi-master";
2626 compatible = "ibm,i2cr-scom";
2644 compatible = "ibm,i2cr-fsi-master";
2656 compatible = "ibm,i2cr-scom";
[all …]
/openbmc/linux/Documentation/devicetree/bindings/fsi/
H A Dibm,i2cr-fsi-master.yaml4 $id: http://devicetree.org/schemas/fsi/ibm,i2cr-fsi-master.yaml#
13 The I2C Responder (I2CR) is a an I2C device that's connected to an FSI CFAM
14 (see fsi.txt). The I2CR translates I2C bus operations to FSI CFAM reads and
20 - ibm,i2cr-fsi-master
37 i2cr@20 {
38 compatible = "ibm,i2cr-fsi-master";
/openbmc/qemu/hw/i2c/
H A Dimx_i2c.c49 return "I2CR"; in imx_i2c_get_regname()
61 return s->i2cr & I2CR_IEN; in imx_i2c_is_enabled()
66 return s->i2cr & I2CR_IIEN; in imx_i2c_interrupt_is_enabled()
71 return s->i2cr & I2CR_MSTA; in imx_i2c_is_master()
85 s->i2cr = I2CR_RESET; in imx_i2c_reset()
117 value = s->i2cr; in imx_i2c_read()
133 } else if (s->i2cr & I2CR_MTX) { in imx_i2c_read()
186 s->i2cr = value & I2CR_MASK; in imx_i2c_write()
205 if (s->i2cr & I2CR_RSTA) { /* Restart */ in imx_i2c_write()
210 s->i2cr &= ~I2CR_RSTA; in imx_i2c_write()
[all …]
/openbmc/u-boot/drivers/i2c/
H A Dmxc_i2c.c45 #define I2CR 2 macro
184 writeb(I2CR_IDIS, base + (I2CR << reg_shift)); in bus_i2c_set_bus_speed()
211 __func__, sr, readb(base + (I2CR << reg_shift)), in wait_for_sr_state()
223 sr, readb(base + (I2CR << reg_shift)), state); in wait_for_sr_state()
263 unsigned int temp = readb(base + (I2CR << reg_shift)); in i2c_imx_stop()
266 writeb(temp, base + (I2CR << reg_shift)); in i2c_imx_stop()
290 ret = readb(base + (I2CR << reg_shift)) & I2CR_IDIS; in i2c_init_transfer_()
292 ret = !(readb(base + (I2CR << reg_shift)) & I2CR_IEN); in i2c_init_transfer_()
295 writeb(I2CR_IEN, base + (I2CR << reg_shift)); in i2c_init_transfer_()
308 temp = readb(base + (I2CR << reg_shift)); in i2c_init_transfer_()
[all …]
/openbmc/qemu/include/hw/i2c/
H A Dimx_i2c.h82 uint16_t i2cr; member
/openbmc/linux/drivers/i2c/busses/
H A Di2c-imx.c109 * 2) I2CR: I2C module enable operation also differ between SoCs:
/openbmc/linux/
H A Dopengrok0.0.log[all...]
H A Dopengrok1.0.log[all...]