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/openbmc/linux/Documentation/devicetree/bindings/phy/
H A Dallwinner,sun9i-a80-usb-phy.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/phy/allwinner,sun9i-a80-usb-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A80 USB PHY
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
14 "#phy-cells":
18 const: allwinner,sun9i-a80-usb-phy
25 - maxItems: 1
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H A Dqcom,usb-hsic-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/qcom,usb-hsic-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm USB HSIC PHY Controller
10 - Bjorn Andersson <andersson@kernel.org>
11 - Vinod Koul <vkoul@kernel.org>
16 - enum:
17 - qcom,usb-hsic-phy-mdm9615
18 - qcom,usb-hsic-phy-msm8974
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H A Dmarvell,mmp3-hsic-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/phy/marvell,mmp3-hsic-phy.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Marvell MMP3 HSIC PHY
11 - Lubomir Rintel <lkundrak@v3.sk>
15 const: marvell,mmp3-hsic-phy
21 "#phy-cells":
25 - compatible
26 - reg
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H A Dnvidia,tegra124-xusb-padctl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/nvidia,tegra124-xusb-padctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
22 super-speed USB. Other lanes are for various types of low-speed, full-speed
23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
24 contains a software-configurable mux that sits between the I/O controller
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H A Dnvidia,tegra186-xusb-padctl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/nvidia,tegra186-xusb-padctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
22 super-speed USB. Other lanes are for various types of low-speed, full-speed
23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
24 contains a software-configurable mux that sits between the I/O controller
[all …]
H A Dnvidia,tegra210-xusb-padctl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/nvidia,tegra210-xusb-padctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
22 super-speed USB. Other lanes are for various types of low-speed, full-speed
23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
24 contains a software-configurable mux that sits between the I/O controller
[all …]
H A Dpxa1928-usb-phy.txt1 * Marvell PXA1928 USB and HSIC PHYs
4 - compatible: "marvell,pxa1928-usb-phy" or "marvell,pxa1928-hsic-phy"
5 - reg: base address and length of the registers
6 - clocks - A single clock. From common clock binding.
7 - #phys-cells: should be 0. From common phy binding.
8 - resets: reference to the reset controller
12 usbphy: phy@7000 {
13 compatible = "marvell,pxa1928-usb-phy";
16 #phy-cells = <0>;
/openbmc/linux/drivers/phy/marvell/
H A Dphy-pxa-28nm-hsic.c1 // SPDX-License-Identifier: GPL-2.0-only
20 #include <linux/phy/phy.h>
42 struct phy *phy; member
56 static int mv_hsic_phy_init(struct phy *phy) in mv_hsic_phy_init() argument
58 struct mv_hsic_phy *mv_phy = phy_get_drvdata(phy); in mv_hsic_phy_init()
59 struct platform_device *pdev = mv_phy->pdev; in mv_hsic_phy_init()
60 void __iomem *base = mv_phy->base; in mv_hsic_phy_init()
63 clk_prepare_enable(mv_phy->clk); in mv_hsic_phy_init()
76 /* Make sure PHY PLL is locked */ in mv_hsic_phy_init()
80 dev_err(&pdev->dev, "HSIC PHY PLL not locked after 100mS."); in mv_hsic_phy_init()
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H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 # Phy drivers for Marvell platforms
6 bool "Armada 375 USB cluster PHY support" if COMPILE_TEST
12 tristate "Marvell Berlin SATA PHY driver"
17 Enable this to support the SATA PHY on Marvell Berlin SoCs.
20 tristate "Marvell Berlin USB PHY Driver"
25 Enable this to support the USB PHY on Marvell Berlin SoCs.
46 Enable this to support Marvell A3700 UTMI PHY driver.
76 Enable this to support Marvell CP110 UTMI PHY driver.
85 tristate "Marvell USB HSIC 28nm PHY Driver"
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H A Dphy-mmp3-hsic.c1 // SPDX-License-Identifier: GPL-2.0+
10 #include <linux/phy/phy.h>
17 static int mmp3_hsic_phy_init(struct phy *phy) in mmp3_hsic_phy_init() argument
19 void __iomem *base = (void __iomem *)phy_get_drvdata(phy); in mmp3_hsic_phy_init()
36 { .compatible = "marvell,mmp3-hsic-phy", },
43 struct device *dev = &pdev->dev; in mmp3_hsic_phy_probe()
46 struct phy *phy; in mmp3_hsic_phy_probe() local
52 phy = devm_phy_create(dev, NULL, &mmp3_hsic_phy_ops); in mmp3_hsic_phy_probe()
53 if (IS_ERR(phy)) { in mmp3_hsic_phy_probe()
54 dev_err(dev, "failed to create PHY\n"); in mmp3_hsic_phy_probe()
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H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 obj-$(CONFIG_ARMADA375_USBCLUSTER_PHY) += phy-armada375-usb2.o
3 obj-$(CONFIG_PHY_BERLIN_SATA) += phy-berlin-sata.o
4 obj-$(CONFIG_PHY_BERLIN_USB) += phy-berlin-usb.o
5 obj-$(CONFIG_PHY_MMP3_USB) += phy-mmp3-usb.o
6 obj-$(CONFIG_PHY_MMP3_HSIC) += phy-mmp3-hsic.o
7 obj-$(CONFIG_PHY_MVEBU_A3700_COMPHY) += phy-mvebu-a3700-comphy.o
8 obj-$(CONFIG_PHY_MVEBU_A3700_UTMI) += phy-mvebu-a3700-utmi.o
9 obj-$(CONFIG_PHY_MVEBU_A38X_COMPHY) += phy-armada38x-comphy.o
10 obj-$(CONFIG_PHY_MVEBU_CP110_COMPHY) += phy-mvebu-cp110-comphy.o
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/openbmc/linux/drivers/phy/tegra/
H A Dxusb-tegra124.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/phy/phy.h>
229 mutex_lock(&padctl->lock); in tegra124_xusb_padctl_enable()
231 if (padctl->enable++ > 0) in tegra124_xusb_padctl_enable()
251 mutex_unlock(&padctl->lock); in tegra124_xusb_padctl_enable()
259 mutex_lock(&padctl->lock); in tegra124_xusb_padctl_disable()
261 if (WARN_ON(padctl->enable == 0)) in tegra124_xusb_padctl_disable()
264 if (--padctl->enable > 0) in tegra124_xusb_padctl_disable()
284 mutex_unlock(&padctl->lock); in tegra124_xusb_padctl_disable()
297 return -ENODEV; in tegra124_usb3_save_context()
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H A Dxusb.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2014-2022, NVIDIA CORPORATION. All rights reserved.
12 #include <linux/phy/phy.h>
13 #include <linux/phy/tegra/xusb.h>
24 static struct phy *tegra_xusb_pad_of_xlate(struct device *dev, in tegra_xusb_pad_of_xlate()
28 struct phy *phy = NULL; in tegra_xusb_pad_of_xlate() local
31 if (args->args_count != 0) in tegra_xusb_pad_of_xlate()
32 return ERR_PTR(-EINVAL); in tegra_xusb_pad_of_xlate()
34 for (i = 0; i < pad->soc->num_lanes; i++) { in tegra_xusb_pad_of_xlate()
35 if (!pad->lanes[i]) in tegra_xusb_pad_of_xlate()
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H A Dxusb-tegra210.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2014-2020, NVIDIA CORPORATION. All rights reserved.
15 #include <linux/phy/phy.h>
27 ((x) ? (11 + ((x) - 1) * 6) : 0)
451 for (map = tegra210_usb3_map; map->type; map++) { in tegra210_usb3_lane_map()
452 if (map->index == lane->index && in tegra210_usb3_lane_map()
453 strcmp(map->type, lane->pad->soc->name) == 0) { in tegra210_usb3_lane_map()
454 dev_dbg(lane->pad->padctl->dev, "lane = %s map to port = usb3-%d\n", in tegra210_usb3_lane_map()
455 lane->pad->soc->lanes[lane->index].name, map->port); in tegra210_usb3_lane_map()
456 return map->port; in tegra210_usb3_lane_map()
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/openbmc/linux/Documentation/devicetree/bindings/mfd/
H A Domap-usb-host.txt5 - compatible: should be "ti,usbhs-host"
6 - reg: should contain one register range i.e. start and length
7 - ti,hwmods: must contain "usb_host_hs"
11 - num-ports: number of USB ports. Usually this is automatically detected
15 - portN-mode: String specifying the port mode for port N, where N can be
18 "ehci-phy",
19 "ehci-tll",
20 "ehci-hsic",
21 "ohci-phy-6pin-datse0",
22 "ohci-phy-6pin-dpdm",
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/openbmc/linux/drivers/phy/samsung/
H A Dphy-exynos5250-usb2.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Samsung SoC USB 1.1/2.0 PHY driver - Exynos 5250 support
11 #include <linux/phy/phy.h>
13 #include "phy-samsung-usb2.h"
15 /* Exynos USB PHY registers */
139 * can be written to the phy register.
168 return -EINVAL; in exynos5250_rate_to_clk()
176 struct samsung_usb2_phy_driver *drv = inst->drv; in exynos5250_isol()
180 if (drv->cfg == &exynos5250_usb2_phy_config && in exynos5250_isol()
181 inst->cfg->id == EXYNOS5250_DEVICE) in exynos5250_isol()
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/openbmc/linux/drivers/phy/qualcomm/
H A Dphy-qcom-usb-hsic.c1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <linux/phy/phy.h>
10 #include <linux/pinctrl/pinctrl-state.h>
19 struct phy *phy; member
26 static int qcom_usb_hsic_phy_power_on(struct phy *phy) in qcom_usb_hsic_phy_power_on() argument
28 struct qcom_usb_hsic_phy *uphy = phy_get_drvdata(phy); in qcom_usb_hsic_phy_power_on()
29 struct ulpi *ulpi = uphy->ulpi; in qcom_usb_hsic_phy_power_on()
33 ret = clk_prepare_enable(uphy->phy_clk); in qcom_usb_hsic_phy_power_on()
37 ret = clk_prepare_enable(uphy->cal_clk); in qcom_usb_hsic_phy_power_on()
41 ret = clk_prepare_enable(uphy->cal_sleep_clk); in qcom_usb_hsic_phy_power_on()
[all …]
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 # Phy drivers for Qualcomm and Atheros platforms
6 tristate "Atheros AR71XX/9XXX USB PHY driver"
12 Enable this to support the USB PHY on Atheros AR71XX/9XXX SoCs.
15 tristate "Qualcomm APQ8064 SATA SerDes/PHY driver"
22 tristate "Qualcomm eDP PHY driver"
28 Enable this driver to support the Qualcomm eDP PHY found in various
32 tristate "Qualcomm IPQ4019 USB PHY driver"
36 Support for the USB PHY-s on Qualcomm IPQ40xx SoC-s.
39 tristate "Qualcomm IPQ806x SATA SerDes/PHY driver"
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/openbmc/linux/Documentation/devicetree/bindings/usb/
H A Dusb.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Greg Kroah-Hartman <gregkh@linuxfoundation.org>
22 phy-names:
24 Name specifier for the USB PHY
26 usb-phy:
27 $ref: /schemas/types.yaml#/definitions/phandle-array
36 UTMI+ PHY with an 8- or 16-bit interface if UTMI+ is selected, UTMI+ low
37 pin interface if ULPI is specified, Serial core/PHY interconnect if
[all …]
H A Dci-hdrc-usb2.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/usb/ci-hdrc-usb2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Xu Yang <xu.yang_2@nxp.com>
11 - Peng Fan <peng.fan@nxp.com>
16 - enum:
17 - chipidea,usb2
18 - lsi,zevio-usb
19 - nuvoton,npcm750-udc
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/openbmc/linux/drivers/pinctrl/tegra/
H A Dpinctrl-tegra-xusb.c1 // SPDX-License-Identifier: GPL-2.0-only
10 #include <linux/phy/phy.h>
20 #include <dt-bindings/pinctrl/pinctrl-tegra-xusb.h>
23 #include "../pinctrl-utils.h"
91 struct phy *phys[2];
99 writel(value, padctl->regs + offset); in padctl_writel()
105 return readl(padctl->regs + offset); in padctl_readl()
112 return padctl->soc->num_pins; in tegra_xusb_padctl_get_groups_count()
120 return padctl->soc->pins[group].name; in tegra_xusb_padctl_get_group_name()
129 * For the tegra-xusb pad controller groups are synonymous in tegra_xusb_padctl_get_group_pins()
[all …]
/openbmc/linux/drivers/usb/chipidea/
H A Dci_hdrc_msm.c1 // SPDX-License-Identifier: GPL-2.0
13 #include <linux/reset-controller.h>
44 bool hsic; member
52 void __iomem *addr = ci_msm->base; in ci_hdrc_msm_por_reset()
81 struct device *dev = ci->dev->parent; in ci_hdrc_msm_notify_event()
90 if (msm_ci->secondary_phy) { in ci_hdrc_msm_notify_event()
91 u32 val = readl_relaxed(msm_ci->base + HS_PHY_SEC_CTRL); in ci_hdrc_msm_notify_event()
93 writel_relaxed(val, msm_ci->base + HS_PHY_SEC_CTRL); in ci_hdrc_msm_notify_event()
96 ret = phy_init(ci->phy); in ci_hdrc_msm_notify_event()
100 ret = phy_power_on(ci->phy); in ci_hdrc_msm_notify_event()
[all …]
/openbmc/linux/drivers/clk/sunxi-ng/
H A Dccu-sun9i-a80-usb.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2016 Chen-Yu Tsai. All rights reserved.
7 #include <linux/clk-provider.h>
15 #include "ccu-sun9i-a80-usb.h"
25 static SUNXI_CCU_GATE_DATA(bus_hci0_clk, "bus-hci0", clk_parent_bus, 0x0, BIT(1), 0);
26 static SUNXI_CCU_GATE_DATA(usb_ohci0_clk, "usb-ohci0", clk_parent_hosc, 0x0, BIT(2), 0);
27 static SUNXI_CCU_GATE_DATA(bus_hci1_clk, "bus-hci1", clk_parent_bus, 0x0, BIT(3), 0);
28 static SUNXI_CCU_GATE_DATA(bus_hci2_clk, "bus-hci2", clk_parent_bus, 0x0, BIT(5), 0);
29 static SUNXI_CCU_GATE_DATA(usb_ohci2_clk, "usb-ohci2", clk_parent_hosc, 0x0, BIT(6), 0);
31 static SUNXI_CCU_GATE_DATA(usb0_phy_clk, "usb0-phy", clk_parent_hosc, 0x4, BIT(1), 0);
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/openbmc/linux/drivers/phy/allwinner/
H A Dphy-sun9i-usb.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Allwinner sun9i USB phy driver
5 * Copyright (C) 2014-2015 Chen-Yu Tsai <wens@csie.org>
7 * Based on phy-sun4i-usb.c from
18 #include <linux/phy/phy.h>
29 /* usb1 HSIC specific bits */
36 struct phy *phy; member
44 static void sun9i_usb_phy_passby(struct sun9i_usb_phy *phy, int enable) in sun9i_usb_phy_passby() argument
52 if (phy->type == USBPHY_INTERFACE_MODE_HSIC) in sun9i_usb_phy_passby()
56 reg_value = readl(phy->pmu); in sun9i_usb_phy_passby()
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/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Dnvidia,tegra124-xusb-padctl.txt7 needed for USB. For the new binding, see ../phy/nvidia,tegra-xusb-padctl.txt.
12 associated PHY that must be powered up before the pad can be used.
14 This document defines the device-specific binding for the XUSB pad controller.
16 Refer to pinctrl-bindings.txt in this directory for generic information about
17 pin controller device tree bindings and ../phy/phy-bindings.txt for details on
21 --------------------
22 - compatible: For Tegra124, must contain "nvidia,tegra124-xusb-padctl".
23 Otherwise, must contain '"nvidia,<chip>-xusb-padctl",
24 "nvidia-tegra124-xusb-padctl"', where <chip> is tegra132 or tegra210.
25 - reg: Physical base address and length of the controller's registers.
[all …]

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