| /openbmc/linux/Documentation/timers/ |
| H A D | highres.rst | 2 High resolution timers and dynamic ticks design notes
8 https://www.kernel.org/doc/ols/2006/ols2006v1-pages-333-346.pdf
11 http://www.cs.columbia.edu/~nahum/w6998/papers/ols2006-hrtimers-slides.pdf
23 - hrtimer base infrastructure
24 - timeofday and clock source management
25 - clock event management
26 - high resolution timer functionality
27 - dynamic ticks
31 ---------------------------
40 - time ordered enqueueing into a rb-tree
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| /openbmc/phosphor-dbus-interfaces/yaml/xyz/openbmc_project/Inventory/Item/ |
| H A D | Dimm.interface.yaml | 4 - name: MemoryDataWidth
8 - name: MemorySizeInKB
12 - name: MemoryDeviceLocator
16 - name: MemoryType
20 - name: MemoryTypeDetail
24 - name: MaxMemorySpeedInMhz
28 - name: MemoryAttributes
33 - name: MemoryConfiguredSpeedInMhz
37 - name: ECC
40 Error-Correcting Code.
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| /openbmc/linux/Documentation/driver-api/i3c/ |
| H A D | protocol.rst | 1 .. SPDX-License-Identifier: GPL-2.0
17 https://resources.mipi.org/mipi-i3c-v1-download).
22 The I3C (pronounced 'eye-three-see') is a MIPI standardized protocol designed
25 while remaining power-efficient.
42 I3C is a multi-master protocol, so there might be several masters on a bus,
46 Each device on the I3C bus has to be assigned a dynamic address to be able to
51 In addition to these per-device addresses, the protocol defines a broadcast
54 Once a dynamic address has been assigned to a device, this address will be used
56 assigned a dynamic address, the device should still process broadcast messages.
65 The discovery mechanism is called DAA (Dynamic Address Assignment), because it
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| /openbmc/openbmc/meta-openembedded/meta-oe/conf/ |
| H A D | layer.conf | 5 # Therefore if you want a given layer to be considered high priority
15 BBFILES += "${LAYERDIR}/recipes-*/*/*.bb ${LAYERDIR}/recipes-*/*/*.bbappend"
17 BBFILE_COLLECTIONS += "openembedded-layer"
18 BBFILE_PATTERN_openembedded-layer := "^${LAYERDIR}/"
24 BBFILE_PRIORITY_openembedded-layer = "5"
29 meta-python:${LAYERDIR}/dynamic-layers/meta-python/recipes-*/*/*.bb \
30 meta-python:${LAYERDIR}/dynamic-layers/meta-python/recipes-*/*/*.bbappend \
31 multimedia-layer:${LAYERDIR}/dynamic-layers/multimedia-layer/recipes-*/*/*.bb \
32 multimedia-layer:${LAYERDIR}/dynamic-layers/multimedia-layer/recipes-*/*/*.bbappend \
33 networking-layer:${LAYERDIR}/dynamic-layers/networking-layer/recipes-*/*/*.bb \
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| /openbmc/linux/arch/powerpc/kernel/ |
| H A D | tau_6xx.c | 1 // SPDX-License-Identifier: GPL-2.0
8 * dynamic power management to limit peak CPU temp (using ICTC)
39 unsigned char high; member
46 * dynamic adjustment to minimize # of interrupts */
63 mtspr(SPRN_THRM2, THRM1_THRES(tau[cpu].high) | THRM1_V | maybe_tie); in set_thresholds()
78 tau[cpu].low -= step_size; in TAUupdate()
79 tau[cpu].high -= (step_size - window_expand); in TAUupdate()
88 if (tau[cpu].high <= 127 - step_size) { in TAUupdate()
89 tau[cpu].low += (step_size - window_expand); in TAUupdate()
90 tau[cpu].high += step_size; in TAUupdate()
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| H A D | reloc_32.S | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Code to process dynamic relocations for PPC32.
8 * - Based on ppc64 code - reloc_64.S
13 /* Dynamic section table entry tags */
23 R_PPC_ADDR16_HA = 6 /* High Adjusted (S+A) */
37 lwz r11, (p_dyn - 0b)(r12)
38 add r11, r11, r12 /* runtime address of .dynamic section */
39 lwz r9, (p_rela - 0b)(r12)
41 lwz r10, (p_st - 0b)(r12)
43 lwz r13, (p_sym - 0b)(r12)
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| /openbmc/linux/Documentation/devicetree/bindings/i3c/ |
| H A D | i3c.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexandre Belloni <alexandre.belloni@bootlin.com>
11 - Miquel Raynal <miquel.raynal@bootlin.com>
20 pattern: "^i3c-master@[0-9a-f]+$"
22 "#address-cells":
27 All I3C devices are supposed to support DAA (Dynamic Address Assignment),
36 specific I3C dynamic address before the DAA takes place (so that other
37 devices on the bus can't take this dynamic address).
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| /openbmc/linux/Documentation/driver-api/thermal/ |
| H A D | cpu-cooling-api.rst | 22 --------------------------------------------
30 "thermal-cpufreq-%x". This api can support multiple instances of cpufreq
42 the name "thermal-cpufreq-%x" linking it with a device tree node, in
54 This interface function unregisters the "thermal-cpufreq-%x" cooling device.
62 CPUs. The current power is calculated as dynamic power (static power isn't
63 supported currently). This power model requires that the operating-points of
70 The dynamic power consumption of a processor depends on many factors.
73 - The time the processor spends running, consuming dynamic power, as
74 compared to the time in idle states where dynamic consumption is
76 - The voltage and frequency levels as a result of DVFS. The DVFS
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| /openbmc/u-boot/include/ |
| H A D | elf.h | 1 /* SPDX-License-Identifier: BSD-3-Clause */
15 /* This version doesn't work for 64-bit ABIs - Erik */
24 /* 64-bit ELF base types */
57 #define ELFCLASS32 1 /* 32-bit objs */
58 #define ELFCLASS64 2 /* 64-bit objs */
63 #define ELFDATA2LSB 1 /* Little-Endian */
64 #define ELFDATA2MSB 2 /* Big-Endian */
69 #define ELFOSABI_HPUX 1 /* Hewlett-Packard HP-UX */
79 /* 64-255 Architecture-specific value range */
99 Elf32_Word e_flags; /* processor-specific flags */
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| /openbmc/linux/Documentation/devicetree/bindings/interrupt-controller/ |
| H A D | snps,archs-idu-intc.txt | 1 * ARC-HS Interrupt Distribution Unit
4 for dynamic IRQ routing, load balancing of common/external IRQs towards core
9 - compatible: "snps,archs-idu-intc"
10 - interrupt-controller: This is an interrupt controller.
11 - #interrupt-cells: Must be <1> or <2>.
18 - bits[3:0] trigger type and level flags
19 1 = low-to-high edge triggered
20 2 = NOT SUPPORTED (high-to-low edge triggered)
21 4 = active high level-sensitive <<< DEFAULT
22 8 = NOT SUPPORTED (active low level-sensitive)
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| /openbmc/linux/tools/testing/selftests/drivers/net/mlxsw/ |
| H A D | qos_ets_strict.sh | 2 # SPDX-License-Identifier: GPL-2.0
8 # them. In H3, we expect to see (almost) exclusively the high-priority traffic.
13 # +---------------------------+ +-----------------------------+
17 # | e-qos-map 0:1 | | | | e-qos-map 0:2 |
20 # +-----------------|---------+ +---------|-------------------+
22 # +-----------------|-------------------------------------|-------------------+
25 # | +---------------|-----------+ +----------|----------------+ |
29 # | +---------------|-----------+ +----------|----------------+ |
34 # | | ETS: (up n->tc n for n in 0..7) |
36 # +------------------------------------|--------------------------------------+
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| /openbmc/linux/tools/power/cpupower/bench/ |
| H A D | README-BENCH | 1 This is cpufreq-bench, a microbenchmark for the cpufreq framework.
7 - Identify worst case performance loss when doing dynamic frequency
9 - Identify average reaction time of a governor to CPU load changes
10 - (Stress) Testing whether a cpufreq low level driver or governor works
12 - Identify cpufreq related performance regressions between kernels
13 - Possibly Real time priority testing? -> what happens if there are
15 - ...
18 - Power saving related regressions (In fact as better the performance
21 - Real world (workloads)
27 cpufreq-bench helps to test the condition of a given cpufreq governor.
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| /openbmc/linux/drivers/cpufreq/ |
| H A D | pmac32-cpufreq.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2002 - 2005 Benjamin Herrenschmidt <benh@kernel.crashing.org>
41 * init/main.c to make it non-init before enabling DEBUG_FREQ
50 * Currently, PowerMac cpufreq supports only high & low frequencies
120 /* tweak L2 for high voltage */ in cpu_750fx_cpu_speed()
254 * the above didn't re-enable the DEC */ in pmu_set_cpu_speed()
270 save_l3cr = _get_L3CR(); /* (returns -1 if not available) */ in pmu_set_cpu_speed()
271 save_l2cr = _get_L2CR(); /* (returns -1 if not available) */ in pmu_set_cpu_speed()
299 switch_mmu_context(NULL, current->active_mm, NULL); in pmu_set_cpu_speed()
310 * as soon as interrupts are re-enabled and the generic in pmu_set_cpu_speed()
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| /openbmc/linux/Documentation/devicetree/bindings/display/exynos/ |
| H A D | exynos_dp.txt | 5 -dp-controller node
6 -dptx-phy node(defined inside dp-controller node)
8 For the DP-PHY initialization, we use the dptx-phy node.
9 Required properties for dptx-phy: deprecated, use phys and phy-names
10 -reg: deprecated
12 -samsung,enable-mask: deprecated
13 The bit-mask used to enable/disable DP PHY.
15 For the Panel initialization, we read data from dp-controller node.
16 Required properties for dp-controller:
17 -compatible:
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| /openbmc/linux/include/linux/mfd/ |
| H A D | ac100.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2016 Chen-Yu Tsai
7 * Chen-Yu Tsai <wens@csie.org>
84 /* ADC digital audio processing (high pass filter & auto gain control */
91 #define AC100_ADC_DAP_L_H_A_C 0x86 /* Left High Avg. Coef */
93 #define AC100_ADC_DAP_R_H_A_C 0x88 /* Right High Avg. Coef */
100 #define AC100_ADC_DAP_L_H_N_A_C 0x8f /* Left High Noise Avg. Coef */
102 #define AC100_ADC_DAP_R_H_N_A_C 0x91 /* Right High Noise Avg. Coef */
104 #define AC100_ADC_DAP_H_HPF_C 0x93 /* High High-Pass-Filter Coef */
105 #define AC100_ADC_DAP_L_HPF_C 0x94 /* Low High-Pass-Filter Coef */
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| /openbmc/linux/Documentation/devicetree/bindings/sound/ |
| H A D | cirrus,cs42l42.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - patches@opensource.cirrus.com
13 The CS42L42 is a low-power audio codec designed for portable applications.
14 It provides a high-dynamic range, stereo DAC for audio playback and a mono
15 high-dynamic-range ADC for audio capture. There is an integrated headset
21 - cirrus,cs42l42
22 - cirrus,cs42l83
29 VP-supply:
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| /openbmc/openbmc/poky/meta/recipes-support/sqlite/ |
| H A D | sqlite3.inc | 2 DESCRIPTION = "A library that implements a small, fast, self-contained, high-reliability, full-feat…
16 S = "${WORKDIR}/sqlite-autoconf-${SQLITE_PV}"
19 UPSTREAM_CHECK_REGEX = "releaselog/(?P<pver>(\d+[\.\-_]*)+)\.html"
27 PACKAGECONFIG:class-native ?= "fts4 fts5 rtree dyn_ext"
29 PACKAGECONFIG[editline] = "--enable-editline,--disable-editline,libedit"
30 PACKAGECONFIG[readline] = "--enable-readline,--disable-readline,readline ncurses"
31 PACKAGECONFIG[fts3] = "--enable-fts3,--disable-fts3"
32 PACKAGECONFIG[fts4] = "--enable-fts4,--disable-fts4"
33 PACKAGECONFIG[fts5] = "--enable-fts5,--disable-fts5"
34 PACKAGECONFIG[rtree] = "--enable-rtree,--disable-rtree"
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| /openbmc/linux/tools/testing/selftests/gpio/ |
| H A D | gpio-mockup.sh | 1 #!/bin/bash -efu
2 # SPDX-License-Identifier: GPL-2.0
7 #4: skip test - including run as non-root user
13 module="gpio-mockup"
29 echo "$0 [-frv] [-t type]"
30 echo "-f: full test (minimal set run by default)"
31 echo "-r: test random lines as well as fence posts"
32 echo "-t: interface type:"
33 echo " cdev (character device ABI) - default"
36 echo "-v: verbose progress reporting"
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| /openbmc/linux/include/linux/platform_data/ |
| H A D | i2c-mux-gpio.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * i2c-mux-gpio interface to platform code
12 #define I2C_MUX_GPIO_NO_IDLE ((unsigned)-1)
15 * struct i2c_mux_gpio_platform_data - Platform-dependent data for i2c-mux-gpio
17 * @base_nr: Base I2C bus number to number adapters from or zero for dynamic
18 * @values: Array of bitmasks of GPIO settings (low/high) for each
21 * @classes: Optional I2C auto-detection classes
|
| /openbmc/u-boot/doc/device-tree-bindings/clock/ |
| H A D | rockchip,rk3288-dmc.txt | 1 Rockchip Dynamic Memory Controller Driver
3 - compatible: "rockchip,rk3288-dmc", "syscon"
4 - rockchip,cru: this driver should access cru regs, so need get cru here
5 - rockchip,grf: this driver should access grf regs, so need get grf here
6 - rockchip,pmu: this driver should access pmu regs, so need get pmu here
7 - rockchip,sgrf: this driver should access sgrf regs, so need get sgrf here
8 - rockchip,noc: this driver should access noc regs, so need get noc here
9 - reg: dynamic ram protocol controller(PCTL) address and phy controller(PHYCTL) address
10 - clock: must include clock specifiers corresponding to entries in the clock-names property.
11 - clock-output-names: from common clock binding to override the default output clock name
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| /openbmc/linux/Documentation/ABI/testing/ |
| H A D | sysfs-bus-i3c | 1 What: /sys/bus/i3c/devices/i3c-<bus-id>
3 Contact: linux-i3c@vger.kernel.org
5 An I3C bus. This directory will contain one sub-directory per
8 What: /sys/bus/i3c/devices/i3c-<bus-id>/current_master
10 Contact: linux-i3c@vger.kernel.org
12 Expose the master that owns the bus (<bus-id>-<master-pid>) at
17 What: /sys/bus/i3c/devices/i3c-<bus-id>/mode
19 Contact: linux-i3c@vger.kernel.org
21 I3C bus mode. Can be "pure", "mixed-fast" or "mixed-slow". See
25 What: /sys/bus/i3c/devices/i3c-<bus-id>/i3c_scl_frequency
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| /openbmc/linux/drivers/soc/rockchip/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
13 special additional settings registers for a lot of soc-components.
31 In order to meet high performance and low power requirements, a power
41 Describe the hierarchy for the Dynamic Thermal Power Management tree
|
| /openbmc/u-boot/drivers/ddr/marvell/axp/ |
| H A D | ddr3_write_leveling.c | 1 // SPDX-License-Identifier: GPL-2.0
59 * Args: freq - current sequence frequency
60 * dram_info - main struct
70 /* Debug message - Start Read leveling procedure */ in ddr3_write_leveling_hw()
71 DEBUG_WL_S("DDR3 - Write Leveling - Starting HW WL procedure\n"); in ddr3_write_leveling_hw()
74 /* Dynamic pad issue (BTS669) during WL */ in ddr3_write_leveling_hw()
86 reg |= (dram_info->cs_ena << (REG_DRAM_TRAINING_CS_OFFS)); in ddr3_write_leveling_hw()
87 reg_write(REG_DRAM_TRAINING_ADDR, reg); /* 0x15B0 - Training Register */ in ddr3_write_leveling_hw()
103 * Read results to arrays - Results are required for WL in ddr3_write_leveling_hw()
104 * High freq Supplement and DQS Centralization in ddr3_write_leveling_hw()
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| /openbmc/u-boot/doc/ |
| H A D | README.N1213 | 7 - 16-/32-bit mixable instruction format.
8 - 32 general-purpose 32-bit registers.
9 - 8-stage pipeline.
10 - Dynamic branch prediction.
11 - 32/64/128/256 BTB.
12 - Return address stack (RAS).
13 - Vector interrupts for internal/external.
15 - 3 HW-level nested interruptions.
16 - User and super-user mode support.
17 - Memory-mapped I/O.
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| /openbmc/linux/Documentation/mm/damon/ |
| H A D | design.rst | 1 .. SPDX-License-Identifier: GPL-2.0
13 - Operations Set: Implements fundamental operations for DAMON that depends on
14 the given monitoring target address-space and available set of
16 - Core: Implements core logics including monitoring overhead/accurach control
17 and access-aware system operations on top of the operations set layer, and
18 - Modules: Implements kernel modules for various purposes that provides
23 ---------------------------
45 --------------------
66 VMA-based Target Address Range Construction
67 -------------------------------------------
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