/openbmc/linux/Documentation/hwmon/ |
H A D | amc6821.rst | 58 pwm1_auto_point1_pwm ro Hardwired to 0, shared for both 62 pwm1_auto_point3_pwm rw Hardwired to 255, shared for both 65 temp1_auto_point1_temp ro Hardwired to temp2_auto_point1_temp
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H A D | adm1025.rst | 44 One specificity of this chip is that the pin 11 can be hardwired in two 49 register can be used to define how the chip is hardwired. Please note that
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/openbmc/linux/drivers/clk/versatile/ |
H A D | clk-icst.c | 75 * r is hardwired to 22 and output divider s is hardwired to 1 in vco_get() 90 * and always zero, r is hardwired to 46, and the output divider is in vco_get() 91 * hardwired to 3 (divide by 4) according to the document in vco_get() 105 * to select between two different hardwired values: setting the in vco_get() 122 * r is hardwired to 22 and the output divider s is accessible in vco_get()
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/openbmc/linux/Documentation/devicetree/bindings/leds/ |
H A D | richtek,rt8515.yaml | 59 is hardwired to the component using the RFS resistor to 71 is hardwired to the component using the RTS resistor to
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/openbmc/linux/include/sound/ |
H A D | max9768.h | 12 * @shdn_gpio: GPIO to SHDN pin. If not valid, pin must be hardwired HIGH
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/openbmc/openpower-hw-diags/analyzer/plugins/ |
H A D | p10-plugins.cpp | 74 // Clock 0 is hardwired to proc 0. in lpc_timeout_callout() 80 // Clock 1 is hardwired to proc 1. in lpc_timeout_callout()
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/openbmc/linux/Documentation/devicetree/bindings/sound/ |
H A D | adi,adau7002.yaml | 22 hardwired to always on.
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H A D | adi,ssm2518.yaml | 29 it is assumed that the nSD pin is hardwired to always on.
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H A D | serial-midi.yaml | 16 or other connector, or to a known hardwired MIDI controller. This device must be a
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/openbmc/linux/tools/testing/selftests/alsa/conf.d/ |
H A D | Lenovo_ThinkPad_P1_Gen2.conf | 8 # The sysfs root directory (/sys) is hardwired in the test code
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/openbmc/u-boot/arch/powerpc/cpu/mpc8xx/ |
H A D | speed.c | 25 * work, we return the hardwired value. in get_clocks()
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/openbmc/linux/Documentation/devicetree/bindings/mailbox/ |
H A D | amlogic,meson-gxbb-mhu.yaml | 16 MHU links are hardwired on a platform. A link raises interrupt for any
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/openbmc/linux/arch/sparc/kernel/ |
H A D | iommu_common.h | 32 * This is the hardwired shift in the iotlb tag/data parts.
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/openbmc/linux/tools/testing/selftests/rcutorture/doc/ |
H A D | TREE_RCU-kconfig.txt | 14 CONFIG_PROVE_RCU -- Hardwired to CONFIG_PROVE_LOCKING.
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/openbmc/linux/Documentation/devicetree/bindings/interrupt-controller/ |
H A D | mstar,mst-intc.yaml | 36 lines that are hardwired to mstar interrupt controller.
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/openbmc/linux/Documentation/devicetree/bindings/net/can/ |
H A D | tcan4x5x.txt | 24 - reset-gpios: Hardwired output GPIO. If not defined then software
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/openbmc/u-boot/arch/arm/include/asm/arch-fsl-layerscape/ |
H A D | stream_id_lsch2.h | 11 * are not hardwired and are programmed by sw. There are a limited number
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/openbmc/u-boot/arch/arm/include/asm/arch-pxa/ |
H A D | hardware.h | 39 * generic IO bus, typically with ISA parts, hardwired IDE interfaces, etc.
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/openbmc/linux/Documentation/devicetree/bindings/gpio/ |
H A D | gpio-max3191x.txt | 32 is hardwired and consequently "maxim,modesel-gpios"
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn20/ |
H A D | dcn20_opp.c | 163 /* DPG_COLOUR registers are 16-bit MSB aligned value with bits 3:0 hardwired to ZERO. in opp2_set_disp_pattern_generator() 310 /* 16-bit MSB aligned value. Bits 3:0 of this field are hardwired to ZERO */ in opp2_dpg_set_blank_color()
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/openbmc/linux/drivers/gpu/drm/nouveau/nvkm/subdev/therm/ |
H A D | gm107.c | 29 /* nothing to do, it seems hardwired */ in gm107_fan_pwm_ctrl()
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/openbmc/linux/drivers/mmc/core/ |
H A D | Kconfig | 62 hardwired device numbering.
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/openbmc/qemu/include/hw/misc/ |
H A D | tz-msc.h | 26 * they are either hardwired or exposed in an ad-hoc register interface by
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/openbmc/linux/arch/arm/boot/dts/allwinner/ |
H A D | sunxi-d1s-t113-mangopi-mq-r.dtsi | 117 /* The USB-C socket has its CC pins pulled to GND, so is hardwired as a UFP. */
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/openbmc/qemu/include/hw/pci-host/ |
H A D | pam.h | 81 #define SMRAM_C_BASE_SEG ((uint8_t)0x2) /* hardwired to b010 */
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