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/openbmc/linux/arch/arm64/kvm/hyp/include/nvhe/
H A Dfixed_config.h1 /* SPDX-License-Identifier: GPL-2.0-only */
25 * The approach taken for protected VMs is to allow features that are:
26 * - Needed by common Linux distributions (e.g., floating point)
27 * - Trivial to support, e.g., supporting the feature does not introduce or
29 * - Cannot be trapped or prevent the guest from using anyway
33 * Allow for protected VMs:
34 * - Floating-point and Advanced SIMD
35 * - Data Independent Timing
36 * - Spectre/Meltdown Mitigation
47 * Restrict to the following *unsigned* features for protected VMs:
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/openbmc/linux/Documentation/virt/kvm/x86/
H A Dmmu.rst1 .. SPDX-License-Identifier: GPL-2.0
13 - correctness:
18 - security:
21 - performance:
23 - scaling:
25 - hardware:
26 support the full range of x86 virtualization hardware
27 - integration:
31 - dirty tracking:
33 and framebuffer-based displays
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/openbmc/linux/drivers/crypto/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
4 bool "Hardware crypto devices"
7 Say Y here to get to see options for hardware crypto devices and
39 called padlock-aes.
53 called padlock-sha.
61 Say 'Y' here to use the AMD Geode LX processor on-board AES
65 will be called geode-aes.
95 tristate "Kernel API for protected key handling"
100 for creation and handling of protected keys. Other parts of the
106 Please note that creation of protected keys from secure keys
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/openbmc/linux/include/drm/display/
H A Ddrm_dp_mst_helper.h52 * struct drm_dp_mst_port - MST port
54 * @input: if this port is an input port. Protected by
56 * @mcs: message capability status - DP 1.2 spec. Protected by
58 * @ddps: DisplayPort Device Plug Status - DP 1.2. Protected by
60 * @pdt: Peer Device Type. Protected by
62 * @ldps: Legacy Device Plug Status. Protected by
64 * @dpcd_rev: DPCD revision of device on this port. Protected by
66 * @num_sdp_streams: Number of simultaneous streams. Protected by
68 * @num_sdp_stream_sinks: Number of stream sinks. Protected by
70 * @full_pbn: Max possible bandwidth for this port. Protected by
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/openbmc/qemu/docs/system/
H A Dconfidential-guest-support.rst7 mechanisms in hardware and/or firmware which give guests at least some
18 ----------------------------
22 1. Use ``-object`` to create a "confidential guest support" object. The
25 2. Set the ``confidential-guest-support`` machine parameter to the ID of
30 qemu-system-x86_64 \
32 -machine ...,confidential-guest-support=sev0 \
33 -object sev-guest,id=sev0,cbitpos=47,reduced-phys-bits=1
36 --------------------
40 * AMD Secure Encrypted Virtualization (SEV) (see :doc:`i386/amd-memory-encryption`)
41 * POWER Protected Execution Facility (PEF) (see :ref:`power-papr-protected-execution-facility-pef`)
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/openbmc/linux/drivers/net/wireless/ath/ath10k/
H A Dcore.h1 /* SPDX-License-Identifier: ISC */
3 * Copyright (c) 2005-2011 Atheros Communications Inc.
4 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
5 * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
45 #define ATH10K_DEFAULT_NOISE_FLOOR -95
66 /* SMBIOS type structure length (excluding strings-set) */
141 return (struct ath10k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data; in ATH10K_SKB_CB()
146 BUILD_BUG_ON(sizeof(struct ath10k_skb_rxcb) > sizeof(skb->cb)); in ATH10K_SKB_RXCB()
147 return (struct ath10k_skb_rxcb *)skb->cb; in ATH10K_SKB_RXCB()
206 /* Protected by data_lock */
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/openbmc/linux/include/drm/
H A Ddrm_device.h27 * enum switch_power_state - power state of drm device
45 * struct drm_device - DRM device structure
54 /** @ref: Object ref-count */
57 /** @dev: Device structure of bus-device */
86 * per-device structure.
96 * hardware (and not character device node) struct device @dev.
123 * Protected by &master_mutex
128 * @driver_features: per-device driver features
131 * certain features on a per-device basis while still
145 /** @anon_inode: inode for private address-space */
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H A Ddrm_mode_config.h42 * struct drm_mode_config_funcs - basic driver provided mode setting functions
44 * Some global (i.e. not per-CRTC, connector, etc) mode setting functions that
59 * ie. when (@mode_cmd->flags & DRM_MODE_FB_MODIFIERS) == 0.
70 * driver-specific information (like the internal native buffer object
131 * function must reject any modeset and state changes which the hardware
135 * - Checking that the modes, framebuffers, scaling and placement
136 * requirements and so on are within the limits of the hardware.
138 * - Checking that any hidden shared resources are not oversubscribed.
143 * - Checking that virtualized resources exported to userspace are not
146 * example is dual-pipe operations (which generally should be hidden
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H A Dgpu_scheduler.h28 #include <linux/dma-fence.h>
36 * DRM_SCHED_FENCE_DONT_PIPELINE - Prefent dependency pipelining
45 * DRM_SCHED_FENCE_FLAG_HAS_DEADLINE_BIT - A fence deadline hint has been set
81 * struct drm_sched_entity - A wrapper around a job queue (typically
84 * Entities will emit jobs in order to their corresponding hardware
95 * Protected by &drm_sched_rq.lock of @rq.
104 * FIXME: Locking is very unclear for this. Writers are protected by
139 * drm_sched_entity_set_priority(). Protected by &rq_lock.
244 * struct drm_sched_rq - queue of entities to be scheduled.
265 * struct drm_sched_fence - fences corresponding to the scheduling of a job.
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/openbmc/linux/drivers/gpu/drm/i915/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
51 supported a subset of the hardware in older X.org releases.
60 string "Force probe i915 for selected Intel hardware IDs"
77 Use "<pci-id>[,<pci-id>,...]" to force probe the i915 for listed
97 https://gitlab.freedesktop.org/drm/intel/-/wikis/How-to-file-i915-bugs
125 tristate "Enable KVM host support Intel GVT-g graphics virtualization"
136 Choose this option if you want to enable Intel GVT-g graphics
138 With GVT-g, it's possible to have one integrated graphics
143 http://01.org/igvt-g.
153 PXP (Protected Xe Path) is an i915 component, available on graphics
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/openbmc/u-boot/arch/arm/cpu/armv8/fsl-layerscape/doc/
H A DREADME.soc13 ---------
14 The LS1043A integrated multicore processor combines four ARM Cortex-A53
20 - Four 64-bit ARM Cortex-A53 CPUs
21 - 1 MB unified L2 Cache
22 - One 32-bit DDR3L/DDR4 SDRAM memory controllers with ECC and interleaving
24 - Data Path Acceleration Architecture (DPAA) incorporating acceleration the
26 - Packet parsing, classification, and distribution (FMan)
27 - Queue management for scheduling, packet sequencing, and congestion
29 - Hardware buffer management for buffer allocation and de-allocation (BMan)
30 - Cryptography acceleration (SEC)
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/openbmc/linux/Documentation/RCU/
H A Drcu_dereference.rst8 field selection ("->"), assignment ("="), address-of ("&"), addition and
14 - You must use one of the rcu_dereference() family of primitives
15 to load an RCU-protected pointer, otherwise CONFIG_PROVE_RCU
16 will complain. Worse yet, your code can see random memory-corruption
32 - In the special case where data is added but is never removed
38 - You are only permitted to use rcu_dereference() on pointer values.
44 - Set bits and clear bits down in the must-be-zero low-order
49 - XOR bits to translate pointers, as is done in some
50 classic buddy-allocator algorithms.
55 - Avoid cancellation when using the "+" and "-" infix arithmetic
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/openbmc/linux/Documentation/dev-tools/
H A Dkfence.rst1 .. SPDX-License-Identifier: GPL-2.0
4 Kernel Electric-Fence (KFENCE)
7 Kernel Electric-Fence (KFENCE) is a low-overhead sampling-based memory safety
8 error detector. KFENCE detects heap out-of-bounds access, use-after-free, and
9 invalid-free errors.
15 non-production test workloads. One way to quickly achieve a large enough total
19 -----
26 ``kfence.sample_interval`` to non-zero value), configure the kernel with::
46 causes CPU wake-ups when the system is completely idle. This may be undesirable
47 on power-constrained systems. The boot parameter ``kfence.deferrable=1``
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/openbmc/linux/Documentation/fb/
H A Duvesafb.rst2 uvesafb - A Generic Driver for VBE2+ compliant video cards
6 ---------------
30 --------------------------
36 - Lack of any type of acceleration.
37 - A strict and limited set of supported video modes. Often the native
42 ratio, which is what most BIOS-es are limited to.
43 - Adjusting the refresh rate is only possible with a VBE 3.0 compliant
44 Video BIOS. Note that many nVidia Video BIOS-es claim to be VBE 3.0
48 ----------------
54 video=uvesafb:1024x768-32,mtrr:3,ywrap (compiled into the kernel)
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/openbmc/u-boot/arch/arm/mach-omap2/
H A DKconfig82 The AM335x high performance SOC features a Cortex-A8
92 The AM335x high performance SOC features a Cortex-A8
112 The AM43xx high performance SOC features a Cortex-A9
113 ARM core, a quad core PRU-ICSS for industrial Ethernet
130 The AM335x high performance SOC features a Cortex-A8
131 ARM core, a dual core PRU-ICSS for industrial Ethernet
149 Reserved EMIF region start address. Set to "0" to auto-select
161 hex "Size of protected region within reserved EMIF region"
166 reserved EMIF region set aside for secure OS needs that will be protected
167 using hardware memory firewalls. This value must be smaller than the
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/openbmc/linux/arch/m68k/mm/
H A Dhwtest.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Tests for presence or absence of hardware registers.
8 * The test is for use when trying to read a hardware register
12 * There is a test-by-reading and a test-by-writing; I present
15 * -- PMM <pmaydell@chiark.greenend.org.uk>, 05/1998
19 * hardware register address. It is called very early in the kernel
58 /* Basically the same, but writes a value into a word register, protected
/openbmc/linux/arch/x86/kvm/mmu/
H A Dspte.h1 // SPDX-License-Identifier: GPL-2.0-only
11 * in hardware. E.g. MMIO SPTEs are not considered present. Use bit 11, as it
20 * be restricted to using write-protection (for L2 when CPU dirty logging, i.e.
26 * is guaranteed to have A/D bits and write-protection is forced only for
27 * TDP with CPU dirty logging (PML). If NPT ever gains PML-like support, it
28 * must be restricted to 64-bit KVM.
38 #define SPTE_BASE_ADDR_MASK (physical_mask & ~(u64)(PAGE_SIZE-1))
40 #define SPTE_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
62 * as not-present for access tracking purposes. We do not save the W bit as the
76 * SPTE is write-protected. See is_writable_pte() for details.
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/openbmc/linux/Documentation/ABI/stable/
H A Dsysfs-devices-system-cpu2 Date: 13-May-2014
9 all per-CPU defaults at the same time.
12 What: /sys/devices/system/cpu/cpu[0-9]+/dscr
13 Date: 13-May-2014
34 Description: the CPU die ID of cpuX. Typically it is the hardware platform's
40 Description: the CPU core ID of cpuX. Typically it is the hardware platform's
46 Description: the cluster ID of cpuX. Typically it is the hardware platform's
52 Description: the book ID of cpuX. Typically it is the hardware platform's
58 Description: the drawer ID of cpuX. Typically it is the hardware platform's
69 Description: human-readable list of CPUs within the same core.
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/openbmc/qemu/docs/devel/
H A Dmulti-thread-tcg.rst2 Copyright (c) 2015-2020 Linaro Ltd.
5 later. See the COPYING file in the top-level directory.
8 Multi-threaded TCG
11 This document outlines the design for multi-threaded TCG (a.k.a MTTCG)
12 system-mode emulation. user-mode emulation has always mirrored the
15 linux-user emulation.
17 The original system-mode TCG implementation was single threaded and
18 dealt with multiple CPUs with simple round-robin scheduling. This
20 being emulated gained additional cores and per-core performance gains
27 user-space thread. This is enabled by default for all FE/BE
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/openbmc/linux/drivers/gpu/drm/vmwgfx/
H A Dvmwgfx_so.c1 // SPDX-License-Identifier: GPL-2.0 OR MIT
3 * Copyright 2014-2015 VMware, Inc., Palo Alto, CA., USA
19 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
35 * destroy a hardware surface, all views pointing to it must also be destroyed,
44 * struct vmw_view - view metadata
48 * @ctx: Non-refcounted pointer to the context this view belongs to.
51 * @srf_head: List head for the surface-to-view list.
52 * @cotable_head: List head for the cotable-to_view list.
54 * @view_id: User-space per context view id. Currently used also as per
68 struct list_head srf_head; /* Protected by binding_mutex */
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/openbmc/linux/include/linux/
H A Dblk-crypto-profile.h1 /* SPDX-License-Identifier: GPL-2.0 */
10 #include <linux/blk-crypto.h>
15 * struct blk_crypto_ll_ops - functions to control inline encryption hardware
17 * Low-level operations for controlling inline encryption hardware. This
19 * encryption. All functions may sleep, are serialized by profile->lock, and
20 * are never called while profile->dev (if set) is runtime-suspended.
25 * @keyslot_program: Program a key into the inline encryption hardware.
28 * hardware, overwriting any key that the keyslot may already contain.
29 * The keyslot is guaranteed to not be in-use by any I/O.
32 * device is a layered device, or if the device is real hardware that
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/openbmc/linux/drivers/net/ethernet/aquantia/atlantic/macsec/
H A Dmacsec_struct.h1 /* SPDX-License-Identifier: GPL-2.0-only */
21 /*! The match mask is per-nibble. 0 means don't care, i.e. every value
122 /*! Mask is per-byte.
137 * For explicit SECTAG, AN is hardware controlled. For sending
142 /*! Mask is per-byte.
148 * PN number is hardware controlled.
151 /*! Mask is per-byte.
156 /*! Mask is per-byte.
171 /*! Mask is per-byte.
176 /*! Mask is per-byte.
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/openbmc/linux/arch/x86/kernel/
H A Dumip.c2 * umip.c Emulation for instruction protected by the User-Mode Instruction
6 * Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
13 #include <asm/insn-eval.h>
19 /** DOC: Emulation for User-Mode Instruction Prevention (UMIP)
21 * User-Mode Instruction Prevention is a security feature present in recent
27 * the UMIP-protected instructions (in the form of a SIGSEGV signal), it can be
38 * The instructions protected by UMIP can be split in two groups. Those which
44 * not the actual location of the table. The result is emulated as a hard-coded
52 * - SLDT returns (GDT_ENTRY_LDT * 8) if an LDT has been set, 0 if not.
53 * - STR returns (GDT_ENTRY_TSS * 8).
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/openbmc/qemu/docs/system/i386/
H A Dsgx.rst5 --------
10 address space as an *enclave*, which is a protected area provides confidentiality
16 -----------
36 require -maxmem as EPC is not treated as {cold,hot}plugged memory.
43 The following QEMU snippet creates two EPC sections, with 64M pre-allocated
46 -object memory-backend-epc,id=mem1,size=64M,prealloc=on \
47 -object memory-backend-epc,id=mem2,size=28M \
48 -M sgx-epc.0.memdev=mem1,sgx-epc.1.memdev=mem2
53 to physical EPC. Because physical EPC is protected via range registers,
65 QEMU/KVM doesn't prevent live migrating SGX VMs, although from hardware's
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/openbmc/linux/Documentation/admin-guide/mm/
H A Duserfaultfd.rst8 Userfaults allow the implementation of on-demand paging from userland
38 Vmas are not suitable for page- (or hugepage) granular fault tracking
48 is a corner case that would currently return ``-EBUSY``).
54 ----------------------
63 - Any user can always create a userfaultfd which traps userspace page faults
67 - In order to also trap kernel page faults for the address space, either the
84 --------------------------
101 - The ``UFFD_FEATURE_EVENT_*`` flags indicate that various other events
103 detail below in the `Non-cooperative userfaultfd`_ section.
105 - ``UFFD_FEATURE_MISSING_HUGETLBFS`` and ``UFFD_FEATURE_MISSING_SHMEM``
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