/openbmc/qemu/tests/tcg/arm/ |
H A D | fcvt.ref | 1 #### Enabling IEEE Half Precision 3 Converting single-precision to half-precision 5 00 HALF: 0xff00 (0x1 => INVALID) 7 01 HALF: 0xfe00 (0 => OK) 9 02 HALF: 0xfc00 (0 => OK) 11 03 HALF: 0xfc00 (0x14 => OVERFLOW INEXACT ) 13 04 HALF: 0xfc00 (0x14 => OVERFLOW INEXACT ) 15 05 HALF: 0xfc00 (0x14 => OVERFLOW INEXACT ) 17 06 HALF: 0x8000 (0x18 => UNDERFLOW INEXACT ) 19 07 HALF: 0x8000 (0x18 => UNDERFLOW INEXACT ) [all …]
|
/openbmc/qemu/tests/tcg/aarch64/ |
H A D | fcvt.ref | 1 #### Enabling IEEE Half Precision 3 Converting single-precision to half-precision 5 00 HALF: 0xff00 (0x1 => INVALID) 7 01 HALF: 0xfe00 (0 => OK) 9 02 HALF: 0xfc00 (0 => OK) 11 03 HALF: 0xfc00 (0x14 => OVERFLOW INEXACT ) 13 04 HALF: 0xfc00 (0x14 => OVERFLOW INEXACT ) 15 05 HALF: 0xfc00 (0x14 => OVERFLOW INEXACT ) 17 06 HALF: 0x8000 (0x18 => UNDERFLOW INEXACT ) 19 07 HALF: 0x8000 (0x18 => UNDERFLOW INEXACT ) [all …]
|
/openbmc/linux/arch/parisc/kernel/ |
H A D | signal32.c | 52 /* Load upper half */ in restore_sigcontext32() 66 /* Load upper half */ in restore_sigcontext32() 69 DBG(2,"restore_sigcontext32: upper half of iaoq[0] = %#lx\n", compat_regt); in restore_sigcontext32() 74 /* Load upper half */ in restore_sigcontext32() 77 DBG(2,"restore_sigcontext32: upper half of iaoq[1] = %#lx\n", compat_regt); in restore_sigcontext32() 84 /* Load the upper half for iasq */ in restore_sigcontext32() 87 DBG(2,"restore_sigcontext32: upper half of iasq[0] = %#lx\n", compat_regt); in restore_sigcontext32() 90 /* Load the upper half for iasq */ in restore_sigcontext32() 93 DBG(2,"restore_sigcontext32: upper half of iasq[1] = %#lx\n", compat_regt); in restore_sigcontext32() 98 /* Load the upper half for sar */ in restore_sigcontext32() [all …]
|
/openbmc/linux/drivers/gpu/drm/i915/gt/ |
H A D | selftest_ring.c | 79 unsigned int half = 2048; in igt_ring_direction() local 82 ring = mock_ring(2 * half); in igt_ring_direction() 86 GEM_BUG_ON(ring->size != 2 * half); in igt_ring_direction() 89 for (step = 1; step < half; step <<= 1) { in igt_ring_direction() 91 err |= check_ring_offset(ring, half, step); in igt_ring_direction() 93 err |= check_ring_step(ring, 0, half - 64); in igt_ring_direction() 96 err |= check_ring_offset(ring, 0, 2 * half + 64); in igt_ring_direction() 97 err |= check_ring_offset(ring, 3 * half, 1); in igt_ring_direction()
|
/openbmc/linux/include/uapi/linux/ |
H A D | mii.h | 65 #define BMSR_10HALF 0x0800 /* Can do 10mbps, half-duplex */ 67 #define BMSR_100HALF 0x2000 /* Can do 100mbps, half-duplex */ 74 #define ADVERTISE_10HALF 0x0020 /* Try for 10mbps half-duplex */ 77 #define ADVERTISE_1000XHALF 0x0040 /* Try for 1000BASE-X half-duplex */ 78 #define ADVERTISE_100HALF 0x0080 /* Try for 100mbps half-duplex */ 97 #define LPA_10HALF 0x0020 /* Can do 10mbps half-duplex */ 100 #define LPA_1000XHALF 0x0040 /* Can do 1000BASE-X half-duplex */ 101 #define LPA_100HALF 0x0080 /* Can do 100mbps half-duplex */ 125 #define ESTATUS_1000_XHALF 0x4000 /* Can do 1000BaseX Half */ 127 #define ESTATUS_1000_THALF 0x1000 /* Can do 1000BT Half */ [all …]
|
/openbmc/linux/Documentation/devicetree/bindings/interrupt-controller/ |
H A D | cirrus,clps711x-intc.txt | 24 12: UTXINT1 UART1 transmit FIFO half empty 25 13: URXINT1 UART1 receive FIFO half full 29 17: SS2RX SSI2 receive FIFO half or greater full 30 18: SS2TX SSI2 transmit FIFO less than half empty 31 28: UTXINT2 UART2 transmit FIFO half empty 32 29: URXINT2 UART2 receive FIFO half full
|
/openbmc/u-boot/doc/ |
H A D | README.t1040-l2switch | 53 0 enabled down 10 half 54 1 enabled down 10 half 55 2 enabled down 10 half 57 4 disabled down - half 58 5 disabled down - half 59 6 disabled down - half 60 7 disabled down - half
|
/openbmc/u-boot/include/linux/ |
H A D | mii.h | 62 #define BMSR_10HALF 0x0800 /* Can do 10mbps, half-duplex */ 64 #define BMSR_100HALF 0x2000 /* Can do 100mbps, half-duplex */ 71 #define ADVERTISE_10HALF 0x0020 /* Try for 10mbps half-duplex */ 74 #define ADVERTISE_1000XHALF 0x0040 /* Try for 1000BASE-X half-duplex */ 75 #define ADVERTISE_100HALF 0x0080 /* Try for 100mbps half-duplex */ 94 #define LPA_10HALF 0x0020 /* Can do 10mbps half-duplex */ 97 #define LPA_1000XHALF 0x0040 /* Can do 1000BASE-X half-duplex */ 98 #define LPA_100HALF 0x0080 /* Can do 100mbps half-duplex */ 122 #define ESTATUS_1000_XHALF 0x4000 /* Can do 1000BX Half */ 124 #define ESTATUS_1000_THALF 0x1000 /* Can do 1000BT Half */ [all …]
|
/openbmc/linux/drivers/media/usb/stk1160/ |
H A D | stk1160-reg.h | 42 * Bit 1 - Decimates Half or More Column 43 * 0 Decimates less than half from original column, 45 * 1 Decimates half or more from original column, 50 * Bit 3 - Vertical Greater or Equal to Half 51 * 0 Decimates less than half from original row, 53 * 1 Decimates half or more from original row,
|
/openbmc/qemu/audio/ |
H A D | mixeng_template.h | 31 #define HALF (IN_MAX >> 1) macro 46 return (nv - HALF) * (2.f / (mixeng_real)IN_MAX); in glue() 52 return (nv - HALF) / ((mixeng_real)IN_MAX / 2.f); in glue() 68 return ENDIAN_CONVERT((IN_T)((v * ((mixeng_real)IN_MAX / 2.f)) + HALF)); in glue() 80 return ((int64_t) nv - HALF) << (32 - SHIFT); in glue() 95 return ENDIAN_CONVERT ((IN_T) ((v >> (32 - SHIFT)) + HALF)); in glue() 151 #undef HALF
|
/openbmc/qemu/include/block/ |
H A D | aio.h | 283 * aio_bh_schedule_oneshot_full: Allocate a new bottom half structure that will 292 * aio_bh_schedule_oneshot: Allocate a new bottom half structure that will run 302 * aio_bh_new_full: Allocate a new bottom half structure. 316 * aio_bh_new: Allocate a new bottom half structure 325 * aio_bh_new_guarded: Allocate a new bottom half structure with a 345 * a bottom half calls it already. 382 * qemu_bh_schedule: Schedule a bottom half. 384 * Scheduling a bottom half interrupts the main loop and causes the 387 * Bottom halves that are scheduled from a bottom half handler are instantly 388 * invoked. This can create an infinite loop if a bottom half handler [all …]
|
/openbmc/linux/drivers/net/ethernet/8390/ |
H A D | stnic.c | 29 #define half unsigned short macro 97 *(vhalf *) (PA_83902 + ((reg) << 1)) = ((half) (val) << 8); in STNIC_WRITE() 186 half buf[2]; in stnic_get_hdr() 222 half val; in stnic_block_input() 244 length -= sizeof (half); in stnic_block_input() 270 *(vhalf *) PA_83902_IF = ((half) buf[1] << 8) | buf[0]; in stnic_block_output() 272 *(vhalf *) PA_83902_IF = ((half) buf[0] << 8) | buf[1]; in stnic_block_output() 275 buf += sizeof (half); in stnic_block_output() 276 length -= sizeof (half); in stnic_block_output()
|
/openbmc/linux/arch/s390/mm/ |
H A D | pgalloc.c | 166 * A 2KB-pgtable is either upper or lower half of a normal page. 167 * The second half of the page may be unused or used as another 204 * - added to mm_context_t::pgtable_list in case the second half of the 215 * - added to mm_context_t::pgtable_list in case the second half of the 217 * - removed from mm_context_t::pgtable_list in case the second half of 312 unsigned int half, unsigned int mask) in page_table_release_check() argument 321 "Invalid pgtable %p release half 0x%02x mask 0x%02x", in page_table_release_check() 322 table, half, mask); in page_table_release_check() 337 unsigned int mask, bit, half; in page_table_free() local 353 * Other half is allocated, and neither half has had in page_table_free() [all …]
|
/openbmc/openbmc-test-automation/lib/ |
H A D | utils.py | 246 Supported link modes: 10baseT/Half 10baseT/Full 247 100baseT/Half 100baseT/Full 248 1000baseT/Half 1000baseT/Full 252 Advertised link modes: 10baseT/Half 10baseT/Full 253 100baseT/Half 100baseT/Full 254 1000baseT/Half 1000baseT/Full 276 [supported_link_modes][0]: 10baseT/Half 10baseT/Full 277 [supported_link_modes][1]: 100baseT/Half 100baseT/Full 278 [supported_link_modes][2]: 1000baseT/Half 1000baseT/Full 283 [advertised_link_modes][0]: 10baseT/Half 10baseT/Full [all …]
|
/openbmc/linux/Documentation/input/devices/ |
H A D | rotary-encoder.rst | 16 a stable state with both outputs high (half-period mode) and some have 37 one step (half-period mode) 49 In half-period mode, state a) and c) above are used to determine the 52 (i.e. the rotation was not reversed half-way). 61 meaning that there it has seen half the way of a one-step transition. 68 should have happened, unless it flipped back on half the way. The
|
/openbmc/linux/include/uapi/linux/dvb/ |
H A D | osd.h | 138 OSD_BITMAP1HR, /* 1 Bit bitmap half resolution */ 139 OSD_BITMAP2HR, /* 2 bit bitmap half resolution */ 140 OSD_BITMAP4HR, /* 4 bit bitmap half resolution */ 141 OSD_BITMAP8HR, /* 8 bit bitmap half resolution */ 144 OSD_YCRCB444HR, /* 4:4:4 YCRCB graphic half resolution */ 146 OSD_VIDEOHSIZE, /* MPEG Video Display Half Resolution */ 149 OSD_VIDEOTHSIZE, /* True Size MPEG Video Display Half Resolution */
|
/openbmc/linux/drivers/net/ethernet/atheros/atlx/ |
H A D | atlx.h | 228 /* MAC Half-Duplex Control Register */ 303 #define MII_CR_FULL_DUPLEX 0x0100 /* FDX =1, half duplex =0 */ 327 #define MII_SR_100T2_HD_CAPS 0x0200 /* 100T2 Half Duplex Capable */ 329 #define MII_SR_10T_HD_CAPS 0x0800 /* 10T Half Duplex Capable */ 331 #define MII_SR_100X_HD_CAPS 0x2000 /* 100X Half Duplex Capable */ 337 #define MII_LPA_10HALF 0x0020 /* Can do 10mbps half-duplex */ 339 #define MII_LPA_100HALF 0x0080 /* Can do 100mbps half-duplex */ 350 #define MII_AR_10T_HD_CAPS 0x0020 /* 10T Half Duplex Capable */ 352 #define MII_AR_100TX_HD_CAPS 0x0080 /* 100TX Half Duplex Capable */ 438 #define MII_ATLX_PSSR_DPLX 0x2000 /* 1=Duplex 0=Half Duplex */ [all …]
|
/openbmc/linux/drivers/gpu/drm/sun4i/ |
H A D | sun4i_hdmi_tmds_clk.c | 31 bool *half) in sun4i_tmds_calc_divider() argument 57 if (div && half) { in sun4i_tmds_calc_divider() 59 *half = is_double; in sun4i_tmds_calc_divider() 147 bool half; in sun4i_tmds_set_rate() local 152 &div, &half); in sun4i_tmds_set_rate() 156 if (half) in sun4i_tmds_set_rate()
|
/openbmc/qemu/include/hw/net/ |
H A D | mii.h | 60 #define MII_BMSR_100TX_HD (1 << 13) /* Can do 100mbps, half-duplex */ 62 #define MII_BMSR_10T_HD (1 << 11) /* Can do 10mbps, half-duplex */ 64 #define MII_BMSR_100T2_HD (1 << 9) /* Can do 100mbps T2, half-duplex */ 100 #define MII_CTRL1000_HALF (1 << 8) /* 1000BASE-T half duplex */ 105 #define MII_STAT1000_HALF (1 << 10) /* 1000BASE-T half duplex */ 108 #define MII_EXTSTAT_1000T_HD (1 << 12) /* 1000BASE-T Half Duplex */
|
/openbmc/linux/drivers/soc/ixp4xx/ |
H A D | ixp4xx-qmgr.c | 188 int i, half = (irq == qmgr_irq_1 ? 0 : 1); in qmgr_irq() local 189 u32 req_bitmap = __raw_readl(&qmgr_regs->irqstat[half]); in qmgr_irq() 193 __raw_writel(req_bitmap, &qmgr_regs->irqstat[half]); /* ACK */ in qmgr_irq() 198 i += half * HALF_QUEUES; in qmgr_irq() 208 int half = queue / 32; in qmgr_enable_irq() local 212 __raw_writel(__raw_readl(&qmgr_regs->irqen[half]) | mask, in qmgr_enable_irq() 213 &qmgr_regs->irqen[half]); in qmgr_enable_irq() 220 int half = queue / 32; in qmgr_disable_irq() local 224 __raw_writel(__raw_readl(&qmgr_regs->irqen[half]) & ~mask, in qmgr_disable_irq() 225 &qmgr_regs->irqen[half]); in qmgr_disable_irq() [all …]
|
/openbmc/linux/drivers/soc/fsl/qe/ |
H A D | tsa.c | 236 resource_size_t half; in tsa_init_entries_area() local 239 half = tsa->si_ram_sz/2; in tsa_init_entries_area() 244 /* First half of si_ram */ in tsa_init_entries_area() 246 area->entries_next = area->entries_start + half; in tsa_init_entries_area() 249 /* Second half of si_ram */ in tsa_init_entries_area() 250 area->entries_start = tsa->si_ram + half; in tsa_init_entries_area() 251 area->entries_next = area->entries_start + half; in tsa_init_entries_area() 258 /* First half of first half of si_ram */ in tsa_init_entries_area() 263 /* First half of second half of si_ram */ in tsa_init_entries_area() 270 /* Second half of first half of si_ram */ in tsa_init_entries_area() [all …]
|
/openbmc/u-boot/board/freescale/mpc8541cds/ |
H A D | tlb.c | 38 * 0x80000000 256M PCI1 MEM First half 46 * 0x90000000 256M PCI1 MEM Second half 54 * 0xa0000000 256M PCI2 MEM First half 62 * 0xb0000000 256M PCI2 MEM Second half
|
/openbmc/u-boot/board/freescale/mpc8555cds/ |
H A D | tlb.c | 38 * 0x80000000 256M PCI1 MEM First half 46 * 0x90000000 256M PCI1 MEM Second half 54 * 0xa0000000 256M PCI2 MEM First half 62 * 0xb0000000 256M PCI2 MEM Second half
|
/openbmc/u-boot/drivers/sound/ |
H A D | sound.c | 15 const int half = period / 2; in sound_create_square_wave() local 26 for (i = 0; size && i < half; i++) { in sound_create_square_wave() 31 for (i = 0; size && i < period - half; i++) { in sound_create_square_wave()
|
/openbmc/linux/include/clocksource/ |
H A D | timer-davinci.h | 28 * clock half for both clocksource and clockevent and the compare register 32 * This is only used by da830 the DSP of which uses the top half. The timer 33 * driver still configures the top half to run in free-run mode.
|