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/openbmc/qemu/tests/tcg/aarch64/
H A Dfcvt.ref1 #### Enabling IEEE Half Precision
3 Converting single-precision to half-precision
4 00 SINGLE: -nan / 0xffa00000 (0 => OK)
5 00 HALF: 0xff00 (0x1 => INVALID)
6 01 SINGLE: -nan / 0xffc00000 (0 => OK)
7 01 HALF: 0xfe00 (0 => OK)
8 02 SINGLE: -inf / 0xff800000 (0 => OK)
9 02 HALF: 0xfc00 (0 => OK)
10 03 SINGLE: -3.40282346638528859812e+38 / 0xff7fffff (0 => OK)
11 03 HALF: 0xfc00 (0x14 => OVERFLOW INEXACT )
[all …]
/openbmc/qemu/tests/tcg/arm/
H A Dfcvt.ref1 #### Enabling IEEE Half Precision
3 Converting single-precision to half-precision
4 00 SINGLE: -nan / 0xffa00000 (0 => OK)
5 00 HALF: 0xff00 (0x1 => INVALID)
6 01 SINGLE: -nan / 0xffc00000 (0 => OK)
7 01 HALF: 0xfe00 (0 => OK)
8 02 SINGLE: -inf / 0xff800000 (0 => OK)
9 02 HALF: 0xfc00 (0 => OK)
10 03 SINGLE: -3.40282346638528859812e+38 / 0xff7fffff (0 => OK)
11 03 HALF: 0xfc00 (0x14 => OVERFLOW INEXACT )
[all …]
/openbmc/linux/arch/parisc/kernel/
H A Dsignal32.c1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* Signal support for 32-bit kernel builds
4 * Copyright (C) 2001 Matthew Wilcox <willy at parisc-linux.org>
5 * Copyright (C) 2006 Kyle McMartin <kyle at parisc-linux.org>
44 /* When loading 32-bit values into 64-bit registers make in restore_sigcontext32()
45 sure to clear the upper 32-bits */ in restore_sigcontext32()
50 err |= __get_user(compat_reg,&sc->sc_gr[regn]); in restore_sigcontext32()
51 regs->gr[regn] = compat_reg; in restore_sigcontext32()
52 /* Load upper half */ in restore_sigcontext32()
53 err |= __get_user(compat_regt,&rf->rf_gr[regn]); in restore_sigcontext32()
[all …]
/openbmc/linux/drivers/gpu/drm/i915/gt/
H A Dselftest_ring.c1 // SPDX-License-Identifier: GPL-2.0
14 kref_init(&ring->ref); in mock_ring()
15 ring->size = sz; in mock_ring()
16 ring->wrap = BITS_PER_TYPE(ring->size) - ilog2(sz); in mock_ring()
17 ring->effective_size = sz; in mock_ring()
18 ring->vaddr = (void *)(ring + 1); in mock_ring()
19 atomic_set(&ring->pin_count, 1); in mock_ring()
39 result = -1; in check_ring_direction()
46 return -EINVAL; in check_ring_direction()
60 err |= check_ring_direction(ring, prev, next, -1); in check_ring_step()
[all …]
/openbmc/linux/include/uapi/linux/
H A Dmii.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
3 * linux/mii.h: definitions for MII-compatible transceivers
23 #define MII_CTRL1000 0x09 /* 1000BASE-T control */
24 #define MII_STAT1000 0x0a /* 1000BASE-T status */
30 #define MII_NWAYTEST 0x14 /* N-way auto-neg test reg */
55 #define BMSR_ERCAP 0x0001 /* Ext-reg capability */
58 #define BMSR_ANEGCAPABLE 0x0008 /* Able to do auto-negotiation */
60 #define BMSR_ANEGCOMPLETE 0x0020 /* Auto-negotiation complete */
63 #define BMSR_100HALF2 0x0200 /* Can do 100BASE-T2 HDX */
64 #define BMSR_100FULL2 0x0400 /* Can do 100BASE-T2 FDX */
[all …]
/openbmc/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dcirrus,clps711x-intc.txt5 - compatible: Should be "cirrus,ep7209-intc".
6 - reg: Specifies base physical address of the registers set.
7 - interrupt-controller: Identifies the node as an interrupt controller.
8 - #interrupt-cells: Specifies the number of cells needed to encode an
13 ---------------------------
24 12: UTXINT1 UART1 transmit FIFO half empty
25 13: URXINT1 UART1 receive FIFO half full
29 17: SS2RX SSI2 receive FIFO half or greater full
30 18: SS2TX SSI2 transmit FIFO less than half empty
31 28: UTXINT2 UART2 transmit FIFO half empty
[all …]
/openbmc/u-boot/doc/
H A DREADME.t1040-l2switch6 VSC9953 is an 8-port Gigabit Ethernet switch supports the following features:
7 - 8192 MAC addresses
8 - Static Address provisioning
9 - Dynamic learning of MAC addresses and aging
10 - 4096 VLANs
11 - Independent and shared VLAN learning (IVL, SVL)
12 - Policing with storm control and MC/BC protection
13 - IPv4 and IPv6 multicast
14 - Jumbo frames (9.6 KB)
15 - Access Control List
[all …]
/openbmc/u-boot/include/linux/
H A Dmii.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
3 * linux/mii.h: definitions for MII-compatible transceivers
20 #define MII_CTRL1000 0x09 /* 1000BASE-T control */
21 #define MII_STAT1000 0x0a /* 1000BASE-T status */
27 #define MII_NWAYTEST 0x14 /* N-way auto-neg test reg */
52 #define BMSR_ERCAP 0x0001 /* Ext-reg capability */
55 #define BMSR_ANEGCAPABLE 0x0008 /* Able to do auto-negotiation */
57 #define BMSR_ANEGCOMPLETE 0x0020 /* Auto-negotiation complete */
60 #define BMSR_100HALF2 0x0200 /* Can do 100BASE-T2 HDX */
61 #define BMSR_100FULL2 0x0400 /* Can do 100BASE-T2 FDX */
[all …]
/openbmc/linux/drivers/media/usb/stk1160/
H A Dstk1160-reg.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
6 * <elezegarcia--a.t--gmail.com>
10 * <rmthomas--a.t--sciolus.org>
19 /* Power-on Strapping Data */
39 * Bit 0 - Horizontal Decimation Control
42 * Bit 1 - Decimates Half or More Column
43 * 0 Decimates less than half from original column,
45 * 1 Decimates half or more from original column,
47 * Bit 2 - Vertical Decimation Control
50 * Bit 3 - Vertical Greater or Equal to Half
[all …]
/openbmc/qemu/audio/
H A Dmixeng_template.h4 * Copyright (c) 2004-2005 Vassili Karpov (malc)
31 #define HALF (IN_MAX >> 1) macro
44 return nv * (2.f / ((mixeng_real)IN_MAX - IN_MIN)); in glue()
46 return (nv - HALF) * (2.f / (mixeng_real)IN_MAX); in glue()
50 return nv / (((mixeng_real)IN_MAX - IN_MIN) / 2.f); in glue()
52 return (nv - HALF) / ((mixeng_real)IN_MAX / 2.f); in glue()
61 } else if (v < -1.f) { in glue()
66 return ENDIAN_CONVERT((IN_T)(v * (((mixeng_real)IN_MAX - IN_MIN) / 2.f))); in glue()
68 return ENDIAN_CONVERT((IN_T)((v * ((mixeng_real)IN_MAX / 2.f)) + HALF)); in glue()
78 return ((int64_t) nv) << (32 - SHIFT); in glue()
[all …]
/openbmc/qemu/include/block/
H A Daio.h10 * the COPYING file in the top-level directory.
20 #include "qemu/coroutine-core.h"
26 #include "block/graph-lock.h"
27 #include "hw/qdev-core.h"
76 * Called with ctx->list_lock acquired.
88 * Called with ctx->list_lock incremented but not locked.
98 * Tell aio_poll() when to stop userspace polling early because ->wait()
106 * Returns: true if ->wait() should be called, false otherwise.
129 /* Used by AioContext users to protect from multi-threaded access. */
140 /* The list of registered AIO handlers. Protected by ctx->list_lock. */
[all …]
/openbmc/linux/drivers/net/ethernet/8390/
H A Dstnic.c1 // SPDX-License-Identifier: GPL-2.0-only
2 /* stnic.c : A SH7750 specific part of driver for NS DP83902A ST-NIC.
18 #include <mach-se/mach/se.h>
29 #define half unsigned short macro
97 *(vhalf *) (PA_83902 + ((reg) << 1)) = ((half) (val) << 8); in STNIC_WRITE()
109 return -ENODEV; in stnic_probe()
114 return -ENOMEM; in stnic_probe()
122 dev->base_addr = 0x1000; in stnic_probe()
123 dev->irq = IRQ_STNIC; in stnic_probe()
124 dev->netdev_ops = &ei_netdev_ops; in stnic_probe()
[all …]
/openbmc/linux/arch/s390/mm/
H A Dpgalloc.c1 // SPDX-License-Identifier: GPL-2.0
38 return register_sysctl("vm", page_table_sysctl) ? 0 : -ENOMEM; in page_table_register_sysctl()
66 if (current->active_mm == mm) { in __crst_table_upgrade()
67 S390_lowcore.user_asce = mm->context.asce; in __crst_table_upgrade()
76 unsigned long asce_limit = mm->context.asce_limit; in crst_table_upgrade()
97 spin_lock_bh(&mm->page_table_lock); in crst_table_upgrade()
104 VM_BUG_ON(asce_limit != mm->context.asce_limit); in crst_table_upgrade()
107 __pgd = (unsigned long *) mm->pgd; in crst_table_upgrade()
109 mm->pgd = (pgd_t *) p4d; in crst_table_upgrade()
110 mm->context.asce_limit = _REGION1_SIZE; in crst_table_upgrade()
[all …]
/openbmc/linux/Documentation/input/devices/
H A Drotary-encoder.rst2 rotary-encoder - a generic driver for GPIO connected devices
8 --------
11 peripherals with two wires. The outputs are phase-shifted by 90 degrees
16 a stable state with both outputs high (half-period mode) and some have
17 a stable state in all steps (quarter-period mode).
33 |<-------->|
36 |<-->|
37 one step (half-period mode)
40 one step (quarter-period mode)
47 ----------------------
[all …]
/openbmc/openbmc-test-automation/lib/
H A Dutils.py66 # The user has not set bmc_power_policy_method via a -v parm so we will
98 Using old style functions, callers might call like this with a hard-
129 [local_time]: Fri 2017-11-03 152756 UTC
131 [universal_time]: Fri 2017-11-03 152756 UTC
133 [rtc_time]: Fri 2016-05-20 163403
143 # Local time: Fri 2017-11-03 15:27:56 UTC
144 # Universal time: Fri 2017-11-03 15:27:56 UTC
145 # RTC time: Fri 2016-05-20 16:34:03
185 [1k-blocks]: 247120
192 [1k-blocks]: 247120
[all …]
/openbmc/linux/include/uapi/linux/dvb/
H A Dosd.h1 /* SPDX-License-Identifier: LGPL-2.1+ WITH Linux-syscall-note */
3 * osd.h - DEPRECATED On Screen Display API
18 /* All functions return -2 on "not open" */
27 * returns 0 on success, -1 on DRAM allocation error, -2 on "already open"
57 * returns 0 on success, -1 on error
64 * R,G,B, and a opacity value: 0->transparent, 1..254->mix, 255->pixel
74 * returns 0 on success, -1 on error
77 /* returns color number of pixel <x>,<y>, or -1 */
81 * returns 0 on success, -1 on clipping all pixel (no pixel drawn)
88 * returns 0 on success, -1 on clipping all pixel
[all …]
/openbmc/linux/drivers/net/ethernet/atheros/atlx/
H A Datlx.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /* atlx_hw.h -- common hardware definitions for Attansic network drivers
4 * Copyright(c) 2005 - 2006 Attansic Corporation. All rights reserved.
5 * Copyright(c) 2006 - 2007 Chris Snook <csnook@redhat.com>
6 * Copyright(c) 2006 - 2008 Jay Cliburn <jcliburn@gmail.com>
10 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
149 /* IRQ Anti-Lost Timer Initial Value Register */
228 /* MAC Half-Duplex Control Register */
246 /* Wake-On-Lan control register */
303 #define MII_CR_FULL_DUPLEX 0x0100 /* FDX =1, half duplex =0 */
[all …]
/openbmc/linux/drivers/gpu/drm/sun4i/
H A Dsun4i_hdmi_tmds_clk.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Maxime Ripard <maxime.ripard@free-electrons.com>
9 #include <linux/clk-provider.h>
31 bool *half) in sun4i_tmds_calc_divider() argument
49 (rate - tmp_rate) < (rate - best_rate)) { in sun4i_tmds_calc_divider()
57 if (div && half) { in sun4i_tmds_calc_divider()
59 *half = is_double; in sun4i_tmds_calc_divider()
72 unsigned long rate = req->rate; in sun4i_tmds_determine_rate()
88 for (j = tmds->div_offset ?: 1; in sun4i_tmds_determine_rate()
89 j < (16 + tmds->div_offset); j++) { in sun4i_tmds_determine_rate()
[all …]
/openbmc/qemu/include/hw/net/
H A Dmii.h8 * Copyright 2013 Maxime Ripard <maxime.ripard@free-electrons.com>
34 #define MII_CTRL1000 9 /* 1000BASE-T control */
35 #define MII_STAT1000 10 /* 1000BASE-T status */
59 #define MII_BMSR_100TX_FD (1 << 14) /* Can do 100mbps, full-duplex */
60 #define MII_BMSR_100TX_HD (1 << 13) /* Can do 100mbps, half-duplex */
61 #define MII_BMSR_10T_FD (1 << 12) /* Can do 10mbps, full-duplex */
62 #define MII_BMSR_10T_HD (1 << 11) /* Can do 10mbps, half-duplex */
63 #define MII_BMSR_100T2_FD (1 << 10) /* Can do 100mbps T2, full-duplex */
64 #define MII_BMSR_100T2_HD (1 << 9) /* Can do 100mbps T2, half-duplex */
67 #define MII_BMSR_AN_COMP (1 << 5) /* Auto-negotiation complete */
[all …]
/openbmc/linux/drivers/soc/ixp4xx/
H A Dixp4xx-qmgr.c1 // SPDX-License-Identifier: GPL-2.0-only
21 static u32 used_sram_bitmap[4]; /* 128 16-dword pages */
37 __raw_writel(val, &qmgr_regs->acc[queue][0]); in qmgr_put_entry()
43 val = __raw_readl(&qmgr_regs->acc[queue][0]); in qmgr_get_entry()
55 return (__raw_readl(&qmgr_regs->stat1[queue >> 3]) in __qmgr_get_stat1()
62 return (__raw_readl(&qmgr_regs->stat2[queue >> 4]) in __qmgr_get_stat2()
67 * qmgr_stat_empty() - checks if a hardware queue is empty
70 * Returns non-zero value if the queue is empty.
79 * qmgr_stat_below_low_watermark() - checks if a queue is below low watermark
82 * Returns non-zero value if the queue is below low watermark.
[all …]
/openbmc/linux/drivers/soc/fsl/qe/
H A Dtsa.c1 // SPDX-License-Identifier: GPL-2.0
11 #include <dt-bindings/soc/cpm1-fsl,tsa.h>
135 return container_of(tsa_serial, struct tsa, serials[tsa_serial->id]); in tsa_serial_get_tsa()
170 switch (tsa_serial->id) { in tsa_serial_connect()
184 dev_err(tsa->dev, "Unsupported serial id %u\n", tsa_serial->id); in tsa_serial_connect()
185 return -EINVAL; in tsa_serial_connect()
188 spin_lock_irqsave(&tsa->lock, flags); in tsa_serial_connect()
189 tsa_clrsetbits32(tsa->si_regs + TSA_SICR, clear, set); in tsa_serial_connect()
190 spin_unlock_irqrestore(&tsa->lock, flags); in tsa_serial_connect()
202 switch (tsa_serial->id) { in tsa_serial_disconnect()
[all …]
/openbmc/u-boot/board/freescale/mpc8541cds/
H A Dtlb.c1 // SPDX-License-Identifier: GPL-2.0+
13 /* TLB 0 - for temp stack in cache */
28 * TLB 0: 16M Non-cacheable, guarded
37 * TLB 1: 256M Non-cacheable, guarded
38 * 0x80000000 256M PCI1 MEM First half
45 * TLB 2: 256M Non-cacheable, guarded
46 * 0x90000000 256M PCI1 MEM Second half
53 * TLB 3: 256M Non-cacheable, guarded
54 * 0xa0000000 256M PCI2 MEM First half
61 * TLB 4: 256M Non-cacheable, guarded
[all …]
/openbmc/u-boot/board/freescale/mpc8555cds/
H A Dtlb.c1 // SPDX-License-Identifier: GPL-2.0+
13 /* TLB 0 - for temp stack in cache */
28 * TLB 0: 16M Non-cacheable, guarded
37 * TLB 1: 256M Non-cacheable, guarded
38 * 0x80000000 256M PCI1 MEM First half
45 * TLB 2: 256M Non-cacheable, guarded
46 * 0x90000000 256M PCI1 MEM Second half
53 * TLB 3: 256M Non-cacheable, guarded
54 * 0xa0000000 256M PCI2 MEM First half
61 * TLB 4: 256M Non-cacheable, guarded
[all …]
/openbmc/u-boot/drivers/sound/
H A Dsound.c1 // SPDX-License-Identifier: GPL-2.0+
15 const int half = period / 2; in sound_create_square_wave() local
21 size--; in sound_create_square_wave()
26 for (i = 0; size && i < half; i++) { in sound_create_square_wave()
27 size -= 2; in sound_create_square_wave()
31 for (i = 0; size && i < period - half; i++) { in sound_create_square_wave()
32 size -= 2; in sound_create_square_wave()
34 *data++ = -amplitude; in sound_create_square_wave()
/openbmc/linux/include/clocksource/
H A Dtimer-davinci.h1 /* SPDX-License-Identifier: GPL-2.0-only */
22 * struct davinci_timer_cfg - davinci clocksource driver configuration struct
25 * @cmp_off: if set - it specifies the compare register used for clockevent
28 * clock half for both clocksource and clockevent and the compare register
32 * This is only used by da830 the DSP of which uses the top half. The timer
33 * driver still configures the top half to run in free-run mode.

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