Searched +full:gpz0 +full:- +full:0 (Results 1 – 5 of 5) sorted by relevance
/openbmc/linux/Documentation/devicetree/bindings/pinctrl/ |
H A D | samsung,pinctrl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Krzysztof Kozlowski <krzk@kernel.org> 11 - Sylwester Nawrocki <s.nawrocki@samsung.com> 12 - Tomasz Figa <tomasz.figa@gmail.com> 22 - External GPIO interrupts (see interrupts property in pin controller node); 24 - External wake-up interrupts - multiplexed (capable of waking up the system 25 see interrupts property in external wake-up interrupt controller node - 26 samsung,pinctrl-wakeup-interrupt.yaml); [all …]
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/openbmc/linux/arch/arm64/boot/dts/exynos/ |
H A D | exynos5433-pinctrl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Samsung's Exynos5433 SoC pin-mux and pin-config device tree source 8 * Samsung's Exynos5433 SoC pin-mux and pin-config options are listed as device 12 #include "exynos-pinctrl.h" 15 pin- ## _pin { \ 17 samsung,pin-function = <EXYNOS_PIN_FUNC_ ##_func>; \ 18 samsung,pin-pud = <EXYNOS_PIN_PULL_ ##_pull>; \ 19 samsung,pin-drv = <EXYNOS5433_PIN_DRV_ ##_drv>; \ 32 gpa0: gpa0-gpio-bank { 33 gpio-controller; [all …]
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/openbmc/linux/arch/arm/boot/dts/samsung/ |
H A D | exynos5260-pinctrl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Samsung's Exynos5260 SoC pin-mux and pin-config device tree source 8 * Samsung's Exynos5260 SoC pin-mux and pin-config options are listed as device 12 #include "exynos-pinctrl.h" 15 gpa0: gpa0-gpio-bank { 16 gpio-controller; 17 #gpio-cells = <2>; 19 interrupt-controller; 20 #interrupt-cells = <2>; 23 gpa1: gpa1-gpio-bank { [all …]
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/openbmc/linux/drivers/pinctrl/samsung/ |
H A D | pinctrl-exynos-arm64.c | 1 // SPDX-License-Identifier: GPL-2.0+ 17 #include <linux/soc/samsung/exynos-regs-pmu.h> 19 #include "pinctrl-samsung.h" 20 #include "pinctrl-exynos.h" 24 .reg_offset = { 0x00, 0x04, 0x08, 0x0c, 0x10, 0x14, }, 29 .reg_offset = { 0x00, 0x04, 0x08, 0x0c, }, 35 .reg_offset = { 0x00, 0x04, 0x08, 0x0c, 0x10, 0x14, }, 40 .reg_offset = { 0x00, 0x04, 0x08, 0x0c, }, 44 * Bank type for non-alive type. Bit fields: 49 .reg_offset = { 0x00, 0x04, 0x08, 0x0c, 0x10, 0x14, }, [all …]
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H A D | pinctrl-exynos-arm.c | 1 // SPDX-License-Identifier: GPL-2.0+ 20 #include <linux/soc/samsung/exynos-regs-pmu.h> 22 #include "pinctrl-samsung.h" 23 #include "pinctrl-exynos.h" 27 .reg_offset = { 0x00, 0x04, 0x08, 0x0c, 0x10, 0x14, }, 32 .reg_offset = { 0x00, 0x04, 0x08, 0x0c, }, 36 #define S5P_OTHERS 0xE000 45 void __iomem *clk_base = (void __iomem *)drvdata->retention_ctrl->priv; in s5pv210_retention_disable() 62 ctrl = devm_kzalloc(drvdata->dev, sizeof(*ctrl), GFP_KERNEL); in s5pv210_retention_init() 64 return ERR_PTR(-ENOMEM); in s5pv210_retention_init() [all …]
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