Home
last modified time | relevance | path

Searched +full:gpio30 +full:- +full:supply (Results 1 – 25 of 25) sorted by relevance

/openbmc/linux/Documentation/devicetree/bindings/power/
H A Drockchip-io-domain.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/power/rockchip-io-domain.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Heiko Stuebner <heiko@sntech.de>
42 to report their voltage. The IO Voltage Domain for any non-specified
48 - rockchip,px30-io-voltage-domain
49 - rockchip,px30-pmu-io-voltage-domain
50 - rockchip,rk3188-io-voltage-domain
51 - rockchip,rk3228-io-voltage-domain
[all …]
/openbmc/linux/arch/arm/boot/dts/rockchip/
H A Drk3288-rock2-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 #include <dt-bindings/pwm/pwm.h>
12 emmc_pwrseq: emmc-pwrseq {
13 compatible = "mmc-pwrseq-emmc";
14 pinctrl-0 = <&emmc_reset>;
15 pinctrl-names = "default";
16 reset-gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_LOW>;
19 ext_gmac: external-gmac-clock {
20 compatible = "fixed-clock";
21 #clock-cells = <0>;
[all …]
H A Drk3288-firefly-reload-core.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/input/input.h>
16 ext_gmac: external-gmac-clock {
17 compatible = "fixed-clock";
18 #clock-cells = <0>;
19 clock-frequency = <125000000>;
20 clock-output-names = "ext_gmac";
24 vcc_flash: flash-regulator {
25 compatible = "regulator-fixed";
26 regulator-name = "vcc_flash";
[all …]
H A Drk3288-vmarc-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/pinctrl/rockchip.h>
12 compatible = "vamrs,rk3288-vmarc-som", "rockchip,rk3288";
14 vccio_flash: vccio-flash-regulator {
15 compatible = "regulator-fixed";
16 regulator-name = "vccio_flash";
17 regulator-min-microvolt = <1800000>;
18 regulator-max-microvolt = <1800000>;
19 vin-supply = <&vcc_io>;
[all …]
H A Drk3288-miqi.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include <dt-bindings/input/input.h>
15 stdout-path = "serial2:115200n8";
23 ext_gmac: external-gmac-clock {
24 compatible = "fixed-clock";
25 #clock-cells = <0>;
26 clock-frequency = <125000000>;
27 clock-output-names = "ext_gmac";
31 compatible = "gpio-leds";
[all …]
H A Drk3288-phycore-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device tree file for Phytec phyCORE-RK3288 SoM
8 #include <dt-bindings/net/ti-dp83867.h>
13 compatible = "phytec,rk3288-phycore-som", "rockchip,rk3288";
29 ext_gmac: external-gmac-clock {
30 compatible = "fixed-clock";
31 #clock-cells = <0>;
32 clock-frequency = <125000000>;
33 clock-output-names = "ext_gmac";
36 leds: user-leds {
[all …]
H A Drk3288-vyasa.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
10 model = "Amarula Vyasa-RK3288";
11 compatible = "amarula,vyasa-rk3288", "rockchip,rk3288";
14 stdout-path = &uart2;
22 dc12_vbat: dc12-vbat {
23 compatible = "regulator-fixed";
24 regulator-name = "dc12_vbat";
25 regulator-min-microvolt = <12000000>;
26 regulator-max-microvolt = <12000000>;
[all …]
H A Drk3288-popmetal.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2014, 2015 Andy Yan <andy.yan@rock-chips.com>
6 /dts-v1/;
7 #include <dt-bindings/input/input.h>
11 model = "PopMetal-RK3288";
12 compatible = "chipspark,popmetal-rk3288", "rockchip,rk3288";
19 ext_gmac: external-gmac-clock {
20 compatible = "fixed-clock";
21 clock-frequency = <125000000>;
22 clock-output-names = "ext_gmac";
[all …]
H A Drk3288-firefly.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/input/input.h>
15 adc-keys {
16 compatible = "adc-keys";
17 io-channels = <&saradc 1>;
18 io-channel-names = "buttons";
19 keyup-threshold-microvolt = <1800000>;
21 button-recovery {
24 press-threshold-microvolt = <0>;
28 dovdd_1v8: dovdd-1v8-regulator {
[all …]
H A Drk3288-veyron.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/clock/rockchip,rk808.h>
9 #include <dt-bindings/input/input.h>
18 stdout-path = "serial2:115200n8";
31 power_button: power-button {
32 compatible = "gpio-keys";
33 pinctrl-names = "default";
34 pinctrl-0 = <&pwr_key_l>;
36 key-power {
40 debounce-interval = <100>;
[all …]
/openbmc/linux/drivers/soc/rockchip/
H A Dio-domain.c1 // SPDX-License-Identifier: GPL-2.0-only
26 * - If the voltage on a rail is above the "1.8" voltage (1.98V) we'll tell the
28 * - If the voltage on a rail is above the "3.3" voltage (3.6V) we'll consider
71 int (*write)(struct rockchip_iodomain_supply *supply, int uV);
79 int (*write)(struct rockchip_iodomain_supply *supply, int uV);
82 static int rk3568_iodomain_write(struct rockchip_iodomain_supply *supply, int uV) in rk3568_iodomain_write() argument
84 struct rockchip_iodomain *iod = supply->iod; in rk3568_iodomain_write()
89 switch (supply->idx) { in rk3568_iodomain_write()
93 b = supply->idx; in rk3568_iodomain_write()
95 b = supply->idx + 4; in rk3568_iodomain_write()
[all …]
/openbmc/linux/arch/arm64/boot/dts/rockchip/
H A Drk3368-lion.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
15 stdout-path = "serial0:115200n8";
18 ext_gmac: gmac-clk {
19 compatible = "fixed-clock";
20 clock-frequency = <125000000>;
21 clock-output-names = "ext_gmac";
22 #clock-cells = <0>;
26 compatible = "i2c-mux-gpio";
27 #address-cells = <1>;
[all …]
H A Drk3368-r88.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/input/input.h>
20 stdout-path = "serial2:115200n8";
28 emmc_pwrseq: emmc-pwrseq {
29 compatible = "mmc-pwrseq-emmc";
30 pinctrl-0 = <&emmc_reset>;
31 pinctrl-names = "default";
32 reset-gpios = <&gpio2 RK_PA3 GPIO_ACTIVE_HIGH>;
35 keys: gpio-keys {
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Drk3288-miqi.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR X11
14 ext_gmac: external-gmac-clock {
15 compatible = "fixed-clock";
16 #clock-cells = <0>;
17 clock-frequency = <125000000>;
18 clock-output-names = "ext_gmac";
21 io_domains: io-domains {
22 compatible = "rockchip,rk3288-io-voltage-domain";
25 audio-supply = <&vcca_33>;
26 flash0-supply = <&vcc_flash>;
[all …]
H A Drk3288-popmetal.dtsi2 * This file is dual-licensed: you can use it either under the terms
49 ext_gmac: external-gmac-clock {
50 compatible = "fixed-clock";
51 clock-frequency = <125000000>;
52 clock-output-names = "ext_gmac";
53 #clock-cells = <0>;
56 gpio-keys {
57 compatible = "gpio-keys";
60 pinctrl-names = "default";
61 pinctrl-0 = <&pwrbtn>;
[all …]
H A Drk3288-phycore-som.dtsi2 * Device tree file for Phytec phyCORE-RK3288 SoM
6 * This file is dual-licensed: you can use it either under the terms
45 #include <dt-bindings/net/ti-dp83867.h>
50 compatible = "phytec,rk3288-phycore-som", "rockchip,rk3288";
67 ext_gmac: external-gmac-clock {
68 compatible = "fixed-clock";
69 #clock-cells = <0>;
70 clock-frequency = <125000000>;
71 clock-output-names = "ext_gmac";
75 compatible = "rockchip,rk3288-io-voltage-domain";
[all …]
H A Drk3288-veyron.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/clock/rockchip,rk808.h>
9 #include <dt-bindings/input/input.h>
18 stdout-path = &uart2;
22 u-boot,dm-pre-reloc;
23 u-boot,boot0 = &spi_flash;
28 pinctrl-names = "default";
29 pinctrl-0 = <&fw_wp_ap>;
30 write-protect-gpio = <&gpio7 6 GPIO_ACTIVE_LOW>;
35 compatible = "pwm-backlight";
[all …]
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dsc7280-qcard.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
14 #include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h>
15 #include <dt-bindings/iio/qcom,spmi-adc7-pmr735a.h>
16 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
17 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
34 wcd9385: audio-codec-1 {
35 compatible = "qcom,wcd9385-codec";
36 pinctrl-names = "default", "sleep";
37 pinctrl-0 = <&wcd_reset_n>, <&us_euro_hs_sel>;
38 pinctrl-1 = <&wcd_reset_n_sleep>, <&us_euro_hs_sel>;
[all …]
H A Dsdm845-oneplus-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 /dts-v1/;
10 #include <dt-bindings/input/linux-event-codes.h>
11 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
12 #include <dt-bindings/sound/qcom,q6afe.h>
13 #include <dt-bindings/sound/qcom,q6asm.h>
16 #include "sdm845-wcd9340.dtsi"
20 /delete-node/ &rmtfs_mem;
29 stdout-path = "serial0:115200n8";
32 gpio-hall-sensor {
[all …]
H A Dsc7280-idp.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
8 #include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h>
9 #include <dt-bindings/input/linux-event-codes.h>
15 #include "sc7280-chrome-common.dtsi"
16 #include "sc7280-herobrine-lte-sku.dtsi"
25 max98360a: audio-codec-0 {
27 pinctrl-names = "default";
28 pinctrl-0 = <&amp_en>;
29 sdmode-gpios = <&tlmm 63 GPIO_ACTIVE_HIGH>;
30 #sound-dai-cells = <0>;
[all …]
H A Dmsm8996-sony-xperia-tone.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/leds/common.h>
15 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
16 #include <dt-bindings/pinctrl/qcom,pmic-mpp.h>
18 /delete-node/ &adsp_mem;
19 /delete-node/ &slpi_mem;
20 /delete-node/ &venus_mem;
21 /delete-node/ &gpu_mem;
[all …]
H A Dapq8096-db820c.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2014-2016, The Linux Foundation. All rights reserved.
6 /dts-v1/;
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/leds/common.h>
14 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
15 #include <dt-bindings/sound/qcom,q6afe.h>
16 #include <dt-bindings/sound/qcom,q6asm.h>
17 #include <dt-bindings/sound/qcom,wcd9335.h>
[all …]
H A Dsc7180-trogdor.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/gpio-keys.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
13 #include <dt-bindings/sound/sc7180-lpass.h>
16 #include "sc7180-firmware-tfa.dtsi"
22 thermal-zones {
23 charger_thermal: charger-thermal {
[all …]
H A Dqcs404.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/qcom,gcc-qcs404.h>
8 #include <dt-bindings/clock/qcom,turingcc-qcs404.h>
9 #include <dt-bindings/clock/qcom,rpmcc.h>
10 #include <dt-bindings/power/qcom-rpmpd.h>
11 #include <dt-bindings/thermal/thermal.h>
14 interrupt-parent = <&intc>;
16 #address-cells = <2>;
17 #size-cells = <2>;
[all …]
/openbmc/linux/arch/arm/boot/dts/qcom/
H A Dqcom-ipq8064.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/mfd/qcom-rpm.h>
6 #include <dt-bindings/clock/qcom,rpmcc.h>
7 #include <dt-bindings/clock/qcom,gcc-ipq806x.h>
8 #include <dt-bindings/clock/qcom,lcc-ipq806x.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/reset/qcom,gcc-ipq806x.h>
11 #include <dt-bindings/soc/qcom,gsbi.h>
[all …]