/openbmc/linux/Documentation/devicetree/bindings/connector/ |
H A D | usb-connector.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/connector/usb-connector.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: USB Connector 10 - Rob Herring <robh@kernel.org> 13 A USB connector node represents a physical USB connector. It should be a child 14 of a USB interface controller or a separate node when it is attached to both 15 MUX and USB interface controller. 20 - enum: [all …]
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/openbmc/linux/Documentation/devicetree/bindings/phy/ |
H A D | nvidia,tegra186-xusb-padctl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/phy/nvidia,tegra186-xusb-padctl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or 22 super-speed USB. Other lanes are for various types of low-speed, full-speed 23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller 24 contains a software-configurable mux that sits between the I/O controller [all …]
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H A D | nvidia,tegra210-xusb-padctl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/phy/nvidia,tegra210-xusb-padctl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or 22 super-speed USB. Other lanes are for various types of low-speed, full-speed 23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller 24 contains a software-configurable mux that sits between the I/O controller [all …]
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H A D | nvidia,tegra194-xusb-padctl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/phy/nvidia,tegra194-xusb-padctl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or 22 super-speed USB. Other lanes are for various types of low-speed, full-speed 23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller 24 contains a software-configurable mux that sits between the I/O controller [all …]
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H A D | nvidia,tegra124-xusb-padctl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/phy/nvidia,tegra124-xusb-padctl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or 22 super-speed USB. Other lanes are for various types of low-speed, full-speed 23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller 24 contains a software-configurable mux that sits between the I/O controller [all …]
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/openbmc/linux/Documentation/devicetree/bindings/usb/ |
H A D | mediatek,musb.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/usb/mediatek,musb.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Min Guo <min.guo@mediatek.com> 15 pattern: '^usb@[0-9a-f]+$' 19 - enum: 20 - mediatek,mt8516-musb 21 - mediatek,mt2701-musb 22 - mediatek,mt7623-musb [all …]
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H A D | mediatek,mtu3.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/usb/mediatek,mtu3.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Chunfeng Yun <chunfeng.yun@mediatek.com> 14 - $ref: usb-drd.yaml 23 - enum: 24 - mediatek,mt2712-mtu3 25 - mediatek,mt8173-mtu3 26 - mediatek,mt8183-mtu3 [all …]
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/openbmc/linux/arch/arm/boot/dts/aspeed/ |
H A D | aspeed-bmc-facebook-bletchley.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 3 /dts-v1/; 5 #include "aspeed-g6.dtsi" 6 #include <dt-bindings/gpio/aspeed-gpio.h> 7 #include <dt-bindings/usb/pd.h> 8 #include <dt-bindings/leds/leds-pca955x.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/i2c/i2c.h> 14 compatible = "facebook,bletchley-bmc", "aspeed,ast2600"; 29 iio-hwmon { [all …]
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/openbmc/linux/arch/arm/boot/dts/gemini/ |
H A D | gemini-dlink-dns-313.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 * Device Tree file for D-Link DNS-313 1-Bay Network Storage Enclosure 6 /dts-v1/; 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/thermal/thermal.h> 13 model = "D-Link DNS-313 1-Bay Network Storage Enclosure"; 14 compatible = "dlink,dns-313", "cortina,gemini"; 15 #address-cells = <1>; 16 #size-cells = <1>; 19 /* 64 MB SDRAM in a Nanya NT5DS32M16BS-6K package */ [all …]
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/openbmc/linux/arch/arm64/boot/dts/freescale/ |
H A D | imx8mp-venice-gw71xx.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/leds/common.h> 8 #include <dt-bindings/phy/phy-imx8-pcie.h> 11 led-controller { 12 compatible = "gpio-leds"; 13 pinctrl-names = "default"; 14 pinctrl-0 = <&pinctrl_gpio_leds>; 16 led-0 { 20 default-state = "on"; [all …]
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H A D | imx8mp-venice-gw72xx.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/leds/common.h> 8 #include <dt-bindings/phy/phy-imx8-pcie.h> 11 led-controller { 12 compatible = "gpio-leds"; 13 pinctrl-names = "default"; 14 pinctrl-0 = <&pinctrl_gpio_leds>; 16 led-0 { 20 default-state = "on"; [all …]
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H A D | imx8mm-tqma8mqml-mba8mx.dts | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) 3 * Copyright 2020-2021 TQ-Systems GmbH 6 /dts-v1/; 8 #include "imx8mm-tqma8mqml.dtsi" 12 model = "TQ-Systems GmbH i.MX8MM TQMa8MxML on MBa8Mx"; 13 compatible = "tq,imx8mm-tqma8mqml-mba8mx", "tq,imx8mm-tqma8mqml", "fsl,imx8mm"; 24 reg_usdhc2_vmmc: regulator-vmmc { 25 compatible = "regulator-fixed"; 26 pinctrl-names = "default"; 27 pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>; [all …]
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H A D | imx8mp-dhcom-pdk3.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 * DHCM-iMX8ML8-C160-R409-F1638-SPI16-GE-CAN2-SD-RTC-WBTA-ADC-T-RGB-CSI2-HS-I-01D2 7 * DHCOM PCB number: 660-100 or newer 8 * PDK3 PCB number: 669-100 or newer 11 /dts-v1/; 13 #include <dt-bindings/leds/common.h> 14 #include <dt-bindings/phy/phy-imx8-pcie.h> 15 #include "imx8mp-dhcom-som.dtsi" 19 compatible = "dh,imx8mp-dhcom-pdk3", "dh,imx8mp-dhcom-som", 23 stdout-path = &uart1; [all …]
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H A D | imx8mp-venice-gw73xx.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/leds/common.h> 8 #include <dt-bindings/phy/phy-imx8-pcie.h> 11 led-controller { 12 compatible = "gpio-leds"; 13 pinctrl-names = "default"; 14 pinctrl-0 = <&pinctrl_gpio_leds>; 16 led-0 { 20 default-state = "on"; [all …]
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/openbmc/u-boot/arch/arm/dts/ |
H A D | meson-gxbb-odroidc2.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 /dts-v1/; 10 #include "meson-gxbb.dtsi" 11 #include <dt-bindings/gpio/gpio.h> 14 compatible = "hardkernel,odroid-c2", "amlogic,meson-gxbb"; 15 model = "Hardkernel ODROID-C2"; 23 stdout-path = "serial0:115200n8"; 31 usb_otg_pwr: regulator-usb-pwrs { 32 compatible = "regulator-fixed"; 34 regulator-name = "USB_OTG_PWR"; [all …]
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/openbmc/linux/arch/arm/boot/dts/mediatek/ |
H A D | mt2701-evb.dts | 1 // SPDX-License-Identifier: GPL-2.0 8 /dts-v1/; 9 #include <dt-bindings/gpio/gpio.h> 14 compatible = "mediatek,mt2701-evb", "mediatek,mt2701"; 22 compatible = "mediatek,mt2701-cs42448-machine"; 25 audio-routing = 42 mediatek,audio-codec = <&cs42448>; 43 mediatek,audio-codec-bt-mrg = <&bt_sco_codec>; 44 pinctrl-names = "default"; 45 pinctrl-0 = <&aud_pins_default>; [all …]
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H A D | mt7623n-bananapi-bpi-r2.dts | 2 * Copyright 2017-2018 Sean Wang <sean.wang@mediatek.com> 4 * SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 /dts-v1/; 8 #include <dt-bindings/input/input.h> 13 model = "Bananapi BPI-R2"; 14 compatible = "bananapi,bpi-r2", "mediatek,mt7623"; 21 stdout-path = "serial2:115200n8"; 24 connector { 25 compatible = "hdmi-connector"; 28 ddc-i2c-bus = <&hdmiddc0>; [all …]
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/openbmc/linux/arch/arm/boot/dts/st/ |
H A D | stm32mp15xx-dhcom-picoitx.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause 6 #include <dt-bindings/input/input.h> 7 #include <dt-bindings/pwm/pwm.h> 17 stdout-path = "serial0:115200n8"; 21 compatible = "gpio-leds"; 23 led-0 { 26 default-state = "off"; 45 * NOTE: The USB Port on the PicoITX needs a PWR_EN signal to enable 46 * port power. This signal should be handled by USB power sequencing 47 * in order to turn on port power when USB bus is powered up, but so [all …]
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/openbmc/linux/arch/mips/boot/dts/ingenic/ |
H A D | gcw0.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 5 #include <dt-bindings/clock/ingenic,tcu.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/iio/adc/ingenic,adc.h> 9 #include <dt-bindings/input/input.h> 29 stdout-path = "serial2:57600n8"; 33 compatible = "regulator-fixed"; 34 regulator-name = "vcc"; 36 regulator-min-microvolt = <3300000>; [all …]
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/openbmc/linux/arch/arm64/boot/dts/qcom/ |
H A D | msm8916-samsung-serranove.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 6 /dts-v1/; 8 #include "msm8916-pm8916.dtsi" 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/input/input.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 22 * arch/arm/boot/dts/qcom-msm8916-samsung-serranove.dts 28 chassis-type = "handset"; 37 stdout-path = "serial0"; 40 reserved-memory { [all …]
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/openbmc/linux/Documentation/admin-guide/media/ |
H A D | cec.rst | 1 .. SPDX-License-Identifier: GPL-2.0 12 - Exynos4 13 - Exynos5 14 - STIH4xx HDMI CEC 15 - V4L2 adv7511 (same HW, but a different driver from the drm adv7511) 16 - stm32 17 - Allwinner A10 (sun4i) 18 - Raspberry Pi 19 - dw-hdmi (Synopsis IP) 20 - amlogic (meson ao-cec and ao-cec-g12a) [all …]
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/openbmc/linux/drivers/usb/phy/ |
H A D | phy-gpio-vbus-usb.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * gpio-vbus.c - simple GPIO VBUS sensing driver for B peripheral devices 10 #include <linux/gpio/consumer.h> 14 #include <linux/usb.h> 19 #include <linux/usb/gadget.h> 20 #include <linux/usb/otg.h> 24 * A simple GPIO VBUS sensing driver for B peripheral only devices 25 * with internal transceivers. It can control a D+ pullup GPIO and 60 struct regulator *vbus_draw = gpio_vbus->vbus_draw; in set_vbus_draw() 67 enabled = gpio_vbus->vbus_draw_enabled; in set_vbus_draw() [all …]
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/openbmc/linux/arch/arm64/boot/dts/mediatek/ |
H A D | mt8365-evk.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (c) 2021-2022 BayLibre, SAS. 9 /dts-v1/; 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/input/input.h> 13 #include <dt-bindings/pinctrl/mt8365-pinfunc.h> 19 compatible = "mediatek,mt8365-evk", "mediatek,mt8365"; 26 stdout-path = "serial0:921600n8"; 31 compatible = "linaro,optee-tz"; 36 gpio-keys { [all …]
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/openbmc/linux/arch/arm/boot/dts/marvell/ |
H A D | dove-sbc-a510.dts | 2 * Device Tree file for Compulab SBC-A510 Single Board Computer 6 * This file is dual-licensed: you can use it either under the terms 23 * b) Permission is hereby granted, free of charge, to any person 46 * SBC-A510 comprises a PCA9555 I2C GPIO expander its GPIO lines connected to 55 * 0.7 mini-PCIe slot W_DISABLE# 67 /dts-v1/; 69 #include "dove-cm-a510.dtsi" 72 model = "Compulab SBC-A510"; 73 compatible = "compulab,sbc-a510", "compulab,cm-a510", "marvell,dove"; 76 stdout-path = &uart0; [all …]
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/openbmc/linux/arch/arm64/boot/dts/amlogic/ |
H A D | meson-gxbb-odroidc2.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 /dts-v1/; 10 #include "meson-gxbb.dtsi" 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/sound/meson-aiu.h> 15 compatible = "hardkernel,odroid-c2", "amlogic,meson-gxbb"; 16 model = "Hardkernel ODROID-C2"; 24 stdout-path = "serial0:115200n8"; 32 usb_otg_pwr: regulator-usb-pwrs { 33 compatible = "regulator-fixed"; [all …]
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