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/openbmc/linux/drivers/gpio/
H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 # generic gpio support: platform drivers, dedicated expander chips, etc
4 ccflags-$(CONFIG_DEBUG_GPIO) += -DDEBUG
6 obj-$(CONFIG_GPIOLIB) += gpiolib.o
7 obj-$(CONFIG_GPIOLIB) += gpiolib-devres.o
8 obj-$(CONFIG_GPIOLIB) += gpiolib-legacy.o
9 obj-$(CONFIG_OF_GPIO) += gpiolib-of.o
10 obj-$(CONFIG_GPIO_CDEV) += gpiolib-cdev.o
11 obj-$(CONFIG_GPIO_SYSFS) += gpiolib-sysfs.o
12 obj-$(CONFIG_GPIO_ACPI) += gpiolib-acpi.o
[all …]
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 # GPIO infrastructure and drivers
7 bool "GPIO Support"
9 This enables GPIO support through the generic GPIO library.
11 one or more of the GPIO drivers below.
47 this symbol, but new drivers should use the generic gpio-regmap
51 bool "Debug GPIO calls"
54 Say Y here to add some extra checks and diagnostics to GPIO calls.
57 non-sleeping contexts. They can make bitbanged serial protocols
62 bool "/sys/class/gpio/... (sysfs interface)" if EXPERT
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H A Dgpio-regmap.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * regmap based generic GPIO driver
17 #include <linux/gpio/driver.h>
18 #include <linux/gpio/regmap.h>
33 int (*reg_mask_xlate)(struct gpio_regmap *gpio, unsigned int base,
48 static int gpio_regmap_simple_xlate(struct gpio_regmap *gpio, in gpio_regmap_simple_xlate() argument
52 unsigned int line = offset % gpio->ngpio_per_reg; in gpio_regmap_simple_xlate()
53 unsigned int stride = offset / gpio->ngpio_per_reg; in gpio_regmap_simple_xlate()
55 *reg = base + stride * gpio->reg_stride; in gpio_regmap_simple_xlate()
63 struct gpio_regmap *gpio = gpiochip_get_data(chip); in gpio_regmap_get() local
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/openbmc/linux/Documentation/translations/zh_CN/driver-api/gpio/
H A Dlegacy.rst1 .. SPDX-License-Identifier: GPL-2.0
3 .. include:: ../../disclaimer-zh_CN.rst
5 :Original: Documentation/driver-api/gpio/legacy.rst
26 "通用输入/输出口"(GPIO)是一个灵活的由软件控制的数字信号。他们可
29 “球珠”的一个位。电路板原理图显示了 GPIO 与外部硬件的连接关系。
32 片上系统 (SOC) 处理器对 GPIO 有很大的依赖。在某些情况下,每个
33 非专用引脚都可配置为 GPIO,且大多数芯片都最少有一些 GPIO。
34 可编程逻辑器件(类似 FPGA) 可以方便地提供 GPIO。像电源管理和
37 芯片。大多数 PC 的南桥有一些拥有 GPIO 能力的引脚 (只有BIOS
40 GPIO 的实际功能因系统而异。通常用法有:
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/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Dqcom,pmic-gpio.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,pmic-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm PMIC GPIO block
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
13 This binding describes the GPIO block(s) found in the 8xxx series of
19 - enum:
20 - qcom,pm2250-gpio
21 - qcom,pm660-gpio
[all …]
H A Dmarvell,kirkwood-pinctrl.txt3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
7 - compatible: "marvell,88f6180-pinctrl",
8 "marvell,88f6190-pinctrl", "marvell,88f6192-pinctrl",
9 "marvell,88f6281-pinctrl", "marvell,88f6282-pinctrl",
10 "marvell,98dx4122-pinctrl", "marvell,98dx1135-pinctrl"
11 - reg: register specifier of MPP registers
14 It also support the 88f6281-based variant in the 98dx412x Bobcat SoCs.
24 mpp0 0 gpio, nand(io2), spi(cs)
28 mpp4 4 gpio, nand(io6), uart0(rxd), ptp(clk)
32 mpp8 8 gpio, twsi0(sda), uart0(rts), uart1(rts), ptp(clk),
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H A Dmarvell,armada-37xx-pinctrl.txt1 * Marvell Armada 37xx SoC pin and gpio controller
3 Each Armada 37xx SoC come with two pin and gpio controller one for the
6 Inside this set of register the gpio latch allows exposing some
11 GPIO and pin controller:
12 ------------------------
16 Refer to pinctrl-bindings.txt in this directory for details of the
22 - compatible: "marvell,armada3710-sb-pinctrl", "syscon, "simple-mfd"
24 "marvell,armada3710-nb-pinctrl", "syscon, "simple-mfd"
26 - reg: The first set of register are for pinctrl/gpio and the second
28 - interrupts: list of the interrupt use by the gpio
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/openbmc/u-boot/arch/arm/dts/
H A Ds5pc110-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * U-Boot additions to enable a generic Exynos GPIO driver
10 #address-cells = <1>;
11 #size-cells = <1>;
13 gpio-controller;
14 #gpio-cells = <2>;
18 gpio-controller;
19 #gpio-cells = <2>;
23 gpio-controller;
24 #gpio-cells = <2>;
[all …]
H A Ds5pc100-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * U-Boot additions to enable a generic Exynos GPIO driver
11 gpio-controller;
12 #gpio-cells = <2>;
16 gpio-controller;
17 #gpio-cells = <2>;
21 gpio-controller;
22 #gpio-cells = <2>;
26 gpio-controller;
27 #gpio-cells = <2>;
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H A Dexynos5250-pinctrl.dtsi2 * Samsung's Exynos5250 SoC pin-mux and pin-config device tree source
7 * Samsung's Exynos5250 SoC pin-mux and pin-config optiosn are listed as device
18 gpio-controller;
19 #gpio-cells = <2>;
21 interrupt-controller;
22 #interrupt-cells = <2>;
26 gpio-controller;
27 #gpio-cells = <2>;
29 interrupt-controller;
30 #interrupt-cells = <2>;
[all …]
H A Dexynos4x12-pinctrl.dtsi2 * Samsung's Exynos4x12 SoCs pin-mux and pin-config device tree source
7 * Samsung's Exynos4x12 SoCs pin-mux and pin-config optiosn are listed as device
18 gpio-controller;
19 #gpio-cells = <2>;
21 interrupt-controller;
22 #interrupt-cells = <2>;
26 gpio-controller;
27 #gpio-cells = <2>;
29 interrupt-controller;
30 #interrupt-cells = <2>;
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H A Dexynos4210-pinctrl.dtsi2 * Samsung's Exynos4210 SoC pin-mux and pin-config device tree source
4 * Copyright (c) 2011-2012 Samsung Electronics Co., Ltd.
6 * Copyright (c) 2011-2012 Linaro Ltd.
9 * Samsung's Exynos4210 SoC pin-mux and pin-config optiosn are listed as device
20 gpio-controller;
21 #gpio-cells = <2>;
23 interrupt-controller;
24 #interrupt-cells = <2>;
28 gpio-controller;
29 #gpio-cells = <2>;
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H A Dexynos54xx-pinctrl.dtsi2 * Samsung's Exynos5420 SoC pin-mux and pin-config device tree source
7 * Samsung's Exynos5420 SoC pin-mux and pin-config options are listed as device
15 #include "exynos54xx-pinctrl-uboot.dtsi"
20 gpio-controller;
21 #gpio-cells = <2>;
23 interrupt-controller;
24 #interrupt-cells = <2>;
28 gpio-controller;
29 #gpio-cells = <2>;
31 interrupt-controller;
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/openbmc/linux/Documentation/translations/zh_TW/
H A Dgpio.txt1 Chinese translated version of Documentation/admin-guide/gpio
12 ---------------------------------------------------------------------
13 Documentation/admin-guide/gpio 的繁體中文翻譯
26 ---------------------------------------------------------------------
27 GPIO 接口
37 "通用輸入/輸出口"(GPIO)是一個靈活的由軟體控制的數位訊號。他們可
40 「球珠」的一個位。電路板原理圖顯示了 GPIO 與外部硬體的連接關係。
43 片上系統 (SOC) 處理器對 GPIO 有很大的依賴。在某些情況下,每個
44 非專用引腳都可配置爲 GPIO,且大多數晶片都最少有一些 GPIO。
45 可編程邏輯器件(類似 FPGA) 可以方便地提供 GPIO。像電源管理和
[all …]
/openbmc/linux/drivers/gpu/drm/amd/display/dc/gpio/
H A Dgpio_base.c2 * Copyright 2012-15 Advanced Micro Devices, Inc.
27 * Pre-requisites: headers required by header of this unit
40 * Post-requisites: headers required by this unit
53 struct gpio *gpio, in dal_gpio_open() argument
56 return dal_gpio_open_ex(gpio, mode); in dal_gpio_open()
60 struct gpio *gpio, in dal_gpio_open_ex() argument
63 if (gpio->pin) { in dal_gpio_open_ex()
68 // No action if allocation failed during gpio construct in dal_gpio_open_ex()
69 if (!gpio->hw_container.ddc) { in dal_gpio_open_ex()
73 gpio->mode = mode; in dal_gpio_open_ex()
[all …]
/openbmc/u-boot/doc/device-tree-bindings/gpio/
H A Dgpio.txt1 Specifying GPIO information for devices
5 -----------------
8 properties, each containing a 'gpio-list':
10 gpio-list ::= <single-gpio> [gpio-list]
11 single-gpio ::= <gpio-phandle> <gpio-specifier>
12 gpio-phandle : phandle to gpio controller node
13 gpio-specifier : Array of #gpio-cells specifying specific gpio
16 GPIO properties should be named "[<name>-]gpios", with <name> being the purpose
17 of this GPIO for the device. While a non-existent <name> is considered valid
21 GPIO properties can contain one or more GPIO phandles, but only in exceptional
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/openbmc/u-boot/drivers/gpio/
H A Dadi_gpio2.c5 * Copyright 2008-2013 Analog Devices Inc.
7 * Licensed under the GPL-2 or later
12 #include <asm/gpio.h>
20 static void gpio_error(unsigned gpio) in gpio_error() argument
22 printf("adi_gpio2: GPIO %d wasn't requested!\n", gpio); in gpio_error()
30 str_ident[ident].name[RESOURCE_LABEL_SIZE - 1] = 0; in set_label()
42 printf("adi_gpio2: please provide none-null label\n"); in cmp_label()
47 return -EINVAL; in cmp_label()
56 static DECLARE_RESERVED_MAP(gpio, GPIO_BANK_NUM);
59 inline int check_gpio(unsigned gpio) in check_gpio() argument
[all …]
H A Dtegra_gpio.c1 // SPDX-License-Identifier: GPL-2.0+
3 * NVIDIA Tegra20 GPIO handling.
4 * (C) Copyright 2010-2012,2015
21 #include <asm/gpio.h>
22 #include <dm/device-internal.h>
23 #include <dt-bindings/gpio/gpio.h>
33 int base_gpio; /* Port number for this port (0, 1,.., n-1) */
36 /* Information about each port at run-time */
39 int base_gpio; /* Port number for this port (0, 1,.., n-1) */
42 /* Return config of pin 'gpio' as GPIO (1) or SFIO (0) */
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/openbmc/linux/arch/arm/boot/dts/samsung/
H A Dexynos5410-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Exynos5410 SoC pin-mux and pin-config device tree source
9 #include "exynos-pinctrl.h"
12 gpa0: gpa0-gpio-bank {
13 gpio-controller;
14 #gpio-cells = <2>;
16 interrupt-controller;
17 #interrupt-cells = <2>;
20 gpa1: gpa1-gpio-bank {
21 gpio-controller;
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/openbmc/linux/arch/arc/boot/dts/
H A Dabilis_tb101.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
15 bus-frequency = <166666666>;
18 clock-frequency = <1000000000>;
21 clock-mult = <1>;
22 clock-div = <2>;
25 clock-mult = <1>;
26 clock-div = <6>;
31 pctl_tsin_s0: pctl-tsin-s0 { /* Serial TS-in 0 */
34 pctl_tsin_s1: pctl-tsin-s1 { /* Serial TS-in 1 */
37 pctl_gpio_a: pctl-gpio-a { /* GPIO bank A */
[all …]
H A Dabilis_tb100.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
15 bus-frequency = <166666666>;
18 clock-frequency = <1000000000>;
21 clock-mult = <1>;
22 clock-div = <2>;
25 clock-mult = <1>;
26 clock-div = <6>;
31 pctl_tsin_s0: pctl-tsin-s0 { /* Serial TS-in 0 */
34 pctl_tsin_s1: pctl-tsin-s1 { /* Serial TS-in 1 */
37 pctl_gpio_a: pctl-gpio-a { /* GPIO bank A */
[all …]
/openbmc/linux/include/linux/
H A Dgpio.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * <linux/gpio.h>
5 * This is the LEGACY GPIO bulk include file, including legacy APIs. It is
6 * used for GPIO drivers still referencing the global GPIO numberspace,
9 * If you're implementing a GPIO driver, only include <linux/gpio/driver.h>
10 * If you're implementing a GPIO consumer, only include <linux/gpio/consumer.h>
19 /* see Documentation/driver-api/gpio/legacy.rst */
21 /* make these flag values available regardless of GPIO kconfig options */
32 /* Gpio pin is active-low */
36 * struct gpio - a structure describing a GPIO with configuration
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/openbmc/linux/Documentation/admin-guide/gpio/
H A Dgpio-sim.rst1 .. SPDX-License-Identifier: GPL-2.0-or-later
3 Configfs GPIO Simulator
6 The configfs GPIO Simulator (gpio-sim) provides a way to create simulated GPIO
8 using the standard GPIO character device interface as well as manipulated
12 ------------------------
14 The gpio-sim module registers a configfs subsystem called ``'gpio-sim'``. For
21 **Group:** ``/config/gpio-sim``
23 This is the top directory of the gpio-sim configfs tree.
25 **Group:** ``/config/gpio-sim/gpio-device``
27 **Attribute:** ``/config/gpio-sim/gpio-device/dev_name``
[all …]
/openbmc/u-boot/doc/device-tree-bindings/pinctrl/
H A Dmarvell,armada-37xx-pinctrl.txt1 * Marvell Armada 37xx SoC pin and GPIO controller
3 Each Armada 37xx SoC comes with two pin and GPIO controllers, one for the
6 GPIO and pin controller:
7 ------------------------
11 Refer to pinctrl-bindings.txt in this directory for details of the
17 - compatible: "marvell,armada3710-sb-pinctrl", "syscon, "simple-mfd"
19 "marvell,armada3710-nb-pinctrl", "syscon, "simple-mfd"
21 - reg: The first set of registers is for pinctrl/GPIO and the second
23 - interrupts: list of interrupts used by the GPIO
28 - pins 20-24
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/openbmc/linux/Documentation/devicetree/bindings/gpio/
H A Dfsl-imx-gpio.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/gpio/fsl-imx-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale i.MX/MXC GPIO controller
10 - Anson Huang <Anson.Huang@nxp.com>
15 - enum:
16 - fsl,imx1-gpio
17 - fsl,imx21-gpio
18 - fsl,imx31-gpio
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