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/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Dsamsung,pinctrl.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
11 - Sylwester Nawrocki <s.nawrocki@samsung.com>
12 - Tomasz Figa <tomasz.figa@gmail.com>
22 - External GPIO interrupts (see interrupts property in pin controller node);
24 - External wake-up interrupts - multiplexed (capable of waking up the system
25 see interrupts property in external wake-up interrupt controller node -
26 samsung,pinctrl-wakeup-interrupt.yaml);
[all …]
H A Dsamsung,pinctrl-pins-cfg.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/samsung,pinctrl-pins-cfg.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung S3C/S5P/Exynos SoC pin controller - pins configuration
10 - Krzysztof Kozlowski <krzk@kernel.org>
11 - Sylwester Nawrocki <s.nawrocki@samsung.com>
12 - Tomasz Figa <tomasz.figa@gmail.com>
21 manual and these values are programmed as-is into the pin pull up/down and
22 driver strength register of the pin-controller.
[all …]
/openbmc/linux/arch/arm/boot/dts/samsung/
H A Dexynos3250-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung's Exynos3250 SoCs pin-mux and pin-config device tree source
8 * Samsung's Exynos3250 SoCs pin-mux and pin-config options are listed as device
12 #include "exynos-pinctrl.h"
15 pin- ## _pin { \
17 samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; \
18 samsung,pin-pud = <EXYNOS_PIN_PULL_ ##_pull>; \
19 samsung,pin-drv = <EXYNOS4_PIN_DRV_ ##_drv>; \
23 pin- ## _pin { \
25 samsung,pin-con-pdn = <EXYNOS_PIN_PDN_ ##_mode>; \
[all …]
H A Dexynos5410-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Exynos5410 SoC pin-mux and pin-config device tree source
9 #include "exynos-pinctrl.h"
12 gpa0: gpa0-gpio-bank { label
13 gpio-controller;
14 #gpio-cells = <2>;
16 interrupt-controller;
17 #interrupt-cells = <2>;
20 gpa1: gpa1-gpio-bank {
21 gpio-controller;
[all …]
H A Dexynos5420-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung's Exynos5420 SoC pin-mux and pin-config device tree source
8 * Samsung's Exynos5420 SoC pin-mux and pin-config options are listed as device
12 #include "exynos-pinctrl.h"
15 gpy7: gpy7-gpio-bank {
16 gpio-controller;
17 #gpio-cells = <2>;
19 interrupt-controller;
20 #interrupt-cells = <2>;
23 gpx0: gpx0-gpio-bank {
[all …]
H A Ds5pv210-fascinate4g.dts1 // SPDX-License-Identifier: GPL-2.0
3 /dts-v1/;
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
6 #include "s5pv210-aries.dtsi"
9 model = "Samsung Galaxy S Fascinate 4G (SGH-T959P) based on S5PV210";
11 chassis-type = "handset";
14 stdout-path = &uart2;
17 gpio-keys {
18 compatible = "gpio-keys";
[all …]
H A Dexynos5250-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung's Exynos5250 SoC pin-mux and pin-config device tree source
8 * Samsung's Exynos5250 SoC pin-mux and pin-config options are listed as device
12 #include "exynos-pinctrl.h"
15 gpa0: gpa0-gpio-bank { label
16 gpio-controller;
17 #gpio-cells = <2>;
19 interrupt-controller;
20 #interrupt-cells = <2>;
23 gpa1: gpa1-gpio-bank {
[all …]
H A Ds5pv210-galaxys.dts1 // SPDX-License-Identifier: GPL-2.0
3 /dts-v1/;
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
6 #include "s5pv210-aries.dtsi"
9 model = "Samsung Galaxy S1 (GT-I9000) based on S5PV210";
11 chassis-type = "handset";
14 stdout-path = &uart2;
17 nand_pwrseq: nand-pwrseq {
18 compatible = "mmc-pwrseq-simple";
[all …]
H A Dexynos4210-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung's Exynos4210 SoC pin-mux and pin-config device tree source
5 * Copyright (c) 2011-2012 Samsung Electronics Co., Ltd.
7 * Copyright (c) 2011-2012 Linaro Ltd.
10 * Samsung's Exynos4210 SoC pin-mux and pin-config options are listed as device
14 #include "exynos-pinctrl.h"
17 gpa0: gpa0-gpio-bank { label
18 gpio-controller;
19 #gpio-cells = <2>;
21 interrupt-controller;
[all …]
H A Dexynos4x12-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung's Exynos4x12 SoCs pin-mux and pin-config device tree source
8 * Samsung's Exynos4x12 SoCs pin-mux and pin-config options are listed as device
12 #include "exynos-pinctrl.h"
15 pin- ## _pin { \
17 samsung,pin-con-pdn = <EXYNOS_PIN_PDN_ ##_mode>; \
18 samsung,pin-pud-pdn = <EXYNOS_PIN_PULL_ ##_pull>; \
22 gpa0: gpa0-gpio-bank { label
23 gpio-controller;
24 #gpio-cells = <2>;
[all …]
H A Dexynos3250-monk.dts1 // SPDX-License-Identifier: GPL-2.0
12 /dts-v1/;
14 #include "exynos4412-ppmu-common.dtsi"
15 #include <dt-bindings/input/input.h>
16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/clock/samsung,s2mps11.h>
34 compatible = "samsung,secure-firmware";
38 gpio-keys {
39 compatible = "gpio-keys";
41 power-key {
[all …]
H A Dexynos4212-tab3-lte8.dts1 // SPDX-License-Identifier: GPL-2.0
10 /dts-v1/;
11 #include "exynos4212-tab3.dtsi"
14 model = "Samsung Galaxy Tab 3 8.0 LTE (SM-T315) based on Exynos4212";
16 chassis-type = "tablet";
21 PIN_SLP(gpa0-4, INPUT, UP);
22 PIN_SLP(gpa0-5, INPUT, UP);
24 PIN_SLP(gpb-5, INPUT, UP);
26 PIN_SLP(gpc0-0, PREV, NONE);
27 PIN_SLP(gpc1-3, INPUT, NONE);
[all …]
H A Ds5pv210-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung's S5PV210 SoC device tree source - pin control-related
6 * Copyright (c) 2013-2014 Samsung Electronics, Co. Ltd.
11 * Samsung's S5PV210 SoC pin banks, pin-mux and pin-config options are
15 #include "s5pv210-pinctrl.h"
18 pin- ## _pin { \
20 samsung,pin-con-pdn = <S5PV210_PIN_PDN_ ##_mode>; \
21 samsung,pin-pud-pdn = <S5PV210_PIN_PULL_ ##_pull>; \
25 gpa0: gpa0-gpio-bank { label
26 gpio-controller;
[all …]
H A Dexynos4210-i9100.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung's Exynos4210 based Galaxy S2 (GT-I9100 version) device tree
11 /dts-v1/;
13 #include "exynos4412-ppmu-common.dtsi"
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/input/linux-event-codes.h>
19 model = "Samsung Galaxy S2 (GT-I9100)";
21 chassis-type = "handset";
35 stdout-path = "serial2:115200n8";
38 vemmc_reg: regulator-0 {
[all …]
H A Dexynos3250-rinato.dts1 // SPDX-License-Identifier: GPL-2.0
12 /dts-v1/;
14 #include "exynos4412-ppmu-common.dtsi"
15 #include <dt-bindings/input/input.h>
16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/clock/samsung,s2mps11.h>
22 chassis-type = "watch";
31 stdout-path = &serial_1;
40 compatible = "samsung,secure-firmware";
44 gpio-keys {
[all …]
H A Dexynos5260-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung's Exynos5260 SoC pin-mux and pin-config device tree source
8 * Samsung's Exynos5260 SoC pin-mux and pin-config options are listed as device
12 #include "exynos-pinctrl.h"
15 gpa0: gpa0-gpio-bank { label
16 gpio-controller;
17 #gpio-cells = <2>;
19 interrupt-controller;
20 #interrupt-cells = <2>;
23 gpa1: gpa1-gpio-bank {
[all …]
H A Dexynos4412-p4note.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 * Based on exynos4412-midas.dtsi.
10 /dts-v1/;
12 #include "exynos4412-ppmu-common.dtsi"
14 #include <dt-bindings/clock/maxim,max77686.h>
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/input/linux-event-codes.h>
17 #include <dt-bindings/interrupt-controller/irq.h>
18 #include <dt-bindings/power/summit,smb347-charger.h>
19 #include "exynos-pinctrl.h"
[all …]
/openbmc/linux/arch/arm64/boot/dts/exynos/
H A Dexynos5433-tm2-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
11 /dts-v1/;
13 #include <dt-bindings/clock/samsung,s2mps11.h>
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/input/input.h>
16 #include <dt-bindings/interrupt-controller/irq.h>
17 #include <dt-bindings/sound/samsung-i2s.h>
48 stdout-path = &serial_1;
56 gpio-keys {
57 compatible = "gpio-keys";
[all …]
H A Dexynos850-e850-96.dts1 // SPDX-License-Identifier: GPL-2.0
3 * WinLink E850-96 board device tree source
8 * Device tree source file for WinLink's E850-96 board which is based on
12 /dts-v1/;
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/input/input.h>
17 #include <dt-bindings/leds/common.h>
20 model = "WinLink E850-96 board";
21 compatible = "winlink,e850-96", "samsung,exynos850";
29 stdout-path = &serial_0;
[all …]
/openbmc/u-boot/drivers/pinctrl/exynos/
H A Dpinctrl-exynos.c1 // SPDX-License-Identifier: GPL-2.0+
12 #include "pinctrl-exynos.h"
35 /* given a pin-name, return the address of pin config registers */
40 const struct samsung_pin_ctrl *pin_ctrl = priv->pin_ctrl; in pin_to_bank_base()
41 const struct samsung_pin_bank_data *bank_data = pin_ctrl->pin_banks; in pin_to_bank_base()
42 u32 nr_banks = pin_ctrl->nr_banks, idx = 0; in pin_to_bank_base()
46 * The format of the pin name is <bank name>-<pin_number>. in pin_to_bank_base()
47 * Example: gpa0-4 (gpa0 is the bank name and 4 is the pin number. in pin_to_bank_base()
49 while (pin_name[idx] != '-') { in pin_to_bank_base()
54 *pin = pin_name[++idx] - '0'; in pin_to_bank_base()
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Ds5pc110-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * U-Boot additions to enable a generic Exynos GPIO driver
10 #address-cells = <1>;
11 #size-cells = <1>;
12 gpa0: gpa0 { label
13 gpio-controller;
14 #gpio-cells = <2>;
18 gpio-controller;
19 #gpio-cells = <2>;
23 gpio-controller;
[all …]
H A Dexynos5250-pinctrl.dtsi2 * Samsung's Exynos5250 SoC pin-mux and pin-config device tree source
7 * Samsung's Exynos5250 SoC pin-mux and pin-config optiosn are listed as device
17 gpa0: gpa0 { label
18 gpio-controller;
19 #gpio-cells = <2>;
21 interrupt-controller;
22 #interrupt-cells = <2>;
26 gpio-controller;
27 #gpio-cells = <2>;
29 interrupt-controller;
[all …]
H A Dexynos54xx-pinctrl.dtsi2 * Samsung's Exynos5420 SoC pin-mux and pin-config device tree source
7 * Samsung's Exynos5420 SoC pin-mux and pin-config options are listed as device
15 #include "exynos54xx-pinctrl-uboot.dtsi"
20 gpio-controller;
21 #gpio-cells = <2>;
23 interrupt-controller;
24 #interrupt-cells = <2>;
28 gpio-controller;
29 #gpio-cells = <2>;
31 interrupt-controller;
[all …]
/openbmc/linux/drivers/pinctrl/samsung/
H A Dpinctrl-exynos-arm.c1 // SPDX-License-Identifier: GPL-2.0+
20 #include <linux/soc/samsung/exynos-regs-pmu.h>
22 #include "pinctrl-samsung.h"
23 #include "pinctrl-exynos.h"
26 .fld_width = { 4, 1, 2, 2, 2, 2, },
31 .fld_width = { 4, 1, 2, 2, },
38 #define S5P_OTHERS_RET_IO (1 << 31)
39 #define S5P_OTHERS_RET_CF (1 << 30)
40 #define S5P_OTHERS_RET_MMC (1 << 29)
41 #define S5P_OTHERS_RET_UART (1 << 28)
[all …]
/openbmc/u-boot/doc/device-tree-bindings/gpio/
H A Dgpio-samsung.txt4 - compatible: Compatible property value should be "samsung,exynos4-gpio>".
6 - reg: Physical base address of the controller and length of memory mapped
9 - #gpio-cells: Should be 4. The syntax of the gpio specifier used by client nodes
18 - Pin number: is a value between 0 to 7.
19 - Flags and Pull Up/Down: 0 - Pull Up/Down Disabled.
20 1 - Pull Down Enabled.
21 3 - Pull Up Enabled.
22 Bit 16 (0x00010000) - Input is active low.
23 - Drive Strength: 0 - 1x,
24 1 - 3x,
[all …]

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