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/openbmc/linux/Documentation/devicetree/bindings/pci/
H A Dmediatek-pcie-cfg.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/pci/mediatek-pcie-cfg.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MediaTek PCIECFG controller
10 - Chuanjia Liu <chuanjia.liu@mediatek.com>
11 - Jianjun Wang <jianjun.wang@mediatek.com>
14 The MediaTek PCIECFG controller controls some feature about
20 - enum:
21 - mediatek,generic-pciecfg
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/openbmc/linux/arch/arm/boot/dts/mediatek/
H A Dmt7629.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/mt7629-clk.h>
11 #include <dt-bindings/power/mt7622-power.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/phy/phy.h>
14 #include <dt-bindings/reset/mt7629-resets.h>
18 interrupt-parent = <&sysirq>;
19 #address-cells = <1>;
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/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt7622.dtsi6 * SPDX-License-Identifier: (GPL-2.0 OR MIT)
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/clock/mt7622-clk.h>
12 #include <dt-bindings/phy/phy.h>
13 #include <dt-bindings/power/mt7622-power.h>
14 #include <dt-bindings/reset/mt7622-reset.h>
15 #include <dt-bindings/thermal/thermal.h>
19 interrupt-parent = <&sysirq>;
20 #address-cells = <2>;
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/openbmc/linux/drivers/pci/controller/
H A Dpcie-mediatek.c1 // SPDX-License-Identifier: GPL-2.0
74 /* PCIe V2 per-port registers */
127 (GENMASK(((size) - 1), 0) << ((where) & 0x3))
145 * struct mtk_pcie_soc - differentiate between host generations
165 * struct mtk_pcie_port - PCIe port information
209 * struct mtk_pcie - PCIe host information
213 * @free_ck: free-run reference clock
214 * @mem: non-prefetchable memory resource
216 * @soc: pointer to SoC-dependent operations
230 struct device *dev = pcie->dev; in mtk_pcie_subsys_powerdown()
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