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/openbmc/linux/Documentation/devicetree/bindings/gpu/
H A Dbrcm,bcm-v3d.yaml27 - description: GCA cache controller register (if GCA controller present)
35 - enum: [ bridge, gca ]
36 - enum: [ bridge, gca ]
70 reg-names = "hub", "core0", "bridge", "gca";
/openbmc/linux/drivers/gpu/drm/amd/pm/powerplay/inc/
H A Dsmu7_common.h46 #include "gca/gfx_8_0_d.h"
47 #include "gca/gfx_8_0_sh_mask.h"
/openbmc/linux/drivers/gpu/drm/amd/amdkfd/
H A Dkfd_device_queue_manager_vi.c26 #include "gca/gfx_8_0_enum.h"
27 #include "gca/gfx_8_0_sh_mask.h"
H A Dkfd_device_queue_manager_cik.c28 #include "gca/gfx_7_2_sh_mask.h"
H A Dkfd_mqd_manager_vi.c32 #include "gca/gfx_8_0_sh_mask.h"
33 #include "gca/gfx_8_0_enum.h"
/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_amdkfd_gfx_v7.c28 #include "gca/gfx_7_2_d.h"
29 #include "gca/gfx_7_2_enum.h"
30 #include "gca/gfx_7_2_sh_mask.h"
H A Damdgpu_amdkfd_gfx_v8.c26 #include "gca/gfx_8_0_sh_mask.h"
27 #include "gca/gfx_8_0_d.h"
28 #include "gca/gfx_8_0_enum.h"
H A Dmxgpu_vi.c30 #include "gca/gfx_8_0_d.h"
31 #include "gca/gfx_8_0_sh_mask.h"
H A Dsdma_v2_4.c41 #include "gca/gfx_8_0_d.h"
42 #include "gca/gfx_8_0_enum.h"
43 #include "gca/gfx_8_0_sh_mask.h"
H A Dcik_sdma.c37 #include "gca/gfx_7_2_d.h"
38 #include "gca/gfx_7_2_enum.h"
39 #include "gca/gfx_7_2_sh_mask.h"
H A Dvce_v3_0.c37 #include "gca/gfx_8_0_d.h"
40 #include "gca/gfx_8_0_sh_mask.h"
H A Dsdma_v3_0.c41 #include "gca/gfx_8_0_d.h"
42 #include "gca/gfx_8_0_enum.h"
43 #include "gca/gfx_8_0_sh_mask.h"
H A Dcik.c61 #include "gca/gfx_7_2_d.h"
62 #include "gca/gfx_7_2_enum.h"
63 #include "gca/gfx_7_2_sh_mask.h"
H A Dvi.c47 #include "gca/gfx_8_0_d.h"
48 #include "gca/gfx_8_0_sh_mask.h"
H A Ddce_v6_0.c46 #include "gca/gfx_6_0_d.h"
47 #include "gca/gfx_6_0_sh_mask.h"
52 #include "gca/gfx_7_2_enum.h"
H A Dgfx_v6_0.c35 #include "gca/gfx_6_0_d.h"
36 #include "gca/gfx_6_0_sh_mask.h"
41 #include "gca/gfx_7_2_enum.h"
H A Dgfx_v7_0.c43 #include "gca/gfx_7_0_d.h"
44 #include "gca/gfx_7_2_enum.h"
45 #include "gca/gfx_7_2_sh_mask.h"
/openbmc/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dci_baco.c38 #include "gca/gfx_7_2_d.h"
39 #include "gca/gfx_7_2_sh_mask.h"
/openbmc/linux/drivers/gpu/drm/amd/pm/powerplay/smumgr/
H A Dsmu8_smumgr.c39 #include "gca/gfx_8_0_d.h"
40 #include "gca/gfx_8_0_sh_mask.h"
H A Dci_smumgr.c50 #include "gca/gfx_7_2_d.h"
51 #include "gca/gfx_7_2_sh_mask.h"
H A Dvegam_smumgr.c32 #include "gca/gfx_8_0_d.h"
/openbmc/linux/drivers/gpu/drm/v3d/
H A Dv3d_drv.c260 ret = map_regs(v3d, &v3d->gca_regs, "gca"); in v3d_platform_drm_probe()
H A Dv3d_gem.c71 DRM_ERROR("Failed to wait for safe GCA shutdown\n"); in v3d_idle_gca()
/openbmc/linux/include/uapi/drm/
H A Dv3d_drm.h130 * The L1T, slice, L2C, L2T, and GCA caches will be flushed before
/openbmc/linux/drivers/gpu/drm/amd/pm/legacy-dpm/
H A Dkv_dpm.c37 #include "gca/gfx_7_2_d.h"
38 #include "gca/gfx_7_2_sh_mask.h"

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