| /openbmc/docs/designs/ |
| H A D | cper-records.md | 1 # CPER records - CPER
3 Author: Ed Tanous - edtanous
5 Created: 5-22-2024
29 [clear][cper_examples] that they would like OpenBMC to be the long-term
32 This library hosts the meson-dev branch, which was added for the purpose of this
33 design, and passes the OpenBMC CI tests currently. This is the proposed branch
38 - A BMC should be able to decode binary CPER records originated from a CPER
41 - BMC should be able to recieve and decode CPER records from a CPU per the [CPER
44 - A BIOS/EDK2 build should be able to share decoding code with OpenBMC, to the
48 - A CPU vendor should be able to add support for CPER extensions that OpenBMC
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| H A D | vpd-collection.md | 5 Created: 2019-06-11
10 Field Replaceable Units (FRUs) today - one example is the BMC FRU. On OpenPower
18 - Some of the VPD information such as FRU part number, serial number need to be
21 - Several use cases on the BMC require that the applications decide on a certain
26 - There are use cases for the BMC to send VPD data to the host
31 of certain parameters of the FRU (atypical - for FRUs that do not have an
34 This design document aims to define a high level design for VPD collection and
39 Essentially, the IPZ VPD structure consists of key-value pairs called keywords.
52 - IPZ VPD has different records and keywords.
54 - IPZ VPD is required to implement and validate ECC as defined in the OpenPower
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| H A D | bmc-service-failure-debug-and-recovery.md | 14 This design addresses a few classes of failures:
16 - A class of failure exists where a BMC service has entered a failed state but
18 - A class of failure exists under which we can attempt debug data collection
21 This proposal argues for and proposes a software-driven debug data capture and
26 By necessity, BMCs are not self-contained systems. BMCs exist to service the
27 needs of both the host system by providing in-band platform services such as
29 out-of-band system management interfaces such as error reporting, platform
35 are usually a domain-specific Linux distributions with complex or highly coupled
39 the BMC firmware. The BMC firmware design should provide for resilience and
40 recovery in the face of well-defined error conditions, but the need to mitigate
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| H A D | bmc-reset-with-host-up.md | 18 A good portion of this is explained in the phosphor-state-manager [README][1].
20 This design doc is written to formalize the design and add some more details on
28 - /run/openbmc/chassis@0-on
29 - /run/openbmc/host@0-on
31 It should be noted that although full support is not in place for multi-chassis
32 and multi-host systems, the framework is there to build on.
33 `op-reset-chassis-running@.service` is a templated service, checking pgood in
35 /run/openbmc/chassis@%i-on, to indicate power is on for that instance. Similar
36 implementation is done for the host via `phosphor-reset-host-check@.service` and
37 the file /run/openbmc/host@%i-on.
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| H A D | state-management-and-external-interfaces.md | 14 design is to get that support more complete.
23 [phoshor-state-manager][2] implements the xyz.openbmc_project.State.\*
28 the appropriate xyz.openbmc_project.State.\* D-Bus interface.
30 The goal with this design is to enhance the xyz.openbmc_project.State.\*
31 interfaces to support more of the Redfish ResetType. Specifically this design is
35 Currently phosphor-state-manager supports the following:
37 - Chassis: On/Off
38 - Host: On/Off/Reboot
60 "ForceOff": "Turn off the unit immediately (non-graceful shutdown).",
62 "ForceRestart": "Shut down immediately and non-gracefully and restart
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| H A D | device-tree-gpio-naming.md | 12 subsystem. The replacement is a "descriptor-based" character device interface.
25 specific field used to name the GPIOs in the DTS is `gpio-line-names`. This
29 scheme in the face of a universe of potential use-cases.
37 - Ensure common function GPIOs within OpenBMC use the same naming convention
39 ## Proposed Design
52 Pattern: `*-button`
55 BMC-less machines use a button to trigger system behavior and in a BMC-managed
59 #### power-button
68 - `host*-ready`: Host ready, active high
69 - `host*-ready-n`: Host ready, active low
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| /openbmc/entity-manager/src/gpio-presence/ |
| H A D | README.md | 1 # gpio-presence-sensor
3 This program was originally implemented following the [design][].
7 See the full [design][] for more details.
17 "PresencePinNames": ["presence-cable0"],
23 "PresencePinNames": ["presence-slot0a", "presence-slot0b"],
29 "PresencePinNames": ["presence-slot0a", "presence-slot0b"],
35 "PresencePinNames": ["presence-slot0a", "presence-slot0b"],
41 "PresencePinNames": ["presence-fanboard0"],
80 This is what the gpio-presence daemon exposes on dbus when the hardware is
87 components for which no standard / well-defined way exists to detect them
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| /openbmc/qemu/docs/devel/ |
| H A D | multi-thread-tcg.rst | 2 Copyright (c) 2015-2020 Linaro Ltd.
5 later. See the COPYING file in the top-level directory.
10 Multi-threaded TCG
13 This document outlines the design for multi-threaded TCG (a.k.a MTTCG)
14 system-mode emulation. user-mode emulation has always mirrored the
17 linux-user emulation.
19 The original system-mode TCG implementation was single threaded and
20 dealt with multiple CPUs with simple round-robin scheduling. This
22 being emulated gained additional cores and per-core performance gains
29 user-space thread. This is enabled by default for all FE/BE
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| /openbmc/webui-vue/ |
| H A D | README.md | 1 # webui-vue
3 webui-vue is a web-based user interface for the OpenBMC firmware stack built on
6 ## Hold on... What happened to phosphor-webui?
8 [phosphor-webui](https://github.com/openbmc/phosphor-webui) was built on
10 [AngularJS went End of Life](https://www.convective.com/angularjs-end-of-life/)
13 ## When will this new Vue.js application reach feature parity with phosphor-webui?
16 …s label:phosphor-webui-feature-parity](https://github.com/openbmc/webui-vue/issues?q=is%3Aissue+is…
19 ## What improvements does webui-vue have?
21 As mentioned, this application is built using Vue.js, a modern open-source
22 Model-View-ViewModel JavaScript framework supported by an active community and
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| /openbmc/docs/designs/mctp/ |
| H A D | mctp-userspace.md | 5 Please refer to the [MCTP Overview](mctp.md) document for general MCTP design
12 ## Proposed Design
20 provides a socket-based interface for other processes to send and receive
24 handling local MCTP-stack configuration, like local EID assignments.
30 2. one or more binding implementations (eg, MCTP-over-serial), which interact
33 3. an interface to handler applications over a unix-domain socket.
38 - an "upper" messaging transmit/receive interface, for tx/rx of a full message
41 - a "lower" hardware binding for transmit/receive of individual packets,
45 The lower interface would be plugged in to one of a number of hardware-specific
47 tree, but others can be plugged-in too, perhaps where the physical layer
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| /openbmc/u-boot/arch/arm/mach-at91/arm926ejs/ |
| H A D | timer.c | 1 // SPDX-License-Identifier: GPL-2.0+
3 * (C) Copyright 2007-2008
5 * Lead Tech Design <www.leadtechdesign.com>
35 * Use the PITC in full 32 bit incrementing mode
44 writel(TIMER_LOAD_VAL | AT91_PIT_MR_EN , &pit->mr); in timer_init()
46 gd->arch.timer_rate_hz = gd->arch.mck_rate_hz / 16; in timer_init()
56 return gd->arch.timer_rate_hz; in get_tbclk()
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| /openbmc/u-boot/arch/arm/mach-at91/armv7/ |
| H A D | timer.c | 1 // SPDX-License-Identifier: GPL-2.0+
3 * (C) Copyright 2007-2008
5 * Lead Tech Design <www.leadtechdesign.com>
38 * Use the PITC in full 32 bit incrementing mode
48 writel(TIMER_LOAD_VAL | AT91_PIT_MR_EN , &pit->mr); in timer_init()
50 gd->arch.timer_rate_hz = get_pit_clk_rate() / 16; in timer_init()
60 return gd->arch.timer_rate_hz; in get_tbclk()
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| /openbmc/docs/architecture/code-update/ |
| H A D | flash-layout.md | 4 code update application requires to be supported out-of-the-box, which includes
7 [code-update.md](code-update.md) for details about code update interfaces.
9 ## Design considerations
13 For system initialization and bootstrap, [Das U-Boot][] was selected as the
36 For storage of the root filesystem, a read-only volume was selected. This allows
38 data files, to be stored in a read-only filesystem image. Replacing read-only
50 read-only filesystem content. This applies to systems with limited attached
56 for the BMC can be stored in the U-Boot environment, and an init script can
72 The majority of the filesystem is stored in a read-only squashfs in an MTD
74 mounted read-write using the JFFS2 filesystem. This read-write filesystem is
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| H A D | firmware-update-over-redfish.md | 5 Created: 2019-02-11
14 The goal of this design document is to lay out the required changes of moving
30 - Redfish has a single upload and update API. OpenBMC has a concept of uploading
32 - Redfish does not support multiple firmware images being associated with the
36 - OpenBMC has the concept of a priority that allows a user to chose an image
40 - Redfish does not support deleting a firmware image (this happens by default
42 - Redfish does support the ability to update multiple targets with the same
44 - Redfish has support via a SimpleUpdate action which allows the user to pass in
47 - Redfish has the ability to schedule when a firmware update is applied
55 and this design will be proposing enhancements to that as a base.
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| /openbmc/qemu/ |
| H A D | gitdm.config | 12 # git log --numstat --since "Last Year" | gitdm -n -l 10
26 EmailMap contrib/gitdm/domain-map
29 # Use GroupMap to map a file full of addresses to the
34 GroupMap contrib/gitdm/group-map-alibaba Alibaba
35 GroupMap contrib/gitdm/group-map-amd AMD
36 GroupMap contrib/gitdm/group-map-cadence Cadence Design Systems
37 GroupMap contrib/gitdm/group-map-codeweavers CodeWeavers
38 GroupMap contrib/gitdm/group-map-facebook Facebook
39 GroupMap contrib/gitdm/group-map-ibm IBM
40 GroupMap contrib/gitdm/group-map-janustech Janus Technologies
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| /openbmc/u-boot/board/freescale/ls1043ardb/ |
| H A D | README | 2 --------
3 The LS1043A Reference Design Board (RDB) is a high-performance computing,
7 debugging environment. The LS1043A RDB is lead-free and RoHS-compliant.
10 --------------------
11 Please refer arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc for LS1043A
15 -----------------------
16 - SERDES Connections, 4 lanes supporting:
17 - PCI Express 2.0 with two PCIe connectors supporting: miniPCIe card and
19 - QSGMII with x4 RJ45 connector
20 - XFI with x1 RJ45 connector
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| /openbmc/u-boot/board/freescale/ls1046ardb/ |
| H A D | README | 2 --------
3 The LS1046A Reference Design Board (RDB) is a high-performance computing,
7 debugging environment. The LS1046A RDB is lead-free and RoHS-compliant.
10 --------------------
11 Please refer arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc for LS1046A
15 -----------------------
16 - SERDES1 Connections, 4 lanes supporting:
17 - Lane0: XFI with x1 RJ45 connector
18 - Lane1: XFI Cage
19 - Lane2: SGMII.5
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| /openbmc/libmctp/docs/bindings/ |
| H A D | vendor-ibm-astlpc.md | 5 This design provides an efficient method to transfer MCTP packets between the
18 …<https://www.intel.com/content/dam/www/program/design/us/en/documents/low-pin-count-interface-spec…
22 <http://download.intel.com/design/servers/ipmi/IPMIv1_5rev1_1.pdf>
29 MCTP-compliant endpoints must accept.
31 ### IBF: Input Buffer Full
33 A hardware-defined flag bit in a KCS device's Status Register (STR). The IBF
42 ### KCS: Keyboard-Controller-Style
48 systems. This interface is available built-in to several commercially available
49 microcontrollers. Data is transferred across the KCS interface using a per-byte
68 values larger than the BTU may improve throughput for data-intensive transfers.
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| /openbmc/phosphor-dbus-interfaces/yaml/org/freedesktop/UPower/ |
| H A D | Device.interface.yaml | 2 "org.freedesktop.UPower.Device -- Device interface
10 - name: Refresh
13 org.freedesktop.upower.refresh-power-source authorization"
15 - name: GetHistory
20 - name: type
24 - name: timespan
28 - name: resolution
35 - name: data
50 - name: GetStatistics
55 - name: type
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| /openbmc/openbmc/poky/meta/files/common-licenses/ |
| H A D | BitstreamVera | 4 long as "Bitstream" or "Vera" are not in the names), and full
104 design. Vera cannot become a "ransom note" font. Jim Lyles will be
105 providing a document describing the design elements used in Vera, as a
130 Majority of Multi-Line text editing is in
|
| H A D | FTL | 3 2006-Jan-27
5 Copyright 1996-2002, 2006 by David Turner, Robert Wilhelm, and Werner Lemberg
17 …use this software for whatever you want, in parts or full form, without having to pay us. (`royalt…
39 The FreeType Project is copyright (C) 1996-2000 by David Turner, Robert Wilhelm, and Werner Lemberg…
47 This license grants a worldwide, royalty-free, perpetual and irrevocable right and license to use, …
71 o freetype-devel@nongnu.org
73 Discusses bugs, as well as engine internals, design issues, specific licenses, porting, etc.
79 --- end of FTL.TXT ---
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| /openbmc/qemu/hw/char/ |
| H A D | cmsdk-apb-uart.c | 12 /* This is a model of the "APB UART" which is part of the Cortex-M
13 * System Design Kit (CMSDK) and documented in the Cortex-M System
14 * Design Kit Technical Reference Manual (ARM DDI0479C):
15 * https://developer.arm.com/products/system-design/system-design-kits/cortex-m-system-design-kit
26 #include "chardev/char-fe.h"
27 #include "chardev/char-serial.h"
28 #include "hw/char/cmsdk-apb-uart.h"
30 #include "hw/qdev-properties-system.h"
78 return s->bauddiv >= 16 && s->bauddiv <= s->pclk_frq; in uart_baudrate_ok()
93 ssp.speed = s->pclk_frq / s->bauddiv; in uart_update_parameters()
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| /openbmc/u-boot/board/freescale/ls1012ardb/ |
| H A D | README | 2 --------
3 QorIQ LS1012A Reference Design System (LS1012ARDB) is a high-performance
6 optimized to support the high-bandwidth DDR3L memory and
7 a full complement of high-speed SerDes ports.
10 --------------------
11 Please refer arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc for LS2080A
15 -----------------------
16 - SERDES Connections, 4 lanes supporting:
17 - PCI Express - 3.0
18 - SGMII, SGMII 2.5
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| /openbmc/phosphor-power/phosphor-regulators/docs/config_file/ |
| H A D | compare_vpd.md | 8 from an EEPROM on a Field-Replaceable Unit (FRU). For this reason, VPD is also
11 The phosphor-regulators application obtains VPD keyword values from D-Bus. Other
13 components and publishing it on D-Bus.
17 - CCIN
18 - Manufacturer
19 - Model
20 - PartNumber
21 - HW
31 - The hardware component does not support the keyword.
32 - An error occurred while attempting to read VPD from the hardware component.
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| /openbmc/u-boot/arch/arm/mach-rockchip/ |
| H A D | rk3368-board-tpl.c | 1 // SPDX-License-Identifier: GPL-2.0+
3 * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
21 * The SPL (and also the full U-Boot stage on the RK3368) will run in
53 /* Set all configurable IP to 'non secure'-mode */ in sgrf_init()
59 * From rockchip-uboot/arch/arm/cpu/armv8/rk33xx/cpu.c in sgrf_init()
66 /* Set 'secure dma' to 'non secure'-mode */ in sgrf_init()
72 rk_setreg(&cru->softrst_con[1], DMA1_SRST_REQ); in sgrf_init()
73 rk_setreg(&cru->softrst_con[4], DMA2_SRST_REQ); in sgrf_init()
78 rk_clrreg(&cru->softrst_con[1], DMA1_SRST_REQ); in sgrf_init()
79 rk_clrreg(&cru->softrst_con[4], DMA2_SRST_REQ); in sgrf_init()
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