Searched +full:fu540 +full:- +full:c000 +full:- +full:spi (Results 1 – 14 of 14) sorted by relevance
/openbmc/linux/arch/riscv/boot/dts/sifive/ |
H A D | fu540-c000.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 2 /* Copyright (c) 2018-2019 SiFive, Inc */ 4 /dts-v1/; 6 #include <dt-bindings/clock/sifive-fu540-prci.h> 9 #address-cells = <2>; 10 #size-cells = <2>; 11 compatible = "sifive,fu540-c000", "sifive,fu540"; 23 #address-cells = <1>; 24 #size-cells = <0>; 28 i-cache-block-size = <64>; [all …]
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H A D | hifive-unleashed-a00.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 2 /* Copyright (c) 2018-2019 SiFive, Inc */ 4 #include "fu540-c000.dtsi" 5 #include <dt-bindings/gpio/gpio.h> 6 #include <dt-bindings/leds/common.h> 7 #include <dt-bindings/pwm/pwm.h> 14 compatible = "sifive,hifive-unleashed-a00", "sifive,fu540-c000", 15 "sifive,fu540"; 18 stdout-path = "serial0"; 22 timebase-frequency = <RTCCLK_FREQ>; [all …]
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H A D | fu740-c000.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 4 /dts-v1/; 6 #include <dt-bindings/clock/sifive-fu740-prci.h> 9 #address-cells = <2>; 10 #size-cells = <2>; 11 compatible = "sifive,fu740-c000", "sifive,fu740"; 23 #address-cells = <1>; 24 #size-cells = <0>; 28 i-cache-block-size = <64>; 29 i-cache-sets = <128>; [all …]
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/openbmc/linux/Documentation/devicetree/bindings/spi/ |
H A D | spi-sifive.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/spi/spi-sifive.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: SiFive SPI controller 10 - Pragnesh Patel <pragnesh.patel@sifive.com> 11 - Paul Walmsley <paul.walmsley@sifive.com> 12 - Palmer Dabbelt <palmer@sifive.com> 15 - $ref: spi-controller.yaml# 20 - enum: [all …]
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/openbmc/linux/arch/riscv/boot/dts/microchip/ |
H A D | mpfs.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 2 /* Copyright (c) 2020-2021 Microchip Technology Inc */ 4 /dts-v1/; 5 #include "dt-bindings/clock/microchip,mpfs-clock.h" 8 #address-cells = <2>; 9 #size-cells = <2>; 14 #address-cells = <1>; 15 #size-cells = <0>; 20 i-cache-block-size = <64>; 21 i-cache-sets = <128>; [all …]
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/openbmc/qemu/hw/riscv/ |
H A D | sifive_u.c | 2 * QEMU RISC-V Board Compatible with SiFive Freedom U SDK 4 * Copyright (c) 2016-2017 Sagar Karandikar, sagark@eecs.berkeley.edu 15 * 5) OTP (One-Time Programmable) memory with stored serial number 18 * 8) SPI0 connected to an SPI flash 39 #include "qemu/error-report.h" 99 uint64_t mem_size = ms->ram_size; in create_fdt() 111 "sifive,plic-1.0.0", "riscv,plic0" in create_fdt() 114 fdt = ms->fdt = create_device_tree(&s->fdt_size); in create_fdt() 122 "sifive,hifive-unleashed-a00"); in create_fdt() 123 qemu_fdt_setprop_cell(fdt, "/", "#size-cells", 0x2); in create_fdt() [all …]
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/openbmc/qemu/docs/system/riscv/ |
H A D | sifive_u.rst | 4 SiFive HiFive Unleashed Development Board is the ultimate RISC-V development 5 board featuring the Freedom U540 multi-core RISC-V processor. 8 ----------------- 15 * Platform-Level Interrupt Controller (PLIC) 17 * L2 Loosely Integrated Memory (L2-LIM) 22 * 1 One-Time Programmable (OTP) memory with stored serial number 26 * 1 SD card in SPI mode 30 1 E51 core and 4 U54 core combination and the RISC-V core boots in 64-bit mode. 32 is also possible to create a 32-bit variant with the same peripherals except 33 that the RISC-V cores are replaced by the 32-bit ones (E31 and U34), to help [all …]
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/openbmc/u-boot/doc/ |
H A D | README.sifive-fu540 | 1 FU540-C000 RISC-V SoC 3 The FU540-C000 is the world’s first 4+1 64-bit RISC‑V SoC from SiFive. 5 The HiFive Unleashed development platform is based on FU540-C000 and capable 16 1. SPI driver is still missing. So MMC card can't be used in U-Boot as of now. 17 2. U-Boot expects the serial console device entry to be present under /chosen 20 stdout-path = "/soc/serial@10010000:115200"; 23 Without a serial console U-Boot will panic. 27 1. Add the RISC-V toolchain to your PATH. 36 The current U-Boot port is supported in S-mode only and loaded from DRAM. 38 A prior stage (M-mode) firmware/bootloader (e.g OpenSBI or BBL) is required to [all …]
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/openbmc/linux/ |
H A D | MAINTAINERS | 5 --------------------------------------------------- 21 W: *Web-page* with status/info 23 B: URI for where to file *bugs*. A web-page with detailed bug 28 patches to the given subsystem. This is either an in-tree file, 29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst 46 N: [^a-z]tegra all files whose path contains tegra 64 ---------------- 83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS) 85 L: linux-scsi@vger.kernel.org 88 F: drivers/scsi/3w-* [all …]
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H A D | opengrok2.0.log | 1 2024-12-28 20:05:26.116-0600 FINEST t586 Statistics.logIt: Added: '/openbmc/linux/tools/testing/selftests/drivers/net/mlxsw/rtnetlink.sh' (ShAnalyzer) (took 79 ms) 2 2024-12-28 20:05:26.112-0600 FINER t592 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/qemu',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/qemu/chardev/spice.c' 3 2024-12-28 20:05:26.116-0600 FINEST t592 Statistics.logIt: Added: '/openbmc/qemu/chardev/spice.c' (CAnalyzer) (took 33 ms) 4 2024-1 [all...] |
H A D | opengrok0.0.log | 1 2024-12-28 20:09:05.996-0600 FINEST t1171 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/linux/drivers/staging/media/av7110/video-continue.rst.gz' 2 2024-12-28 20:09:05.942-0600 FINEST t1149 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/u-boot/arch/sh/config.mk.gz' 3 2024-12-2 [all...] |
H A D | opengrok1.0.log | 1 2024-12-28 20:07:11.902-0600 FINER t583 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/linux',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/linux/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c' 2 2024-12-28 20:07:11.913-0600 FINEST t583 Statistics.logIt: Added: '/openbmc/linux/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c' (CAnalyzer) (took 116 ms) 3 2024-12-28 20:07:11.899-0600 FINER t593 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/linux',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/linux/tools/testing/selftests/powerpc/tm/tm-signa [all...] |
/openbmc/ |
D | opengrok1.0.log | 1 2025-01-22 03:00:43.118-0600 FINE t1 Executor.registerErrorHandler: Installing default uncaught exception handler 2 2025-01-22 03:00:43.231-0600 INFO t1 Indexer.parseOptions: Indexer options: [-c, /usr/local/bin/ctags, -T, 12, -s, /opengrok/src, - [all...] |
D | opengrok2.0.log | 1 2025-01-21 03:00:49.509-0600 FINE t1 Executor.registerErrorHandler: Installing default uncaught exception handler 2 2025-01-21 03:00:49.626-0600 INFO t1 Indexer.parseOptions: Indexer options: [-c, /usr/local/bin/ctags, -T, 12, -s, /opengrok/src, - [all...] |