/openbmc/linux/Documentation/devicetree/bindings/iio/adc/ |
H A D | adi,ad7606.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Michael Hennerich <michael.hennerich@analog.com> 14 https://www.analog.com/media/en/technical-documentation/data-sheets/ad7606_7606-6_7606-4.pdf 15 https://www.analog.com/media/en/technical-documentation/data-sheets/AD7606B.pdf 16 https://www.analog.com/media/en/technical-documentation/data-sheets/AD7616.pdf 21 - adi,ad7605-4 22 - adi,ad7606-8 23 - adi,ad7606-6 [all …]
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/openbmc/linux/drivers/bus/ |
H A D | ts-nbus.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * NBUS driver for TS-4600 based boards 5 * Copyright (c) 2016 - Savoir-faire Linux 8 * This driver implements a GPIOs bit-banged bus, called the NBUS by Technologic 10 * TS-4600 SoM. 21 #include <linux/ts-nbus.h> 30 struct gpio_descs *data; member 40 * request all gpios required by the bus. 45 ts_nbus->data = devm_gpiod_get_array(&pdev->dev, "ts,data", in ts_nbus_init_pdata() 47 if (IS_ERR(ts_nbus->data)) { in ts_nbus_init_pdata() [all …]
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/openbmc/u-boot/arch/powerpc/include/asm/ |
H A D | mpc85xx_gpio.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */ 12 * The following internal functions are an MPC85XX-specific GPIO API which 13 * allows setting and querying multiple GPIOs in a single operation. 17 * memory-mapped IO operation or two. 24 /* First mask off the unwanted parts of "dir" and "val" */ in mpc85xx_gpio_set() 29 dir |= (in_be32(&gpio->gpdir) & ~mask); in mpc85xx_gpio_set() 30 val |= (in_be32(&gpio->gpdat) & ~mask); in mpc85xx_gpio_set() 33 * Poke the new output values first, then set the direction. This in mpc85xx_gpio_set() 34 * helps to avoid transient data when switching from input to output in mpc85xx_gpio_set() 37 out_be32(&gpio->gpdat, val); in mpc85xx_gpio_set() [all …]
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/openbmc/linux/Documentation/devicetree/bindings/display/bridge/ |
H A D | thine,thc63lvd1024.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Jacopo Mondi <jacopo+renesas@jmondi.org> 11 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> 15 streams to parallel data outputs. The chip supports single/dual input/output 19 Single or dual operation mode, output data mapping and DDR output modes are 34 even-numbered pixels are received on port@0 and odd-numbered pixels on 37 When operating in single output mode all pixels are output from the first 45 description: First LVDS input port [all …]
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H A D | ti,sn65dsi86.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Sandeep Panda <spanda@codeaurora.org> 23 enable-gpios: 27 suspend-gpios: 31 no-hpd: 37 vccio-supply: 40 vpll-supply: 43 vcca-supply: [all …]
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H A D | sil,sii9022.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Boris Brezillon <bbrezillon@kernel.org> 15 - items: 16 - enum: 17 - sil,sii9022-cpi # CEC Programming Interface 18 - sil,sii9022-tpi # Transmitter Programming Interface 19 - const: sil,sii9022 20 - const: sil,sii9022 [all …]
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/openbmc/linux/Documentation/devicetree/bindings/gpio/ |
H A D | gpio.txt | 4 1) gpios property 5 ----------------- 7 GPIO properties should be named "[<name>-]gpios", with <name> being the purpose 8 of this GPIO for the device. While a non-existent <name> is considered valid 9 for compatibility reasons (resolving to the "gpios" property), it is not allowed 10 for new bindings. Also, GPIO properties named "[<name>-]gpio" are valid and old 15 cases should they contain more than one. If your device uses several GPIOs with 17 meaningful name. The only case where an array of GPIOs is accepted is when 18 several GPIOs serve the same function (e.g. a parallel data line). 20 The exact purpose of each gpios property must be documented in the device tree [all …]
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/openbmc/linux/Documentation/driver-api/gpio/ |
H A D | legacy.rst | 13 A "General Purpose Input/Output" (GPIO) is a flexible software-controlled 18 which GPIOs. Drivers can be written generically, so that board setup code 19 passes such pin configuration data to drivers. 21 System-on-Chip (SOC) processors heavily rely on GPIOs. In some cases, every 22 non-dedicated pin can be configured as a GPIO; and most chips have at least 24 provide GPIOs; multifunction chips like power managers, and audio codecs 27 Most PC southbridges have a few dozen GPIO-capable pins (with only the BIOS 30 The exact capabilities of GPIOs vary between systems. Common options: 32 - Output values are writable (high=1, low=0). Some chips also have 34 value might be driven ... supporting "wire-OR" and similar schemes [all …]
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H A D | board.rst | 5 This document explains how GPIOs can be assigned to given devices and functions. 7 Note that it only applies to the new descriptor-based interface. For a 8 description of the deprecated integer-based GPIO interface please refer to 15 Kconfig. Then, how GPIOs are mapped depends on what the platform uses to 17 tree, ACPI, and platform data. 20 ----------- 21 GPIOs can easily be mapped to devices and functions in the device tree. The 22 exact way to do it depends on the GPIO controller providing the GPIOs, see the 25 GPIOs mappings are defined in the consumer device's node, in a property named 26 <function>-gpios, where <function> is the function the driver will request [all …]
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/openbmc/linux/drivers/gpio/ |
H A D | gpio-syscon.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 20 /* SYSCON driver is designed to use 32-bit wide registers */ 25 * struct syscon_gpio_data - Configuration for the device. 28 * GPIO_SYSCON_FEAT_IN: GPIOs supports input, 29 * GPIO_SYSCON_FEAT_OUT: GPIOs supports output, 30 * GPIO_SYSCON_FEAT_DIR: GPIOs supports switch direction. 31 * @bit_count: Number of bits used as GPIOs. 32 * @dat_bit_offset: Offset (in bits) to the first GPIO bit. 33 * @dir_bit_offset: Optional offset (in bits) to the first bit to switch 51 const struct syscon_gpio_data *data; member [all …]
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H A D | gpiolib-acpi.c | 1 // SPDX-License-Identifier: GPL-2.0 24 #include "gpiolib-acpi.h" 26 static int run_edge_events_on_boot = -1; 29 "Run edge _AEI event-handlers at boot: 0=no, 1=yes, -1=auto"); 50 * struct acpi_gpio_event - ACPI GPIO event handler data 52 * @node: list-entry of the events list of the struct acpi_gpio_chip 82 * ACPICA requires that the first field of the context parameter 95 * struct acpi_gpio_info - ACPI GPIO specific information 129 static int acpi_gpiochip_find(struct gpio_chip *gc, void *data) in acpi_gpiochip_find() argument 131 /* First check the actual GPIO device */ in acpi_gpiochip_find() [all …]
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H A D | gpio-davinci.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 5 * Copyright (c) 2006-2007 David Brownell 22 #include <linux/platform_data/gpio-davinci.h> 45 #define BINTEN 0x8 /* GPIO Interrupt Per-Bank Enable Register */ 84 /*--------------------------------------------------------------------------*/ 97 g = d->regs[bank]; in __davinci_direction() 98 spin_lock_irqsave(&d->lock, flags); in __davinci_direction() 99 temp = readl_relaxed(&g->dir); in __davinci_direction() 102 writel_relaxed(mask, value ? &g->set_data : &g->clr_data); in __davinci_direction() 106 writel_relaxed(temp, &g->dir); in __davinci_direction() [all …]
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H A D | gpio-twl4030.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Access to GPIOs on TWL4030/TPS659x0 chips 5 * Copyright (C) 2006-2007 Texas Instruments, Inc. 8 * Code re-arranged and cleaned up by: 30 * The GPIO "subchip" supports 18 GPIOs which can be configured as 37 * There are also two LED pins used sometimes as output-only GPIOs. 52 /* Mask for GPIO registers when aggregated into a 32-bit integer */ 66 /*----------------------------------------------------------------------*/ 71 static inline int gpio_twl4030_write(u8 address, u8 data) in gpio_twl4030_write() argument 73 return twl_i2c_write_u8(TWL4030_MODULE_GPIO, data, address); in gpio_twl4030_write() [all …]
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/openbmc/linux/include/linux/gpio/ |
H A D | driver.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 10 #include <linux/pinctrl/pinconf-generic.h> 46 * struct gpio_irq_chip - GPIO interrupt controller 76 * If non-NULL, will be set as the parent of this GPIO interrupt 88 * hardware IRQs correspond to the GPIO index 0..ngpio-1 (see the 96 * HWIRQ, return -EINVAL, but also make sure to fill in @valid_mask and 111 * &gpiochip_populate_parent_fwspec_twocell will be used. A four-cell 185 * single pointer used as the data associated with every 195 * different data for each parent. This cannot be NULL if 234 * sized array to be used as parent data. [all …]
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/openbmc/u-boot/drivers/demo/ |
H A D | demo-shape.c | 1 // SPDX-License-Identifier: GPL-2.0+ 11 #include <dm-demo.h> 22 int num_chars; /* Number of non-space characters output so far */ 31 struct shape_data *data = dev_get_priv(dev); in shape_hello() local 40 { HEIGHT / 2 - 1, WIDTH - HEIGHT / 2 + 1, -1, 1}, in shape_hello() 45 const char *colour = pdata->colour; in shape_hello() 46 int first = 0; in shape_hello() local 49 ch = pdata->default_char; in shape_hello() 53 index = (pdata->sides / 2) - 1; in shape_hello() 55 return -EIO; in shape_hello() [all …]
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/openbmc/linux/Documentation/devicetree/bindings/mmc/ |
H A D | arm,pl18x.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Linus Walleij <linus.walleij@linaro.org> 11 - Ulf Hansson <ulf.hansson@linaro.org> 20 - $ref: /schemas/arm/primecell.yaml# 21 - $ref: mmc-controller.yaml# 29 - arm,pl180 30 - arm,pl181 31 - arm,pl18x [all …]
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/openbmc/linux/Documentation/devicetree/bindings/display/ |
H A D | solomon,ssd1307fb.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Maxime Ripard <mripard@kernel.org> 11 - Javier Martinez Canillas <javierm@redhat.com> 17 - enum: 18 - solomon,ssd1305fb-i2c 19 - solomon,ssd1306fb-i2c 20 - solomon,ssd1307fb-i2c 21 - solomon,ssd1309fb-i2c [all …]
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/openbmc/linux/Documentation/admin-guide/gpio/ |
H A D | sysfs.rst | 7 Documentation/ABI/obsolete/sysfs-gpio AND NEW USERSPACE CONSUMERS 16 ------------------------ 18 configure a sysfs user interface to GPIOs. This is different from the 26 may need to temporarily remove that protection, first importing a GPIO, 27 then changing its output state, then updating the code before re-enabling 32 userspace GPIO can be used to determine system configuration data that 37 PLEASE READ THE DOCUMENT AT Documentation/driver-api/gpio/drivers-on-gpio.rst 41 -------------- 44 - Control interfaces used to get userspace control over GPIOs; 46 - GPIOs themselves; and [all …]
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/openbmc/u-boot/include/asm-generic/ |
H A D | gpio.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */ 15 * Generic GPIO API for U-Boot 17 * -- 20 * - gpio_request_by_name() 21 * - dm_gpio_get_value() etc. 24 * -- 26 * GPIOs are numbered from 0 to GPIO_COUNT-1 which value is defined 38 * an error value of -1. 51 * @return 0 if ok, -1 on error 60 * @return 0 if ok, -1 on error [all …]
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/openbmc/linux/Documentation/firmware-guide/acpi/ |
H A D | gpio-properties.rst | 1 .. SPDX-License-Identifier: GPL-2.0 8 allows names to be given to GPIOs (and other things as well) returned 13 With _DSD we can now query GPIOs using a name instead of an integer 16 // Bluetooth device with reset and shutdown GPIOs 31 ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), 34 Package () { "reset-gpios", Package () { ^BTH, 1, 1, 0 } }, 35 Package () { "shutdown-gpios", Package () { ^BTH, 0, 0, 0 } }, 61 In our Bluetooth example the "reset-gpios" refers to the second GpioIo() 70 +-------------+-------------+-----------------------------------------------+ 74 +-------------+-------------+-----------------------------------------------+ [all …]
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/openbmc/linux/Documentation/devicetree/bindings/mfd/ |
H A D | google,cros-ec.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mfd/google,cros-ec.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Benson Leung <bleung@chromium.org> 11 - Guenter Roeck <groeck@chromium.org> 22 - description: 24 const: google,cros-ec-i2c 25 - description: 27 const: google,cros-ec-spi [all …]
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/openbmc/linux/Documentation/devicetree/bindings/media/i2c/ |
H A D | maxim,max96712.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: Quad GMSL2 to CSI-2 Deserializer with GMSL1 Compatibility 11 - Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> 15 CSI-2 D-PHY or C-PHY formatted outputs. The device allows each link to 16 simultaneously transmit bidirectional control-channel data while forward 18 four remotely located sensors using industry-standard coax or STP 23 MAX96712 can be paired with first-generation 3.12Gbps or 1.5Gbps GMSL1 34 enable-gpios: true [all …]
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/openbmc/u-boot/drivers/gpio/ |
H A D | sh_pfc.c | 23 if (enum_id < r->begin) in enum_in_range() 26 if (enum_id > r->end) in enum_in_range() 51 unsigned long data) in gpio_write_raw_reg() argument 55 writeb(data, mapped_reg); in gpio_write_raw_reg() 58 writew(data, mapped_reg); in gpio_write_raw_reg() 61 writel(data, mapped_reg); in gpio_write_raw_reg() 74 pos = dr->reg_width - (in_pos + 1); in gpio_read_bit() 77 dr->reg + offset, pos, dr->reg_width); in gpio_read_bit() 79 return (gpio_read_raw_reg(dr->mapped_reg + offset, in gpio_read_bit() 80 dr->reg_width) >> pos) & 1; in gpio_read_bit() [all …]
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/openbmc/linux/drivers/pinctrl/renesas/ |
H A D | gpio.c | 1 // SPDX-License-Identifier: GPL-2.0 6 * Copyright (C) 2009 - 2012 Paul Mundt 40 return chip->pfc; in gpio_to_pfc() 47 int idx = sh_pfc_get_pin_index(chip->pfc, offset); in gpio_get_data_reg() 48 struct sh_pfc_gpio_pin *gpio_pin = &chip->pins[idx]; in gpio_get_data_reg() 50 *reg = &chip->regs[gpio_pin->dreg]; in gpio_get_data_reg() 51 *bit = gpio_pin->dbit; in gpio_get_data_reg() 57 phys_addr_t address = dreg->reg; in gpio_read_data_reg() 58 void __iomem *mem = address - chip->mem->phys + chip->mem->virt; in gpio_read_data_reg() 60 return sh_pfc_read_raw_reg(mem, dreg->reg_width); in gpio_read_data_reg() [all …]
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/openbmc/u-boot/doc/device-tree-bindings/gpio/ |
H A D | nvidia,tegra186-gpio.txt | 21 registers to do so. Code which simply wishes to read or write GPIO data does not 30 Tegra HW documentation describes a unified naming convention for all GPIOs 32 a number of GPIOs. Thus, each GPIO is named according to an alphabetical port 37 implemented GPIOs within each port varies. GPIO registers within a controller 42 extremely non-linear. The header file <dt-bindings/gpio/tegra186-gpio.h> 43 describes the port-level mapping. In that file, the naming convention for ports 49 represents the aggregate status for all GPIOs within a set of ports. Thus, the 52 both the overall controller HW module and the sets-of-ports as "controllers". 56 interrupt signals generated by a set-of-ports. The intent is for each generated 59 per-port-set signals is reported via a separate register. Thus, a driver needs [all …]
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