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/openbmc/linux/Documentation/devicetree/bindings/timer/
H A Dsamsung,exynos4210-mct.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/timer/samsung,exynos4210-mct.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung Exynos SoC Multi Core Timer (MCT)
10 - Krzysztof Kozlowski <krzk@kernel.org>
13 The Samsung's Multi Core Timer (MCT) module includes two main blocks, the
14 global timer and CPU local timers. The global timer is a 64-bit free running
15 up-counter and can generate 4 interrupts when the counter reaches one of the
16 four preset counter values. The CPU local timers are 32-bit free running
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/openbmc/u-boot/arch/arm/dts/
H A Dexynos4x12.dtsi21 #include "exynos4x12-pinctrl.dtsi"
22 #include "exynos4x12-pinctrl-uboot.dtsi"
32 pd_isp: isp-power-domain@10023CA0 {
33 compatible = "samsung,exynos4210-pd";
37 clock: clock-controller@10030000 {
38 compatible = "samsung,exynos4412-clock";
40 #clock-cells = <1>;
43 mct@10050000 {
44 compatible = "samsung,exynos4412-mct";
46 interrupt-parent = <&mct_map>;
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/openbmc/linux/drivers/clocksource/
H A Dexynos_mct.c1 // SPDX-License-Identifier: GPL-2.0-only
2 /* linux/arch/arm/mach-exynos4/mct.c
7 * Exynos4 MCT(Multi-Core Timer) support
70 #define MCT_NR_LOCAL (MCT_NR_IRQS - MCT_L0_IRQ)
153 panic("MCT hangs after writing %d (offset:0x%lx)\n", value, offset); in exynos4_mct_write()
167 * exynos4_read_count_64 - Read all 64-bits of the global counter
169 * This will read all 64-bits of the global counter taking care to make sure
170 * that the upper and lower half match. Note that reading the MCT can be quite
171 * slow (hundreds of nanoseconds) so you should use the 32-bit (lower half
191 * exynos4_read_count_32 - Read the lower 32-bits of the global counter
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/openbmc/linux/arch/arm/boot/dts/samsung/
H A Dexynos4x12.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung's Exynos4412 SoC device tree source
19 #include "exynos4-cpu-thermal.dtsi"
27 fimc-lite0 = &fimc_lite_0;
28 fimc-lite1 = &fimc_lite_1;
31 bus_acp: bus-acp {
32 compatible = "samsung,exynos-bus";
34 clock-names = "bus";
35 operating-points-v2 = <&bus_acp_opp_table>;
38 bus_acp_opp_table: opp-table {
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/openbmc/linux/drivers/clk/samsung/
H A Dclk-exynos4.c1 // SPDX-License-Identifier: GPL-2.0-only
10 #include <dt-bindings/clock/exynos4.h>
13 #include <linux/clk-provider.h>
19 #include "clk-cpu.h"
145 EXYNOS4412, enumerator
299 /* Exynos 4210-specific parent groups */
338 /* Exynos 4x12-specific parent groups */
878 GATE(CLK_I2C_HDMI, "i2c-hdmi", "aclk100", GATE_IP_PERIL, 14,
949 GATE(CLK_MCT, "mct", "aclk100", E4210_GATE_IP_PERIR, 13,
989 GATE(CLK_MCT, "mct", "aclk100", E4X12_GATE_IP_PERIR, 13,
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/openbmc/linux/
H A Dopengrok2.0.log1 2024-12-28 20:05:26.116-0600 FINEST t586 Statistics.logIt: Added: '/openbmc/linux/tools/testing/selftests/drivers/net/mlxsw/rtnetlink.sh' (ShAnalyzer) (took 79 ms)
2 2024-12-28 20:05:26.112-0600 FINER t592 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/qemu',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/qemu/chardev/spice.c'
3 2024-12-28 20:05:26.116-0600 FINEST t592 Statistics.logIt: Added: '/openbmc/qemu/chardev/spice.c' (CAnalyzer) (took 33 ms)
4 2024-1
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