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Searched +full:exynos4210 +full:- +full:wakeup +full:- +full:eint (Results 1 – 22 of 22) sorted by relevance

/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Dsamsung,pinctrl-wakeup-interrupt.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/samsung,pinctrl-wakeup-interrupt.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung S3C/S5P/Exynos SoC pin controller - wake-up interrupt controller
10 - Krzysztof Kozlowski <krzk@kernel.org>
11 - Sylwester Nawrocki <s.nawrocki@samsung.com>
12 - Tomasz Figa <tomasz.figa@gmail.com>
18 External wake-up interrupts for Samsung S3C/S5P/Exynos SoC pin controller.
19 For S3C24xx, S3C64xx, S5PV210 and Exynos4210 compatible wake-up interrupt
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H A Dsamsung,pinctrl.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
11 - Sylwester Nawrocki <s.nawrocki@samsung.com>
12 - Tomasz Figa <tomasz.figa@gmail.com>
22 - External GPIO interrupts (see interrupts property in pin controller node);
24 - External wake-up interrupts - multiplexed (capable of waking up the system
25 see interrupts property in external wake-up interrupt controller node -
26 samsung,pinctrl-wakeup-interrupt.yaml);
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/openbmc/u-boot/arch/arm/dts/
H A Dexynos4210.dtsi2 * Samsung's Exynos4210 SoC device tree source
4 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
6 * Copyright (c) 2010-2011 Linaro Ltd.
9 * Samsung's Exynos4210 SoC device nodes are listed in this file. Exynos4210
14 * Exynos4210 SoC. As device tree coverage for Exynos4210 increases, additional
23 #include "exynos4210-pinctrl.dtsi"
24 #include "exynos4210-pinctrl-uboot.dtsi"
27 compatible = "samsung,exynos4210";
35 pd_lcd1: lcd1-power-domain@10023CA0 {
36 compatible = "samsung,exynos4210-pd";
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H A Dexynos4x12.dtsi21 #include "exynos4x12-pinctrl.dtsi"
22 #include "exynos4x12-pinctrl-uboot.dtsi"
32 pd_isp: isp-power-domain@10023CA0 {
33 compatible = "samsung,exynos4210-pd";
37 clock: clock-controller@10030000 {
38 compatible = "samsung,exynos4412-clock";
40 #clock-cells = <1>;
44 compatible = "samsung,exynos4412-mct";
46 interrupt-parent = <&mct_map>;
49 clock-names = "fin_pll", "mct";
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H A Dexynos5250.dtsi1 // SPDX-License-Identifier: GPL-2.0+
8 #include "exynos5250-pinctrl.dtsi"
9 #include "exynos5250-pinctrl-uboot.dtsi"
20 compatible = "samsung,exynos5250-pinctrl";
24 wakup_eint: wakeup-interrupt-controller {
25 compatible = "samsung,exynos4210-wakeup-eint";
26 interrupt-parent = <&gic>;
32 compatible = "samsung,exynos5250-pinctrl";
38 compatible = "samsung,exynos5250-pinctrl";
44 compatible = "samsung,exynos5250-pinctrl";
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H A Dexynos54xx.dtsi1 // SPDX-License-Identifier: GPL-2.0+
8 #include "exynos54xx-pinctrl.dtsi"
12 machine-arch-id = <4151>;
45 compatible = "samsung,exynos-adc-v2";
52 #address-cells = <1>;
53 #size-cells = <0>;
54 compatible = "samsung,exynos5-hsi2c";
60 #address-cells = <1>;
61 #size-cells = <0>;
62 compatible = "samsung,exynos5-hsi2c";
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/openbmc/linux/drivers/pinctrl/samsung/
H A Dpinctrl-exynos-arm.c1 // SPDX-License-Identifier: GPL-2.0+
3 // Exynos specific support for Samsung pinctrl/gpiolib driver with eint support.
14 // external gpio and wakeup interrupt support.
20 #include <linux/soc/samsung/exynos-regs-pmu.h>
22 #include "pinctrl-samsung.h"
23 #include "pinctrl-exynos.h"
45 void __iomem *clk_base = (void __iomem *)drvdata->retention_ctrl->priv; in s5pv210_retention_disable()
62 ctrl = devm_kzalloc(drvdata->dev, sizeof(*ctrl), GFP_KERNEL); in s5pv210_retention_init()
64 return ERR_PTR(-ENOMEM); in s5pv210_retention_init()
66 np = of_find_compatible_node(NULL, NULL, "samsung,s5pv210-clock"); in s5pv210_retention_init()
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H A Dpinctrl-exynos.c1 // SPDX-License-Identifier: GPL-2.0+
3 // Exynos specific support for Samsung pinctrl/gpiolib driver with eint support.
14 // external gpio and wakeup interrupt support.
27 #include <linux/soc/samsung/exynos-pmu.h>
28 #include <linux/soc/samsung/exynos-regs-pmu.h>
30 #include "pinctrl-samsung.h"
31 #include "pinctrl-exynos.h"
55 unsigned long reg_mask = our_chip->eint_mask + bank->eint_offset; in exynos_irq_mask()
59 raw_spin_lock_irqsave(&bank->slock, flags); in exynos_irq_mask()
61 mask = readl(bank->eint_base + reg_mask); in exynos_irq_mask()
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/openbmc/linux/arch/arm/boot/dts/samsung/
H A Dexynos4210.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung's Exynos4210 SoC device tree source
5 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
7 * Copyright (c) 2010-2011 Linaro Ltd.
10 * Samsung's Exynos4210 SoC device nodes are listed in this file. Exynos4210
15 * Exynos4210 SoC. As device tree coverage for Exynos4210 increases, additional
20 #include "exynos4-cpu-thermal.dtsi"
23 compatible = "samsung,exynos4210", "samsung,exynos4";
31 bus_acp: bus-acp {
32 compatible = "samsung,exynos-bus";
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H A Dexynos5260.dtsi1 // SPDX-License-Identifier: GPL-2.0
9 #include <dt-bindings/clock/exynos5260-clk.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
15 interrupt-parent = <&gic>;
16 #address-cells = <1>;
17 #size-cells = <1>;
34 #address-cells = <1>;
35 #size-cells = <0>;
37 cpu-map {
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H A Dexynos3250.dtsi1 // SPDX-License-Identifier: GPL-2.0
17 #include "exynos4-cpu-thermal.dtsi"
18 #include <dt-bindings/clock/exynos3250.h>
19 #include <dt-bindings/interrupt-controller/arm-gic.h>
20 #include <dt-bindings/interrupt-controller/irq.h>
24 interrupt-parent = <&gic>;
25 #address-cells = <1>;
26 #size-cells = <1>;
46 bus_dmc: bus-dmc {
47 compatible = "samsung,exynos-bus";
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H A Dexynos4x12.dtsi1 // SPDX-License-Identifier: GPL-2.0
19 #include "exynos4-cpu-thermal.dtsi"
27 fimc-lite0 = &fimc_lite_0;
28 fimc-lite1 = &fimc_lite_1;
31 bus_acp: bus-acp {
32 compatible = "samsung,exynos-bus";
34 clock-names = "bus";
35 operating-points-v2 = <&bus_acp_opp_table>;
38 bus_acp_opp_table: opp-table {
39 compatible = "operating-points-v2";
[all …]
H A Dexynos5410.dtsi1 // SPDX-License-Identifier: GPL-2.0
14 #include <dt-bindings/clock/exynos5410.h>
15 #include <dt-bindings/clock/exynos-audss-clk.h>
16 #include <dt-bindings/interrupt-controller/arm-gic.h>
20 interrupt-parent = <&gic>;
30 #address-cells = <1>;
31 #size-cells = <0>;
35 compatible = "arm,cortex-a15";
37 clock-frequency = <1600000000>;
42 compatible = "arm,cortex-a15";
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H A Dexynos5250.dtsi1 // SPDX-License-Identifier: GPL-2.0
17 #include <dt-bindings/clock/exynos5250.h>
19 #include "exynos4-cpu-thermal.dtsi"
20 #include <dt-bindings/clock/exynos-audss-clk.h>
46 #address-cells = <1>;
47 #size-cells = <0>;
49 cpu-map {
62 compatible = "arm,cortex-a15";
65 clock-names = "cpu";
66 operating-points-v2 = <&cpu0_opp_table>;
[all …]
H A Ds5pv210.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2013-2014 Samsung Electronics, Co. Ltd.
19 #include <dt-bindings/clock/s5pv210.h>
20 #include <dt-bindings/clock/s5pv210-audss.h>
23 #address-cells = <1>;
24 #size-cells = <1>;
45 #address-cells = <1>;
46 #size-cells = <0>;
50 compatible = "arm,cortex-a8";
55 xxti: oscillator-0 {
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H A Dexynos5420.dtsi1 // SPDX-License-Identifier: GPL-2.0
14 #include <dt-bindings/clock/exynos5420.h>
15 #include <dt-bindings/clock/exynos-audss-clk.h>
16 #include <dt-bindings/interrupt-controller/arm-gic.h>
37 bus_disp1: bus-disp1 {
38 compatible = "samsung,exynos-bus";
40 clock-names = "bus";
44 bus_disp1_fimd: bus-disp1-fimd {
45 compatible = "samsung,exynos-bus";
47 clock-names = "bus";
[all …]
/openbmc/linux/arch/arm64/boot/dts/exynos/
H A Dexynos7.dtsi1 // SPDX-License-Identifier: GPL-2.0
9 #include <dt-bindings/clock/exynos7-clk.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 interrupt-parent = <&gic>;
15 #address-cells = <2>;
16 #size-cells = <2>;
31 arm-pmu {
32 compatible = "arm,cortex-a57-pmu";
37 interrupt-affinity = <&cpu_atlas0>, <&cpu_atlas1>,
43 compatible = "fixed-clock";
[all …]
H A Dexynos850.dtsi1 // SPDX-License-Identifier: GPL-2.0
13 #include <dt-bindings/clock/exynos850.h>
14 #include <dt-bindings/interrupt-controller/arm-gic.h>
15 #include <dt-bindings/soc/samsung,exynos-usi.h>
20 #address-cells = <2>;
21 #size-cells = <1>;
23 interrupt-parent = <&gic>;
34 arm-pmu {
35 compatible = "arm,cortex-a55-pmu";
44 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>,
[all …]
H A Dexynos5433.dtsi1 // SPDX-License-Identifier: GPL-2.0
16 #include <dt-bindings/clock/exynos5433.h>
17 #include <dt-bindings/interrupt-controller/arm-gic.h>
21 #address-cells = <2>;
22 #size-cells = <2>;
24 interrupt-parent = <&gic>;
26 arm-a53-pmu {
27 compatible = "arm,cortex-a53-pmu";
32 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
35 arm-a57-pmu {
[all …]
H A Dexynosautov9.dtsi1 // SPDX-License-Identifier: GPL-2.0
9 #include <dt-bindings/clock/samsung,exynosautov9.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/soc/samsung,boot-mode.h>
12 #include <dt-bindings/soc/samsung,exynos-usi.h>
16 #address-cells = <2>;
17 #size-cells = <1>;
19 interrupt-parent = <&gic>;
31 arm-pmu {
32 compatible = "arm,cortex-a76-pmu";
[all …]
/openbmc/linux/
H A Dopengrok0.0.log1 2024-12-28 20:09:05.996-0600 FINEST t1171 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/linux/drivers/staging/media/av7110/video-continue.rst.gz'
2 2024-12-28 20:09:05.942-0600 FINEST t1149 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/u-boot/arch/sh/config.mk.gz'
3 2024-12-2
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H A Dopengrok2.0.log1 2024-12-28 20:05:26.116-0600 FINEST t586 Statistics.logIt: Added: '/openbmc/linux/tools/testing/selftests/drivers/net/mlxsw/rtnetlink.sh' (ShAnalyzer) (took 79 ms)
2 2024-12-28 20:05:26.112-0600 FINER t592 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/qemu',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/qemu/chardev/spice.c'
3 2024-12-28 20:05:26.116-0600 FINEST t592 Statistics.logIt: Added: '/openbmc/qemu/chardev/spice.c' (CAnalyzer) (took 33 ms)
4 2024-1
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