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/openbmc/u-boot/arch/arm/dts/
H A Dexynos4210.dtsi2 * Samsung's Exynos4210 SoC device tree source
4 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
6 * Copyright (c) 2010-2011 Linaro Ltd.
9 * Samsung's Exynos4210 SoC device nodes are listed in this file. Exynos4210
14 * Exynos4210 SoC. As device tree coverage for Exynos4210 increases, additional
23 #include "exynos4210-pinctrl.dtsi"
24 #include "exynos4210-pinctrl-uboot.dtsi"
27 compatible = "samsung,exynos4210";
35 pd_lcd1: lcd1-power-domain@10023CA0 {
36 compatible = "samsung,exynos4210-pd";
[all …]
H A Ds5pc1xx-smdkc100.dts1 // SPDX-License-Identifier: GPL-2.0+
3 * Samsung's Exynos4210-based SMDKV310 board device tree source
8 /dts-v1/;
11 #include "s5pc100-pinctrl.dtsi"
23 pinctrl0: pinctrl@e0300000 {
24 compatible = "samsung,s5pc100-pinctrl";
29 compatible = "samsung,exynos4210-uart";
H A Dexynos4x12.dtsi21 #include "exynos4x12-pinctrl.dtsi"
22 #include "exynos4x12-pinctrl-uboot.dtsi"
32 pd_isp: isp-power-domain@10023CA0 {
33 compatible = "samsung,exynos4210-pd";
37 clock: clock-controller@10030000 {
38 compatible = "samsung,exynos4412-clock";
40 #clock-cells = <1>;
44 compatible = "samsung,exynos4412-mct";
46 interrupt-parent = <&mct_map>;
49 clock-names = "fin_pll", "mct";
[all …]
H A Dexynos5250.dtsi1 // SPDX-License-Identifier: GPL-2.0+
8 #include "exynos5250-pinctrl.dtsi"
9 #include "exynos5250-pinctrl-uboot.dtsi"
19 pinctrl_0: pinctrl@11400000 {
20 compatible = "samsung,exynos5250-pinctrl";
24 wakup_eint: wakeup-interrupt-controller {
25 compatible = "samsung,exynos4210-wakeup-eint";
26 interrupt-parent = <&gic>;
31 pinctrl_1: pinctrl@13400000 {
32 compatible = "samsung,exynos5250-pinctrl";
[all …]
H A Dexynos4210-pinctrl-uboot.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * U-Boot additions to enable a generic Exynos GPIO driver
9 pinctrl_0: pinctrl@11400000 {
10 compatible = "samsung,exynos4210-pinctrl";
13 pinctrl_1: pinctrl@11000000 {
14 #address-cells = <1>;
15 #size-cells = <1>;
21 pinctrl_2: pinctrl@03860000 {
H A Dexynos54xx.dtsi1 // SPDX-License-Identifier: GPL-2.0+
8 #include "exynos54xx-pinctrl.dtsi"
12 machine-arch-id = <4151>;
45 compatible = "samsung,exynos-adc-v2";
52 #address-cells = <1>;
53 #size-cells = <0>;
54 compatible = "samsung,exynos5-hsi2c";
60 #address-cells = <1>;
61 #size-cells = <0>;
62 compatible = "samsung,exynos5-hsi2c";
[all …]
H A Dexynos4210-pinctrl.dtsi2 * Samsung's Exynos4210 SoC pin-mux and pin-config device tree source
4 * Copyright (c) 2011-2012 Samsung Electronics Co., Ltd.
6 * Copyright (c) 2011-2012 Linaro Ltd.
9 * Samsung's Exynos4210 SoC pin-mux and pin-config optiosn are listed as device
18 pinctrl@11400000 {
20 gpio-controller;
21 #gpio-cells = <2>;
23 interrupt-controller;
24 #interrupt-cells = <2>;
28 gpio-controller;
[all …]
/openbmc/linux/arch/arm/boot/dts/samsung/
H A Dexynos4.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
7 * Copyright (c) 2010-2011 Linaro Ltd.
19 #include <dt-bindings/clock/exynos4.h>
20 #include <dt-bindings/clock/exynos-audss-clk.h>
21 #include <dt-bindings/interrupt-controller/arm-gic.h>
22 #include <dt-bindings/interrupt-controller/irq.h>
25 interrupt-parent = <&gic>;
26 #address-cells = <1>;
27 #size-cells = <1>;
[all …]
H A Dexynos4210.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung's Exynos4210 SoC device tree source
5 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
7 * Copyright (c) 2010-2011 Linaro Ltd.
10 * Samsung's Exynos4210 SoC device nodes are listed in this file. Exynos4210
15 * Exynos4210 SoC. As device tree coverage for Exynos4210 increases, additional
20 #include "exynos4-cpu-thermal.dtsi"
23 compatible = "samsung,exynos4210", "samsung,exynos4";
31 bus_acp: bus-acp {
32 compatible = "samsung,exynos-bus";
[all …]
H A Dexynos3250.dtsi1 // SPDX-License-Identifier: GPL-2.0
17 #include "exynos4-cpu-thermal.dtsi"
18 #include <dt-bindings/clock/exynos3250.h>
19 #include <dt-bindings/interrupt-controller/arm-gic.h>
20 #include <dt-bindings/interrupt-controller/irq.h>
24 interrupt-parent = <&gic>;
25 #address-cells = <1>;
26 #size-cells = <1>;
46 bus_dmc: bus-dmc {
47 compatible = "samsung,exynos-bus";
[all …]
H A Dexynos4210-smdkv310.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung's Exynos4210 based SMDKV310 board device tree source
5 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
7 * Copyright (c) 2010-2011 Linaro Ltd.
11 * Samsung's Exynos4210 SoC.
14 /dts-v1/;
15 #include "exynos4210.dtsi"
16 #include <dt-bindings/gpio/gpio.h>
17 #include "exynos-mfc-reserved-memory.dtsi"
20 model = "Samsung smdkv310 evaluation board based on Exynos4210";
[all …]
H A Dexynos5250.dtsi1 // SPDX-License-Identifier: GPL-2.0
17 #include <dt-bindings/clock/exynos5250.h>
19 #include "exynos4-cpu-thermal.dtsi"
20 #include <dt-bindings/clock/exynos-audss-clk.h>
46 #address-cells = <1>;
47 #size-cells = <0>;
49 cpu-map {
62 compatible = "arm,cortex-a15";
65 clock-names = "cpu";
66 operating-points-v2 = <&cpu0_opp_table>;
[all …]
H A Dexynos5260.dtsi1 // SPDX-License-Identifier: GPL-2.0
9 #include <dt-bindings/clock/exynos5260-clk.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
15 interrupt-parent = <&gic>;
16 #address-cells = <1>;
17 #size-cells = <1>;
34 #address-cells = <1>;
35 #size-cells = <0>;
37 cpu-map {
[all …]
H A Dexynos4210-origen.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung's Exynos4210 based Origen board device tree source
5 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
7 * Copyright (c) 2010-2011 Linaro Ltd.
11 * Samsung's Exynos4210 SoC.
14 /dts-v1/;
15 #include "exynos4210.dtsi"
16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/input/input.h>
18 #include <dt-bindings/leds/common.h>
[all …]
H A Dexynos4210-universal_c210.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung's Exynos4210 based Universal C210 board device tree source
5 * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd.
9 * Samsung's Exynos4210 rev0 SoC.
12 /dts-v1/;
13 #include "exynos4210.dtsi"
14 #include <dt-bindings/gpio/gpio.h>
17 model = "Samsung Universal C210 based on Exynos4210 rev0";
18 compatible = "samsung,universal_c210", "samsung,exynos4210", "samsung,exynos4";
19 chassis-type = "handset";
[all …]
H A Dexynos5420.dtsi1 // SPDX-License-Identifier: GPL-2.0
14 #include <dt-bindings/clock/exynos5420.h>
15 #include <dt-bindings/clock/exynos-audss-clk.h>
16 #include <dt-bindings/interrupt-controller/arm-gic.h>
37 bus_disp1: bus-disp1 {
38 compatible = "samsung,exynos-bus";
40 clock-names = "bus";
44 bus_disp1_fimd: bus-disp1-fimd {
45 compatible = "samsung,exynos-bus";
47 clock-names = "bus";
[all …]
H A Dexynos4210-trats.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung's Exynos4210 based Trats board device tree source
9 * Samsung's Exynos4210 SoC.
12 /dts-v1/;
13 #include "exynos4210.dtsi"
14 #include <dt-bindings/gpio/gpio.h>
17 model = "Samsung Trats based on Exynos4210";
18 compatible = "samsung,trats", "samsung,exynos4210", "samsung,exynos4";
19 chassis-type = "handset";
37 stdout-path = "serial2:115200n8";
[all …]
H A Dexynos4x12.dtsi1 // SPDX-License-Identifier: GPL-2.0
19 #include "exynos4-cpu-thermal.dtsi"
27 fimc-lite0 = &fimc_lite_0;
28 fimc-lite1 = &fimc_lite_1;
31 bus_acp: bus-acp {
32 compatible = "samsung,exynos-bus";
34 clock-names = "bus";
35 operating-points-v2 = <&bus_acp_opp_table>;
38 bus_acp_opp_table: opp-table {
39 compatible = "operating-points-v2";
[all …]
/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Dsamsung,pinctrl-wakeup-interrupt.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/samsung,pinctrl-wakeup-interrupt.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung S3C/S5P/Exynos SoC pin controller - wake-up interrupt controller
10 - Krzysztof Kozlowski <krzk@kernel.org>
11 - Sylwester Nawrocki <s.nawrocki@samsung.com>
12 - Tomasz Figa <tomasz.figa@gmail.com>
18 External wake-up interrupts for Samsung S3C/S5P/Exynos SoC pin controller.
19 For S3C24xx, S3C64xx, S5PV210 and Exynos4210 compatible wake-up interrupt
[all …]
H A Dsamsung,pinctrl.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/samsung,pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
11 - Sylwester Nawrocki <s.nawrocki@samsung.com>
12 - Tomasz Figa <tomasz.figa@gmail.com>
19 the following format 'pinctrl{n}' where n is a unique number for the alias.
22 - External GPIO interrupts (see interrupts property in pin controller node);
24 - External wake-up interrupts - multiplexed (capable of waking up the system
[all …]
/openbmc/linux/Documentation/devicetree/bindings/mmc/
H A Dsamsung,s3c6410-sdhci.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mmc/samsung,s3c6410-sdhci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jaehoon Chung <jh80.chung@samsung.com>
11 - Krzysztof Kozlowski <krzk@kernel.org>
16 - samsung,s3c6410-sdhci
17 - samsung,exynos4210-sdhci
26 clock-names:
29 - const: hsmmc
[all …]
/openbmc/u-boot/arch/arm/mach-exynos/
H A DKconfig14 Samsung Exynos4 SoC family are based on ARM Cortex-A9 CPU. There
15 are multiple SoCs in this family including Exynos4210, Exynos4412,
33 Samsung Exynos5 SoC family are based on ARM Cortex-A15 CPU (and
34 Cortex-A7 CPU in big.LITTLE configuration). There are multiple SoCs
44 Samsung Exynos7 SoC family are based on ARM Cortex-A57 CPU or
45 Cortex-A53 CPU (and some in a big.LITTLE configuration). There are
56 bool "Exynos4210 SMDKV310 board"
61 bool "Exynos4210 Trats board"
64 bool "EXYNOS4210 Universal C210 board"
151 select PINCTRL
[all …]
/openbmc/linux/arch/arm64/boot/dts/exynos/
H A Dexynos7.dtsi1 // SPDX-License-Identifier: GPL-2.0
9 #include <dt-bindings/clock/exynos7-clk.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 interrupt-parent = <&gic>;
15 #address-cells = <2>;
16 #size-cells = <2>;
31 arm-pmu {
32 compatible = "arm,cortex-a57-pmu";
37 interrupt-affinity = <&cpu_atlas0>, <&cpu_atlas1>,
43 compatible = "fixed-clock";
[all …]
/openbmc/linux/Documentation/devicetree/bindings/media/
H A Dsamsung,fimc.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
11 - Sylwester Nawrocki <s.nawrocki@samsung.com>
14 The S5P/Exynos SoC Camera subsystem comprises of multiple sub-devices
17 CSIS, FIMC-LITE and FIMC-IS (ISP).
25 '#address-cells':
28 '#size-cells':
31 '#clock-cells':
[all …]
/openbmc/linux/Documentation/devicetree/bindings/display/samsung/
H A Dsamsung,fimd.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Inki Dae <inki.dae@samsung.com>
11 - Seung-Woo Kim <sw0312.kim@samsung.com>
12 - Kyungmin Park <kyungmin.park@samsung.com>
13 - Krzysztof Kozlowski <krzk@kernel.org>
18 - samsung,s3c2443-fimd
19 - samsung,s3c6400-fimd
20 - samsung,s5pv210-fimd
[all …]

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