Home
last modified time | relevance | path

Searched +full:exynos4210 +full:- +full:combiner (Results 1 – 23 of 23) sorted by relevance

/openbmc/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dsamsung,exynos4210-combiner.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/samsung,exynos4210-combiner.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung Exynos SoC Interrupt Combiner Controller
10 - Krzysztof Kozlowski <krzk@kernel.org>
13 Samsung's Exynos4 architecture includes a interrupt combiner controller which
16 a parent interrupt controller, such as GIC in case of Exynos4210.
18 The interrupt combiner controller consists of multiple combiners. Up to eight
19 interrupt sources can be connected to a combiner. The combiner outputs one
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dexynos4210.dtsi2 * Samsung's Exynos4210 SoC device tree source
4 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
6 * Copyright (c) 2010-2011 Linaro Ltd.
9 * Samsung's Exynos4210 SoC device nodes are listed in this file. Exynos4210
14 * Exynos4210 SoC. As device tree coverage for Exynos4210 increases, additional
23 #include "exynos4210-pinctrl.dtsi"
24 #include "exynos4210-pinctrl-uboot.dtsi"
27 compatible = "samsung,exynos4210";
35 pd_lcd1: lcd1-power-domain@10023CA0 {
36 compatible = "samsung,exynos4210-pd";
[all …]
H A Dexynos4x12.dtsi21 #include "exynos4x12-pinctrl.dtsi"
22 #include "exynos4x12-pinctrl-uboot.dtsi"
32 pd_isp: isp-power-domain@10023CA0 {
33 compatible = "samsung,exynos4210-pd";
37 clock: clock-controller@10030000 {
38 compatible = "samsung,exynos4412-clock";
40 #clock-cells = <1>;
44 compatible = "samsung,exynos4412-mct";
46 interrupt-parent = <&mct_map>;
49 clock-names = "fin_pll", "mct";
[all …]
H A Dexynos5.dtsi1 // SPDX-License-Identifier: GPL-2.0+
8 #include <dt-bindings/gpio/gpio.h>
13 interrupt-parent = <&gic>;
15 combiner: interrupt-controller@10440000 { label
16 compatible = "samsung,exynos4210-combiner";
17 #interrupt-cells = <2>;
18 interrupt-controller;
19 samsung,combiner-nr = <32>;
31 gic: interrupt-controller@10481000 {
32 compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
[all …]
H A Dexynos4.dtsi1 // SPDX-License-Identifier: GPL-2.0+
23 combiner: interrupt-controller@10440000 { label
24 compatible = "samsung,exynos4210-combiner";
25 #interrupt-cells = <2>;
26 interrupt-controller;
30 gic: interrupt-controller@10490000 {
31 compatible = "arm,cortex-a9-gic";
32 #interrupt-cells = <3>;
33 interrupt-controller;
34 cpu-offset = <0x4000>;
[all …]
/openbmc/qemu/hw/intc/
H A Dexynos4210_combiner.c2 * Samsung exynos4210 Interrupt Combiner
4 * Copyright (c) 2000 - 2011 Samsung Electronics Co., Ltd.
24 * Exynos4210 Combiner represents an OR gate for SOC's IRQ lines. It combines
27 * IRQs are passed to GIC through Combiner.
35 #include "hw/arm/exynos4210.h"
38 #include "hw/qdev-properties.h"
45 do { fprintf(stdout, "COMBINER: [%s:%d] " fmt, __func__ , __LINE__, \
54 .name = "exynos4210.combiner.groupstate",
65 .name = "exynos4210.combiner",
92 reg_n = (offset - (req_quad_base_n << 4)) >> 2; in exynos4210_combiner_read()
[all …]
/openbmc/qemu/hw/arm/
H A Dexynos4210.c2 * Samsung exynos4210 SoC emulation
35 #include "hw/qdev-properties.h"
36 #include "hw/arm/exynos4210.h"
38 #include "hw/usb/hcd-ehci.h"
39 #include "target/arm/cpu-qom.h"
55 /* Interrupt Group of External Interrupt Combiner for I2C */
68 /* Interrupt Group of External Interrupt Combiner for UART */
75 /* Combiner */
191 * External GIC sources which are not from External Interrupt Combiner or
193 * which is INTG16 in Internal Interrupt Combiner.
[all …]
/openbmc/linux/arch/arm/boot/dts/samsung/
H A Dexynos4.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
7 * Copyright (c) 2010-2011 Linaro Ltd.
19 #include <dt-bindings/clock/exynos4.h>
20 #include <dt-bindings/clock/exynos-audss-clk.h>
21 #include <dt-bindings/interrupt-controller/arm-gic.h>
22 #include <dt-bindings/interrupt-controller/irq.h>
25 interrupt-parent = <&gic>;
26 #address-cells = <1>;
27 #size-cells = <1>;
[all …]
H A Dexynos5.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd.
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #include <dt-bindings/interrupt-controller/irq.h>
17 interrupt-parent = <&gic>;
18 #address-cells = <1>;
19 #size-cells = <1>;
33 compatible = "simple-bus";
34 #address-cells = <1>;
35 #size-cells = <1>;
[all …]
H A Dexynos54xx.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd.
28 arm_a7_pmu: arm-a7-pmu {
29 compatible = "arm,cortex-a7-pmu";
30 interrupt-parent = <&gic>;
38 arm_a15_pmu: arm-a15-pmu {
39 compatible = "arm,cortex-a15-pmu";
40 interrupt-parent = <&combiner>;
49 compatible = "arm,armv7-timer";
54 clock-frequency = <24000000>;
[all …]
H A Dexynos5250.dtsi1 // SPDX-License-Identifier: GPL-2.0
17 #include <dt-bindings/clock/exynos5250.h>
19 #include "exynos4-cpu-thermal.dtsi"
20 #include <dt-bindings/clock/exynos-audss-clk.h>
46 #address-cells = <1>;
47 #size-cells = <0>;
49 cpu-map {
62 compatible = "arm,cortex-a15";
65 clock-names = "cpu";
66 operating-points-v2 = <&cpu0_opp_table>;
[all …]
H A Dexynos4210.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung's Exynos4210 SoC device tree source
5 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
7 * Copyright (c) 2010-2011 Linaro Ltd.
10 * Samsung's Exynos4210 SoC device nodes are listed in this file. Exynos4210
15 * Exynos4210 SoC. As device tree coverage for Exynos4210 increases, additional
20 #include "exynos4-cpu-thermal.dtsi"
23 compatible = "samsung,exynos4210", "samsung,exynos4";
31 bus_acp: bus-acp {
32 compatible = "samsung,exynos-bus";
[all …]
H A Dexynos4x12.dtsi1 // SPDX-License-Identifier: GPL-2.0
19 #include "exynos4-cpu-thermal.dtsi"
27 fimc-lite0 = &fimc_lite_0;
28 fimc-lite1 = &fimc_lite_1;
31 bus_acp: bus-acp {
32 compatible = "samsung,exynos-bus";
34 clock-names = "bus";
35 operating-points-v2 = <&bus_acp_opp_table>;
38 bus_acp_opp_table: opp-table {
39 compatible = "operating-points-v2";
[all …]
H A Dexynos5420.dtsi1 // SPDX-License-Identifier: GPL-2.0
14 #include <dt-bindings/clock/exynos5420.h>
15 #include <dt-bindings/clock/exynos-audss-clk.h>
16 #include <dt-bindings/interrupt-controller/arm-gic.h>
37 bus_disp1: bus-disp1 {
38 compatible = "samsung,exynos-bus";
40 clock-names = "bus";
44 bus_disp1_fimd: bus-disp1-fimd {
45 compatible = "samsung,exynos-bus";
47 clock-names = "bus";
[all …]
/openbmc/qemu/include/hw/intc/
H A Dexynos4210_combiner.h2 * Samsung exynos4210 Interrupt Combiner
4 * Copyright (c) 2000 - 2011 Samsung Electronics Co., Ltd.
29 * State for each output signal of internal combiner
32 uint8_t src_mask; /* 1 - source enabled, 0 - disabled */
36 #define TYPE_EXYNOS4210_COMBINER "exynos4210.combiner"
39 /* Number of groups and total number of interrupts for the internal combiner */
52 uint32_t external; /* 1 means that this combiner is external */
/openbmc/qemu/include/hw/arm/
H A Dexynos4210.h2 * Samsung exynos4210 SoC emulation
27 #include "hw/or-irq.h"
32 #include "hw/core/split-irq.h"
61 * exynos4210 IRQ subsystem stub definitions.
77 * We need one splitter for every external combiner input, plus
78 * one for every non-zero entry in combiner_grp_to_gic_id[],
79 * minus one for every external combiner ID in second or later
108 #define TYPE_EXYNOS4210_SOC "exynos4210"
114 /* Get IRQ number from exynos4210 IRQ subsystem stub.
115 * To identify IRQ source use internal combiner group and bit number
[all …]
/openbmc/linux/Documentation/devicetree/bindings/timer/
H A Dsamsung,exynos4210-mct.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/timer/samsung,exynos4210-mct.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
14 global timer and CPU local timers. The global timer is a 64-bit free running
15 up-counter and can generate 4 interrupts when the counter reaches one of the
16 four preset counter values. The CPU local timers are 32-bit free running
17 down-counters and generate an interrupt when the counter expires. There is
23 - enum:
[all …]
/openbmc/linux/drivers/irqchip/
H A Dexynos-combiner.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
6 * Combiner irqchip for EXYNOS
48 return combiner_data->base; in combiner_base()
53 u32 mask = 1 << (data->hwirq % 32); in combiner_mask_irq()
60 u32 mask = 1 << (data->hwirq % 32); in combiner_unmask_irq()
76 status = readl_relaxed(chip_data->base + COMBINER_INT_STATUS); in combiner_handle_cascade_irq()
78 status &= chip_data->irq_mask; in combiner_handle_cascade_irq()
83 combiner_irq = chip_data->hwirq_offset + __ffs(status); in combiner_handle_cascade_irq()
97 struct irq_chip *chip = irq_get_chip(chip_data->parent_irq); in combiner_set_affinity()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/thermal/
H A Dsamsung,exynos-thermal.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/thermal/samsung,exynos-thermal.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
13 For multi-instance tmu each instance should have an alias correctly numbered
19 - samsung,exynos3250-tmu
20 - samsung,exynos4412-tmu
21 - samsung,exynos4210-tmu
22 - samsung,exynos5250-tmu
[all …]
/openbmc/linux/Documentation/devicetree/bindings/display/samsung/
H A Dsamsung,fimd.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Inki Dae <inki.dae@samsung.com>
11 - Seung-Woo Kim <sw0312.kim@samsung.com>
12 - Kyungmin Park <kyungmin.park@samsung.com>
13 - Krzysztof Kozlowski <krzk@kernel.org>
18 - samsung,s3c2443-fimd
19 - samsung,s3c6400-fimd
20 - samsung,s5pv210-fimd
[all …]
/openbmc/linux/
H A DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
[all …]
H A Dopengrok0.0.log1 2024-12-28 20:09:05.996-0600 FINEST t1171 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/linux/drivers/staging/media/av7110/video-continue.rst.gz'
2 2024-12-28 20:09:05.942-0600 FINEST t1149 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/u-boot/arch/sh/config.mk.gz'
3 2024-12-2
[all...]
H A Dopengrok2.0.log1 2024-12-28 20:05:26.116-0600 FINEST t586 Statistics.logIt: Added: '/openbmc/linux/tools/testing/selftests/drivers/net/mlxsw/rtnetlink.sh' (ShAnalyzer) (took 79 ms)
2 2024-12-28 20:05:26.112-0600 FINER t592 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/qemu',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/qemu/chardev/spice.c'
3 2024-12-28 20:05:26.116-0600 FINEST t592 Statistics.logIt: Added: '/openbmc/qemu/chardev/spice.c' (CAnalyzer) (took 33 ms)
4 2024-1
[all...]