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/openbmc/linux/Documentation/ABI/testing/
H A Dsysfs-devices-mmc5 Enhanced area is a new feature defined in eMMC4.4 standard.
9 enhanced data area. If not, this attribute will be -EINVAL.
16 Enhanced area is a new feature defined in eMMC4.4 standard.
19 is enabled, this attribute will indicate the size of enhanced
/openbmc/openbmc/poky/meta/files/common-licenses/
H A DCDLA-Permissive-1.017 1.5 “Enhanced Data” means the subset of Data that You Publish and that is composed of (a) Your Addi…
23 1.8 “Publish” means to make all or a subset of Data (including Your Enhanced Data) available in any…
45 3.1 If You Publish Data You Receive or Enhanced Data:
49 (b) You must cause any Data files containing Enhanced Data to carry prominent notices that You have…
53 …for use, reproduction, or distribution of that Enhanced Data, or for any combination of Data and E…
55 3.3 You and each Data Provider agree that Enhanced Data shall not be considered a work of joint aut…
71 6.1 EXCEPT AS EXPRESSLY SET FORTH IN THIS AGREEMENT, THE DATA (INCLUDING ENHANCED DATA) IS PROVIDED…
H A DCDLA-Sharing-1.017 1.5 “Enhanced Data” means the subset of Data that You Publish and that is composed of (a) Your Addi…
25 1.9 “Publish” means to make all or a subset of Data (including Your Enhanced Data) available in any…
47 3.1 If You Publish Data You Receive or Enhanced Data:
49 (a) The Data (including the Enhanced Data) must be Published under this Agreement in accordance wit…
51 (b) You must cause any Data files containing Enhanced Data to carry prominent notices that You have…
57 …restriction on commercial or non-commercial Use of Data (including Your Enhanced Data) or by limit…
59 3.4 You and each Data Provider agree that Enhanced Data shall not be considered a work of joint aut…
75 6.1 EXCEPT AS EXPRESSLY SET FORTH IN THIS AGREEMENT, THE DATA (INCLUDING ENHANCED DATA) IS PROVIDED…
/openbmc/linux/drivers/tty/serial/jsm/
H A Djsm_cls.c59 * The Enhanced Register Set may only be accessed when in cls_set_cts_flow_control()
72 /* Write old LCR value back out, which turns enhanced access off */ in cls_set_cts_flow_control()
100 * The Enhanced Register Set may only be accessed when in cls_set_ixon_flow_control()
113 /* Now set our current start/stop chars while in enhanced mode */ in cls_set_ixon_flow_control()
119 /* Write old LCR value back out, which turns enhanced access off */ in cls_set_ixon_flow_control()
145 * The Enhanced Register Set may only be accessed when in cls_set_no_output_flow_control()
158 /* Write old LCR value back out, which turns enhanced access off */ in cls_set_no_output_flow_control()
188 * The Enhanced Register Set may only be accessed when in cls_set_rts_flow_control()
201 /* Write old LCR value back out, which turns enhanced access off */ in cls_set_rts_flow_control()
226 * The Enhanced Register Set may only be accessed when in cls_set_ixoff_flow_control()
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/openbmc/linux/drivers/iommu/
H A Dfsl_pamu.h338 #define IOE_EREAD0 0x82 /* Enhanced read type 0 */
339 #define IOE_EREAD0_IDX 0x02 /* Enhanced read type 0 */
340 #define IOE_EWRITE0 0x83 /* Enhanced write type 0 */
341 #define IOE_EWRITE0_IDX 0x03 /* Enhanced write type 0 */
344 #define IOE_EREAD1 0x85 /* Enhanced read type 1 */
345 #define IOE_EREAD1_IDX 0x05 /* Enhanced read type 1 */
346 #define IOE_EWRITE1 0x86 /* Enhanced write type 1 */
347 #define IOE_EWRITE1_IDX 0x06 /* Enhanced write type 1 */
/openbmc/linux/drivers/net/ethernet/stmicro/stmmac/
H A Ddescs_com.h3 Header File to describe Normal/enhanced descriptor functions used for RING
8 It defines all the functions used to handle the normal/enhanced
21 /* Enhanced descriptors */
90 /* Enhanced descriptors */
H A Ddescs.h46 /* Enhanced receive descriptor defines */
92 /* Enhanced transmit descriptor defines */
174 /* Enhanced descriptor for TBS */
/openbmc/linux/drivers/cpufreq/
H A Dspeedstep-centrino.c3 * cpufreq driver for Enhanced SpeedStep, as found in Intel's Pentium
6 * Since the original Pentium M, most new Intel CPUs support Enhanced
351 /* Only Intel makes Enhanced Speedstep-capable CPUs */ in centrino_cpu_init()
371 "Enhanced SpeedStep: send /proc/cpuinfo to " in centrino_cpu_init()
379 /* Check to see if Enhanced SpeedStep is enabled, and try to in centrino_cpu_init()
385 pr_debug("trying to enable Enhanced SpeedStep (%x)\n", l); in centrino_cpu_init()
391 pr_info("couldn't enable Enhanced SpeedStep\n"); in centrino_cpu_init()
531 * centrino_init - initializes the Enhanced SpeedStep CPUFreq driver
533 * Initializes the Enhanced SpeedStep support. Returns -ENODEV on
557 MODULE_DESCRIPTION ("Enhanced SpeedStep driver for Intel Pentium M processors.");
H A DKconfig.x8692 This driver also supports Intel Enhanced Speedstep and newer
209 tristate "Intel Enhanced SpeedStep (deprecated)"
216 This adds the CPUFreq driver for Enhanced SpeedStep enabled
316 tristate "VIA C7 Enhanced PowerSaver (DANGEROUS)"
/openbmc/linux/arch/arm64/mm/
H A Dmmap.c21 /* PAGE_EXECONLY if Enhanced PAN */
30 /* PAGE_EXECONLY if Enhanced PAN */
68 * With Enhanced PAN we can honour the execute-only permissions as in adjust_protection_map()
/openbmc/linux/Documentation/devicetree/bindings/regulator/
H A Dmaxim,max8973.yaml76 description: Enable Enhanced Transient Response.
81 Enhanced transient response circuit is enabled and set for high
84 Enhanced transient response (ETR) will affect the configuration of CKADV.
/openbmc/linux/arch/s390/tools/
H A Dgen_facilities.c77 8, /* enhanced-DAT 1 */
86 78, /* enhanced-DAT 2 */
88 131, /* enhanced-SOP 2 and side-effect */
91 150, /* enhanced sort */
/openbmc/linux/net/bluetooth/
H A DKconfig54 for Enhanced Data Rate (EDR) available with Bluetooth
74 bool "Bluetooth L2CAP Enhanced Credit Flow Control"
78 Bluetooth Low Energy L2CAP Enhanced Credit Flow Control available with
/openbmc/qemu/docs/system/arm/
H A Demulation.rst51 - FEAT_ECV (Enhanced Counter Virtualization)
56 - FEAT_EPAC (Enhanced pointer authentication)
57 - FEAT_ETS2 (Enhanced Translation Synchronization)
58 - FEAT_EVT (Enhanced Virtualization Traps)
101 - FEAT_NV2 (Enhanced nested virtualization support)
/openbmc/u-boot/arch/arm/cpu/armv8/fsl-layerscape/doc/
H A DREADME.soc42 - Enhanced secure digital host controller (eSDXC/eMMC)
115 - Enhanced secure digital host controller (eSDXC/eMMC)
153 - Two enhanced secure digital host controllers
201 - Enhanced secure digital host controller (eSDXC/eMMC)
242 - Enhanced secure digital host controller (eSDXC/eMMC)
307 Two Enhanced secure digital host controllers
/openbmc/linux/Documentation/admin-guide/hw-vuln/
H A Dspectre.rst139 Enhanced IBRS.
219 x86 CPUs with Enhanced Indirect Branch Restricted Speculation
220 (Enhanced IBRS) available in hardware should use the feature to
221 mitigate Spectre variant 2 instead of retpoline. Enhanced IBRS is
384 'Mitigation: Enhanced IBRS' Hardware-focused mitigation
385 'Mitigation: Enhanced IBRS + Retpolines' Hardware-focused + Retpolines
386 'Mitigation: Enhanced IBRS + LFENCE' Hardware-focused + LFENCE
499 or enhanced IBRS on x86), retpoline is automatically disabled at run time.
501 Systems which support enhanced IBRS (eIBRS) enable IBRS protection once at
509 On Intel's enhanced IBRS systems, this includes cross-thread branch target
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/openbmc/qemu/include/hw/audio/
H A Dasc.h5 * Enhanced Apple Sound Chip (EASC) 343S1063
23 ASC_TYPE_EASC = 1 /* discrete Enhanced Apple Sound Chip */
/openbmc/u-boot/arch/powerpc/dts/
H A De6500_power_isa.dtsi17 power-isa-e.ed; // Embedded.Enhanced Debug
35 fsl,eref-er; // Enhanced Reservations
/openbmc/linux/net/sched/
H A DKconfig289 tristate "Common Applications Kept Enhanced (CAKE)"
291 Say Y here if you want to use the Common Applications Kept Enhanced
323 tristate "Proportional Integral controller Enhanced (PIE) scheduler"
326 Enhanced scheduler packet scheduling algorithm.
336 tristate "Flow Queue Proportional Integral controller Enhanced (FQ-PIE)"
339 controller Enhanced (FQ-PIE) packet scheduling algorithm.
390 tristate "Enhanced transmission selection scheduler (ETS)"
392 The Enhanced Transmission Selection scheduler is a classful
436 bool "Flow Queue Proportional Integral controller Enhanced" if NET_SCH_FQ_PIE
/openbmc/linux/Documentation/devicetree/bindings/mmc/
H A Dfsl-esdhc.txt1 * Freescale Enhanced Secure Digital Host Controller (eSDHC)
3 The Enhanced Secure Digital Host Controller provides an interface
/openbmc/openbmc/meta-openembedded/meta-oe/recipes-shells/tcsh/
H A Dtcsh_6.24.12.bb1 DESCRIPTION = "TENEX C Shell, an enhanced version of Berkeley csh \
2 The TENEX C Shell is an enhanced version of the Berkeley Unix C shell. \
/openbmc/phosphor-dbus-interfaces/yaml/xyz/openbmc_project/Inventory/Item/
H A DCpu.interface.yaml44 Capable, Multi-Core, Hardware Thread, Execute Protection, Enhanced
85 Support enhanced virtualization.
/openbmc/linux/sound/soc/fsl/
H A DKconfig71 tristate "Enhanced Serial Audio Interface (ESAI) module support"
75 Say Y if you want to add Enhanced Synchronous Audio Interface
91 tristate "Enhanced Asynchronous Sample Rate Converter (EASRC) module support"
96 Say Y if you want to add Enhanced ASRC support for NXP. The ASRC is
/openbmc/linux/Documentation/devicetree/bindings/sound/
H A Dfsl,esai.txt1 Freescale Enhanced Serial Audio Interface (ESAI) Controller
3 The Enhanced Serial Audio Interface (ESAI) provides a full-duplex serial port
/openbmc/linux/drivers/net/wireless/ath/wil6210/
H A Dtxrx_edma.h75 /* Enhanced Rx descriptor - MAC part
89 /* Enhanced Rx descriptor - DMA part
113 /* Enhanced Tx descriptor - DMA part
139 /* Enhanced Tx descriptor - MAC part
189 /* Enhanced TX status message
236 /* Enhanced Rx status message - compressed part
294 /* Enhanced Rx status message - extension part

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