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/openbmc/linux/Documentation/devicetree/bindings/phy/
H A Dintel,lgm-emmc-phy.yaml4 $id: http://devicetree.org/schemas/phy/intel,lgm-emmc-phy.yaml#
7 title: Intel Lightning Mountain(LGM) eMMC PHY
13 Bindings for eMMC PHY on Intel's Lightning Mountain SoC, syscon
14 node is used to reference the base address of eMMC phy registers.
16 The eMMC PHY node should be the child of a syscon node with the
27 - intel,lgm-emmc-phy
28 - intel,keembay-emmc-phy
59 emmc_phy: emmc-phy@a8 {
60 compatible = "intel,lgm-emmc-phy";
62 clocks = <&emmc>;
[all …]
/openbmc/linux/Documentation/devicetree/bindings/mmc/
H A Dallwinner,sun4i-a10-mmc.yaml25 - const: allwinner,sun8i-a83t-emmc
28 - const: allwinner,sun50i-a64-emmc
30 - const: allwinner,sun50i-a100-emmc
36 - const: allwinner,sun8i-r40-emmc
37 - const: allwinner,sun50i-a64-emmc
42 - const: allwinner,sun50i-h5-emmc
43 - const: allwinner,sun50i-a64-emmc
48 - const: allwinner,sun50i-h6-emmc
49 - const: allwinner,sun50i-a64-emmc
54 - const: allwinner,sun20i-d1-emmc
[all …]
H A Dmmc-pwrseq-emmc.yaml4 $id: http://devicetree.org/schemas/mmc/mmc-pwrseq-emmc.yaml#
7 title: Simple eMMC hardware reset provider
13 The purpose of this driver is to perform standard eMMC hw reset
16 fix possible issues if bootloader has left eMMC card in initialized or
19 doesn't have hardware reset logic connected to emmc card and (limited or
20 broken) ROM bootloaders are unable to read second stage from the emmc
25 const: mmc-pwrseq-emmc
31 and then deasserted to perform eMMC card reset. To perform
45 compatible = "mmc-pwrseq-emmc";
H A Dmarvell,xenon-sdhci.yaml74 - emmc 5.1 phy
75 - emmc 5.0 phy
77 Xenon support multiple types of PHYs. To select eMMC 5.1 PHY, set:
78 marvell,xenon-phy-type = "emmc 5.1 phy" eMMC 5.1 PHY is the default
79 choice if this property is not provided. To select eMMC 5.0 PHY, set:
80 marvell,xenon-phy-type = "emmc 5.0 phy"
82 All those types of PHYs can support eMMC, SD and SDIO. Please note that
84 entire SDHC type or property. For example, "emmc 5.1 phy" doesn't mean
85 that this Xenon SDHC only supports eMMC 5.1.
94 Only available for eMMC PHY.
[all …]
H A Dmmc-controller.yaml50 Non-removable slot (like eMMC); assume always present.
93 - for eMMC, the maximum supported frequency is 200MHz,
112 line. Not used in combination with eMMC or SDIO.
173 eMMC hardware reset is supported
193 eMMC high-speed DDR mode (1.2V I/O) is supported.
198 eMMC high-speed DDR mode (1.8V I/O) is supported.
203 eMMC high-speed DDR mode (3.3V I/O) is supported.
208 eMMC HS200 mode (1.2V I/O) is supported.
213 eMMC HS200 mode (1.8V I/O) is supported.
218 eMMC HS400 mode (1.2V I/O) is supported.
[all …]
/openbmc/linux/Documentation/driver-api/mmc/
H A Dmmc-tools.rst16 - Determine the eMMC writeprotect status.
17 - Set the eMMC writeprotect status.
18 - Set the eMMC data sector size to 4KB by disabling emulation.
25 - Enable the eMMC BKOPS feature.
26 - Permanently enable the eMMC H/W Reset feature.
27 - Permanently disable the eMMC H/W Reset feature.
33 - Enable the eMMC cache feature.
34 - Disable the eMMC cache feature.
/openbmc/docs/architecture/code-update/
H A Demmc-storage-design.md1 # eMMC Storage Design
11 Proposal to define an initial storage design for an eMMC device. This includes
36 - The eMMC image layout and characteristics are specified in a meta layer. This
44 - GPT partitioning for the eMMC User Data Area: This is chosen over dynamic
55 filesystem for eMMC.
80 - Provisioning: OpenBMC will produce as a build artifact a flashable eMMC image
86 SOCs such as the AST2500 do not support executing U-Boot from an eMMC. In
88 support for the eMMC. The U-Boot and kernel are less than 10MB in size, so a
107 The AST2600 supports executing U-Boot from the eMMC, so that provides the
108 flexibility of just having the eMMC chip on a system, or still have U-Boot in
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dmeson-gxl-s905x-libretech-cc.dts37 emmc_pwrseq: emmc-pwrseq {
38 compatible = "mmc-pwrseq-emmc";
196 "eMMC D0", "eMMC D1", "eMMC D2", "eMMC D3",
197 "eMMC D4", "eMMC D5", "eMMC D6", "eMMC D7",
198 "eMMC Clk", "eMMC Reset", "eMMC CMD",
199 "ALT BOOT MODE", "", "", "", "eMMC Data Strobe",
248 /* eMMC */
H A Dmeson-gxl-s905x-khadas-vim.dts146 "eMMC D0", "eMMC D1", "eMMC D2", "eMMC D3",
147 "eMMC D4", "eMMC D5", "eMMC D6", "eMMC D7",
148 "eMMC Clk", "eMMC Reset", "eMMC CMD",
149 "", "BOOT_MODE", "", "", "eMMC Data Strobe",
H A Dsun7i-a20-olimex-som204-evb-emmc.dts3 * Device Tree Source for A20-SOM204-EVB-eMMC Board
13 model = "Olimex A20-SOM204-EVB-eMMC";
14 compatible = "olimex,a20-olimex-som204-evb-emmc", "allwinner,sun7i-a20";
17 compatible = "mmc-pwrseq-emmc";
31 emmc: emmc@0 { label
H A Dmeson-gxbb-odroidc2.dts98 emmc_pwrseq: emmc-pwrseq {
99 compatible = "mmc-pwrseq-emmc";
210 "eMMC D0", "eMMC D1", "eMMC D2", "eMMC D3", "eMMC D4",
211 "eMMC D5", "eMMC D6", "eMMC D7", "eMMC Clk",
212 "eMMC Reset", "eMMC CMD",
269 /* eMMC */
H A Dmeson-gxbb-nanopi-k2.dts105 emmc_pwrseq: emmc-pwrseq {
106 compatible = "mmc-pwrseq-emmc";
215 "eMMC D0", "eMMC D1", "eMMC D2", "eMMC D3", "eMMC D4",
216 "eMMC D5", "eMMC D6", "eMMC D7", "eMMC Clk",
217 "eMMC Reset", "eMMC CMD",
218 "", "", "", "", "eMMC DS",
315 /* eMMC */
/openbmc/u-boot/doc/device-tree-bindings/exynos/
H A Demmc-reset.txt1 * Samsung eMMC reset
3 Some exynos boards require special handling of nRESET_OUT line for eMMC memory
7 - compatible: should be "samsung,emmc-reset"
8 - reset-gpio: gpio chip for eMMC reset.
12 emmc-reset {
13 compatible = "samsung,emmc-reset";
/openbmc/openbmc/meta-facebook/recipes-fb/emmc-init/
H A Demmc-init_0.1.bb12 file://emmc-init \
13 file://emmc-init.service \
17 install -d ${D}${libexecdir}/emmc-init
18 install -m 0755 ${UNPACKDIR}/emmc-init ${D}${libexecdir}/emmc-init
21 SYSTEMD_SERVICE:${PN} += "emmc-init.service"
/openbmc/linux/arch/arm64/boot/dts/amlogic/
H A Dmeson-gxl-s905x-libretech-cc.dts46 emmc_pwrseq: emmc-pwrseq {
47 compatible = "mmc-pwrseq-emmc";
127 /* This is provided by LDOs on the eMMC daugther card */
268 "eMMC D0", "eMMC D1", "eMMC D2", "eMMC D3",
269 "eMMC D4", "eMMC D5", "eMMC D6", "eMMC D7",
270 "eMMC Clk", "eMMC Reset", "eMMC CMD",
271 "ALT BOOT MODE", "", "", "", "eMMC Data Strobe",
319 /* eMMC */
H A Dmeson-gxl-s905x-khadas-vim.dts180 "eMMC D0", "eMMC D1", "eMMC D2", "eMMC D3",
181 "eMMC D4", "eMMC D5", "eMMC D6", "eMMC D7",
182 "eMMC Clk", "eMMC Reset", "eMMC CMD",
183 "", "BOOT_MODE", "", "", "eMMC Data Strobe",
H A Dmeson-gxl-s805x-libretech-ac.dts53 emmc_pwrseq: emmc-pwrseq {
54 compatible = "mmc-pwrseq-emmc";
245 "eMMC D0", "eMMC D1", "eMMC D2", "eMMC D3",
246 "eMMC D4", "eMMC D5", "eMMC D6", "eMMC D7",
247 "eMMC Clk", "eMMC Reset", "eMMC CMD",
276 /* eMMC */
H A Dmeson-gxbb-nanopi-k2.dts107 emmc_pwrseq: emmc-pwrseq {
108 compatible = "mmc-pwrseq-emmc";
256 "eMMC D0", "eMMC D1", "eMMC D2", "eMMC D3", "eMMC D4",
257 "eMMC D5", "eMMC D6", "eMMC D7", "eMMC Clk",
258 "eMMC Reset", "eMMC CMD",
259 "", "", "", "", "eMMC DS",
358 /* eMMC */
/openbmc/linux/arch/arm/boot/dts/allwinner/
H A Dsun7i-a20-olimex-som204-evb-emmc.dts3 * Device Tree Source for A20-SOM204-EVB-eMMC Board
13 model = "Olimex A20-SOM204-EVB-eMMC";
14 compatible = "olimex,a20-olimex-som204-evb-emmc", "allwinner,sun7i-a20";
17 compatible = "mmc-pwrseq-emmc";
29 emmc: emmc@0 { label
H A Dsun7i-a20-olimex-som-evb-emmc.dts3 * Device Tree Source for A20-Olimex-SOM-EVB-eMMC Board
14 model = "Olimex A20-Olimex-SOM-EVB-eMMC";
15 compatible = "olimex,a20-olimex-som-evb-emmc", "allwinner,sun7i-a20";
18 compatible = "mmc-pwrseq-emmc";
30 emmc: emmc@0 { label
/openbmc/openbmc/meta-aspeed/recipes-bsp/u-boot/files/
H A DevbA3_emmc_patch.json29 "Enable boot from eMMC": {
30 // false: Disable boot from eMMC
31 // true : Enable boot from eMMC
37 "Enable boot SPI or eMMC ABR": {
38 // false: Disable boot SPI or eMMC ABR
39 // true : Enable boot SPI or eMMC ABR
/openbmc/linux/arch/arm/boot/dts/nxp/imx/
H A DMakefile67 imx6dl-cubox-i-emmc-som-v15.dtb \
88 imx6dl-hummingboard-emmc-som-v15.dtb \
91 imx6dl-hummingboard2-emmc-som-v15.dtb \
159 imx6q-cubox-i-emmc-som-v15.dtb \
192 imx6q-hummingboard-emmc-som-v15.dtb \
195 imx6q-hummingboard2-emmc-som-v15.dtb \
212 imx6q-phytec-mira-rdk-emmc.dtb \
299 imx6ul-isiot-emmc.dtb \
311 imx6ul-phytec-segin-ff-rdk-emmc.dtb \
319 imx6ull-colibri-emmc-aster.dtb \
[all …]
/openbmc/u-boot/board/bticino/mamoj/
H A DREADME16 2. eMMC boot (via DFU)
62 2. eMMC boot via DFU:
65 Once booted from USB SDP, program the eMMC as below(make sure to connect USB OTG)
67 - Change eMMC partition config
71 - Partition eMMC on host
75 Host will able to detect the eMMC disk as UMS, partition the same.
95 Poweroff and Poweron the board and see U-Boot booting from eMMC.
100 - Skip 10M space and create dual partitions for eMMC, start sector is 20480
/openbmc/linux/arch/arm/boot/dts/amlogic/
H A Dmeson8b-ec100.dts30 emmc_pwrseq: emmc-pwrseq {
31 compatible = "mmc-pwrseq-emmc";
425 "NAND_D0 (EMMC)", "NAND_D1 (EMMC)",
426 "NAND_D2 (EMMC)", "NAND_D3 (EMMC)",
427 "NAND_D4 (EMMC)", "NAND_D5 (EMMC)",
428 "NAND_D6 (EMMC)", "NAND_D7 (EMMC)",
429 "NAND_CS1 (EMMC)", "NAND_CS2 iNAND_RS1 (EMMC)",
430 "NAND_nR/B iNAND_CMD (EMMC)", "NAND_ALE (EMMC)",
431 "NAND_CLE (EMMC)", "nRE_S1 NAND_nRE (EMMC)",
432 "nWE_S1 NAND_nWE (EMMC)", "", "", "SPI_CS",
/openbmc/openbmc/meta-facebook/recipes-core/base-files/
H A Dbase-files_%.bbappend1 do_install:append:mf-fb-secondary-emmc() {
2 # create eMMC mount point
3 install -m 0755 -d ${D}/mnt/emmc
5 # insert fstab entry for eMMC
6 …FSTAB_EMMC="/dev/mmcblk0 /mnt/emmc btrfs compress=zstd,discard,nofail,x-systemd.device-timeout=10s…

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