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/openbmc/linux/Documentation/devicetree/bindings/phy/
H A Dnvidia,tegra20-usb-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/nvidia,tegra20-usb-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Dmitry Osipenko <digetx@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
12 - Thierry Reding <thierry.reding@gmail.com>
17 - items:
18 - enum:
19 - nvidia,tegra124-usb-phy
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/openbmc/u-boot/arch/arm/dts/
H A Dtegra30.dtsi1 #include <dt-bindings/clock/tegra30-car.h>
2 #include <dt-bindings/gpio/tegra-gpio.h>
3 #include <dt-bindings/memory/tegra30-mc.h>
4 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 interrupt-parent = <&lic>;
13 pcie-controller@00003000 {
14 compatible = "nvidia,tegra30-pcie";
19 reg-names = "pads", "afi", "cs";
22 interrupt-names = "intr", "msi";
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H A Dtegra124.dtsi1 #include <dt-bindings/clock/tegra124-car.h>
2 #include <dt-bindings/gpio/tegra-gpio.h>
3 #include <dt-bindings/memory/tegra124-mc.h>
4 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra-xusb.h>
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/reset/tegra124-car.h>
8 #include <dt-bindings/thermal/tegra124-soctherm.h>
14 interrupt-parent = <&lic>;
17 pcie-controller@01003000 {
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H A Dtegra114.dtsi1 #include <dt-bindings/clock/tegra114-car.h>
2 #include <dt-bindings/gpio/tegra-gpio.h>
3 #include <dt-bindings/memory/tegra114-mc.h>
4 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 interrupt-parent = <&lic>;
14 compatible = "nvidia,tegra114-host1x", "simple-bus";
20 reset-names = "host1x";
22 #address-cells = <1>;
23 #size-cells = <1>;
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H A Dtegra20.dtsi1 #include <dt-bindings/clock/tegra20-car.h>
2 #include <dt-bindings/gpio/tegra-gpio.h>
3 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 interrupt-parent = <&lic>;
13 compatible = "nvidia,tegra20-host1x", "simple-bus";
19 reset-names = "host1x";
21 #address-cells = <1>;
22 #size-cells = <1>;
27 compatible = "nvidia,tegra20-mpe";
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H A Dtegra210.dtsi1 #include <dt-bindings/clock/tegra210-car.h>
2 #include <dt-bindings/gpio/tegra-gpio.h>
3 #include <dt-bindings/memory/tegra210-mc.h>
4 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra-xusb.h>
10 interrupt-parent = <&lic>;
11 #address-cells = <2>;
12 #size-cells = <2>;
14 pcie-controller@01003000 {
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/openbmc/linux/drivers/net/ethernet/amazon/ena/
H A Dena_netdev.h1 /* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */
3 * Copyright 2015-2020 Amazon.com, Inc. or its affiliates. All rights reserved.
29 #define DEVICE_NAME "Elastic Network Adapter (ENA)"
37 * Since the max packet size the ENA handles is ~9kB limit the buffer length to
60 #define ENA_DEFAULT_RX_COPYBREAK (256 - NET_IP_ALIGN)
88 #define ENA_TX_RING_IDX_NEXT(idx, ring_size) (((idx) + 1) & ((ring_size) - 1))
90 #define ENA_RX_RING_IDX_NEXT(idx, ring_size) (((idx) + 1) & ((ring_size) - 1))
92 (((idx) + (n)) & ((ring_size) - 1))
97 #define ENA_IO_RXQ_IDX_TO_COMBINED_IDX(q) (((q) - 1) / 2)
149 /* Used for detect missing tx packets to limit the number of prints */
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/openbmc/linux/net/sched/
H A Dsch_sfb.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (c) 2008-2011 Juliusz Chroboczek <jch@pps.jussieu.fr>
10 * U. Michigan CSE-TR-387-99, April 1999.
12 * http://www.thefengs.com/wuchang/blue/CSE-TR-387-99.pdf
35 #define SFB_BUCKET_MASK (SFB_NUMBUCKETS - 1)
62 u32 limit; /* HARD maximal queue length */ member
95 return (struct sfb_skb_cb *)qdisc_skb_cb(skb)->data; in sfb_skb_cb()
104 return sfb_skb_cb(skb)->hashes[slot]; in sfb_hash()
107 /* Probabilities are coded as Q0.16 fixed-point values,
120 return p1 > p2 ? p1 - p2 : 0; in prob_minus()
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/openbmc/linux/arch/arm/boot/dts/nvidia/
H A Dtegra30.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra30-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra30-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/soc/tegra-pmc.h>
8 #include <dt-bindings/thermal/thermal.h>
10 #include "tegra30-peripherals-opp.dtsi"
14 interrupt-parent = <&lic>;
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H A Dtegra124.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra124-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra124-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/reset/tegra124-car.h>
8 #include <dt-bindings/thermal/tegra124-soctherm.h>
9 #include <dt-bindings/soc/tegra-pmc.h>
11 #include "tegra124-peripherals-opp.dtsi"
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H A Dtegra114.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra114-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra114-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/soc/tegra-pmc.h>
11 interrupt-parent = <&lic>;
12 #address-cells = <1>;
13 #size-cells = <1>;
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H A Dtegra20.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra20-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra20-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/soc/tegra-pmc.h>
9 #include "tegra20-peripherals-opp.dtsi"
13 interrupt-parent = <&lic>;
14 #address-cells = <1>;
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/openbmc/linux/arch/arm64/boot/dts/nvidia/
H A Dtegra132.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra124-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra124-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra-xusb.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/thermal/tegra124-soctherm.h>
9 #include <dt-bindings/soc/tegra-pmc.h>
11 #include "tegra132-peripherals-opp.dtsi"
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H A Dtegra210.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra210-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra210-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
7 #include <dt-bindings/reset/tegra210-car.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/thermal/tegra124-soctherm.h>
10 #include <dt-bindings/soc/tegra-pmc.h>
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/openbmc/linux/drivers/edac/
H A Dmce_amd.c1 // SPDX-License-Identifier: GPL-2.0-only
71 "PFB non-cacheable bit parity error",
101 "Link-defined sync error packets detected on HT link",
174 "An ECC error was detected on a data cache read-modify-write by a store",
179 "An ECC error was detected on an EMEM read-modify-write by a store",
200 "IC Microtag or Full Tag Multi-hit Error",
209 "L1 BTB Multi-Match Error",
210 "L2 BTB Multi-Match Error",
214 "L1-TLB Multi-Hit",
215 "L2-TLB Multi-Hit",
[all …]
/openbmc/linux/drivers/net/phy/
H A Dbcm-phy-lib.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2015-2017 Broadcom
6 #include "bcm-phy-lib.h"
192 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) { in bcm_phy_config_intr()
359 if (phydev->autoneg == AUTONEG_ENABLE) in bcm_phy_enable_apd()
367 /* Enable Auto Power-Down (APD) for the PHY */ in bcm_phy_enable_apd()
394 phydev->supported)) in bcm_phy_set_eee()
397 phydev->supported)) in bcm_phy_set_eee()
448 if (count - BCM54XX_SHD_SCR2_WSPD_RTRY_LMT_OFFSET > in bcm_phy_downshift_set()
451 return -ERANGE; in bcm_phy_downshift_set()
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/openbmc/u-boot/drivers/usb/host/
H A Dehci-tegra.c1 // SPDX-License-Identifier: GPL-2.0+
4 * Copyright (c) 2009-2015 NVIDIA Corporation
12 #include <asm-generic/gpio.h>
14 #include <asm/arch-tegra/usb.h>
15 #include <asm/arch-tegra/clk_rst.h>
41 PARAM_ENABLE_DELAY_COUNT, /* PLL-U Enable Delay Count */
42 PARAM_STABLE_COUNT, /* PLL-U STABLE count */
43 PARAM_ACTIVE_DELAY_COUNT, /* PLL-U Active delay count */
44 PARAM_XTAL_FREQ_COUNT, /* PLL-U XTAL frequency count */
89 * PLLU-FOs are fixed at 12MHz/60MHz/480MHz).
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/openbmc/linux/drivers/usb/phy/
H A Dphy-tegra-usb.c1 // SPDX-License-Identifier: GPL-2.0
223 void __iomem *base = phy->regs; in set_pts()
226 if (phy->soc_config->has_hostpc) { in set_pts()
242 void __iomem *base = phy->regs; in set_phcd()
245 if (phy->soc_config->has_hostpc) { in set_phcd()
266 ret = clk_prepare_enable(phy->pad_clk); in utmip_pad_open()
268 dev_err(phy->u_phy.dev, in utmip_pad_open()
269 "Failed to enable UTMI-pads clock: %d\n", ret); in utmip_pad_open()
275 ret = reset_control_deassert(phy->pad_rst); in utmip_pad_open()
277 dev_err(phy->u_phy.dev, in utmip_pad_open()
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/openbmc/openbmc/poky/meta/files/
H A Dspdx-licenses.json18 "detailsUrl": "https://spdx.org/licenses/3D-Slicer-1.0.json",
21 "licenseId": "3D-Slicer-1.0",
23 "reference": "https://spdx.org/licenses/3D-Slicer-1.0.html",
55 "detailsUrl": "https://spdx.org/licenses/AdaCore-doc.json",
58 "licenseId": "AdaCore-doc",
60 "reference": "https://spdx.org/licenses/AdaCore-doc.html",
64 "https://github.com/AdaCore/gnatcoll-core/blob/master/docs/index.rst",
65 "https://github.com/AdaCore/gnatcoll-db/blob/master/docs/index.rst"
69 "detailsUrl": "https://spdx.org/licenses/Adobe-2006.json",
72 "licenseId": "Adobe-2006",
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/openbmc/linux/drivers/net/fddi/skfp/
H A Dpcmplc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
67 #define GO_STATE(x) (mib->fddiPORTPCMState = (x)|AFLAG)
68 #define ACTIONS_DONE() (mib->fddiPORTPCMState &= ~AFLAG)
109 * PCL-S control register
110 * this register in the PLC-S controls the scrambling parameters
121 * PCL-S control register
122 * this register in the PLC-S controls the scrambling parameters
152 #define PLC_MS(m) ((int)((0x10000L-(m*100000L/2048))))
208 phy->timer0_exp = FALSE ; /* clear timer event flag */ in start_pcm_timer0()
209 smt_timer_start(smc,&phy->pcm_timer0,value, in start_pcm_timer0()
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/openbmc/linux/
H A Dopengrok1.0.log1 2024-12-28 20:07:11.902-0600 FINER t583 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/linux',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/linux/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c'
2 2024-12-28 20:07:11.913-0600 FINEST t583 Statistics.logIt: Added: '/openbmc/linux/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c' (CAnalyzer) (took 116 ms)
3 2024-12-28 20:07:11.899-0600 FINER t593 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/linux',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/linux/tools/testing/selftests/powerpc/tm/tm-signa
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