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/openbmc/linux/Documentation/devicetree/bindings/nvmem/
H A Drockchip-efuse.yaml1 # SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/nvmem/rockchip-efuse.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip eFuse
10 - Heiko Stuebner <heiko@sntech.de>
13 - $ref: nvmem.yaml#
18 - rockchip,rk3066a-efuse
19 - rockchip,rk3188-efuse
20 - rockchip,rk3228-efuse
[all …]
H A Dsc27xx-efuse.txt1 = Spreadtrum SC27XX PMIC eFuse device tree bindings =
4 - compatible: Should be one of the following.
5 "sprd,sc2720-efuse"
6 "sprd,sc2721-efuse"
7 "sprd,sc2723-efuse"
8 "sprd,sc2730-efuse"
9 "sprd,sc2731-efuse"
10 - reg: Specify the address offset of efuse controller.
11 - hwlocks: Reference to a phandle of a hwlock provider node.
14 Are child nodes of eFuse, bindings of which as described in
[all …]
H A Dmediatek,efuse.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/nvmem/mediatek,efuse.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MediaTek efuse
10 MediaTek's efuse is used for storing calibration data, it can be accessed
14 - Andrew-CT Chen <andrew-ct.chen@mediatek.com>
15 - Lala Lin <lala.lin@mediatek.com>
18 - $ref: nvmem.yaml#
22 pattern: "^efuse@[0-9a-f]+$"
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H A Damlogic,meson6-efuse.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/nvmem/amlogic,meson6-efuse.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Amlogic Meson6 eFuse
10 - Neil Armstrong <neil.armstrong@linaro.org>
11 - Martin Blumenstingl <martin.blumenstingl@googlemail.com>
14 - $ref: nvmem.yaml#
19 - amlogic,meson6-efuse
20 - amlogic,meson8-efuse
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H A Damlogic,meson-gxbb-efuse.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/nvmem/amlogic,meson-gxbb-efuse.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Amlogic Meson GX eFuse
10 - Neil Armstrong <neil.armstrong@linaro.org>
13 - $ref: nvmem.yaml#
18 - const: amlogic,meson-gxbb-efuse
19 - items:
20 - const: amlogic,meson-gx-efuse
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H A Dsocionext,uniphier-efuse.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/nvmem/socionext,uniphier-efuse.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Socionext UniPhier eFuse
10 - Keiji Hayashibara <hayashibara.keiji@socionext.com>
11 - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
14 - $ref: nvmem.yaml#
18 const: socionext,uniphier-efuse
24 - compatible
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/openbmc/linux/arch/arm/boot/dts/aspeed/
H A Daspeed-bmc-delta-ahe50dc.dts1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
4 #include "aspeed-g4.dtsi"
5 #include <dt-bindings/gpio/aspeed-gpio.h>
8 efuse##n { \
9 compatible = "regulator-output"; \
10 vout-supply = <&efuse##n>; \
15 #define EFUSE(hexaddr, num) \ macro
16 efuse@##hexaddr { \
19 shunt-resistor-micro-ohms = <675>; \
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/openbmc/u-boot/drivers/misc/
H A Drockchip-efuse.c1 // SPDX-License-Identifier: GPL-2.0+
3 * eFuse driver for Rockchip devices
6 * Written by Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
31 u32 ctrl; /* 0x00 efuse control register */
32 u32 dout; /* 0x04 efuse data out register */
33 u32 rf; /* 0x08 efuse redundancy bit used register */
37 /* 0x14 efuse strobe finish control register */
63 printf("%s: no misc-device found\n", __func__); in dump_efuses()
73 printf("efuse-contents:\n"); in dump_efuses()
87 void *buf, int size) in rockchip_rk3399_efuse_read() argument
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/openbmc/linux/Documentation/devicetree/bindings/regulator/
H A Dti-abb-regulator.txt4 - compatible: Should be one of:
5 - "ti,abb-v1" for older SoCs like OMAP3
6 - "ti,abb-v2" for newer SoCs like OMAP4, OMAP5
7 - "ti,abb-v3" for a generic definition where setup and control registers are
9 - reg: Address and length of the register set for the device. It contains
10 the information of registers in the same order as described by reg-names
11 - reg-names: Should contain the reg names
12 - "base-address" - contains base address of ABB module (ti,abb-v1,ti,abb-v2)
13 - "control-address" - contains control register address of ABB module (ti,abb-v3)
14 - "setup-address" - contains setup register address of ABB module (ti,abb-v3)
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/openbmc/linux/drivers/nvmem/
H A Drockchip-efuse.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Rockchip eFuse Driver
6 * Author: Caesar Wang <wxt@rock-chips.com>
14 #include <linux/nvmem-provider.h>
58 struct rockchip_efuse_chip *efuse = context; in rockchip_rk3288_efuse_read() local
62 ret = clk_prepare_enable(efuse->clk); in rockchip_rk3288_efuse_read()
64 dev_err(efuse->dev, "failed to prepare/enable efuse clk\n"); in rockchip_rk3288_efuse_read()
68 writel(RK3288_LOAD | RK3288_PGENB, efuse->base + REG_EFUSE_CTRL); in rockchip_rk3288_efuse_read()
70 while (bytes--) { in rockchip_rk3288_efuse_read()
71 writel(readl(efuse->base + REG_EFUSE_CTRL) & in rockchip_rk3288_efuse_read()
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H A Dmeson-mx-efuse.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Amlogic Meson6, Meson8 and Meson8b eFuse Driver
15 #include <linux/nvmem-provider.h>
50 static void meson_mx_efuse_mask_bits(struct meson_mx_efuse *efuse, u32 reg, in meson_mx_efuse_mask_bits() argument
55 data = readl(efuse->base + reg); in meson_mx_efuse_mask_bits()
59 writel(data, efuse->base + reg); in meson_mx_efuse_mask_bits()
62 static int meson_mx_efuse_hw_enable(struct meson_mx_efuse *efuse) in meson_mx_efuse_hw_enable() argument
66 err = clk_prepare_enable(efuse->core_clk); in meson_mx_efuse_hw_enable()
70 /* power up the efuse */ in meson_mx_efuse_hw_enable()
71 meson_mx_efuse_mask_bits(efuse, MESON_MX_EFUSE_CNTL1, in meson_mx_efuse_hw_enable()
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H A Dsc27xx-efuse.c1 // SPDX-License-Identifier: GPL-2.0
9 #include <linux/nvmem-provider.h>
16 /* Efuse controller registers definition */
79 * On Spreadtrum platform, we have multi-subsystems will access the unique
80 * efuse controller, so we need one hardware spinlock to synchronize between
83 static int sc27xx_efuse_lock(struct sc27xx_efuse *efuse) in sc27xx_efuse_lock() argument
87 mutex_lock(&efuse->mutex); in sc27xx_efuse_lock()
89 ret = hwspin_lock_timeout_raw(efuse->hwlock, in sc27xx_efuse_lock()
92 dev_err(efuse->dev, "timeout to get the hwspinlock\n"); in sc27xx_efuse_lock()
93 mutex_unlock(&efuse->mutex); in sc27xx_efuse_lock()
[all …]
H A Dmeson-efuse.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Amlogic Meson GX eFuse Driver
11 #include <linux/nvmem-provider.h>
42 { .compatible = "amlogic,meson-gxbb-efuse", },
49 struct device *dev = &pdev->dev; in meson_efuse_probe()
55 unsigned int size; in meson_efuse_probe() local
57 sm_np = of_parse_phandle(pdev->dev.of_node, "secure-monitor", 0); in meson_efuse_probe()
59 dev_err(&pdev->dev, "no secure-monitor node\n"); in meson_efuse_probe()
60 return -ENODEV; in meson_efuse_probe()
66 return -EPROBE_DEFER; in meson_efuse_probe()
[all …]
H A Djz4780-efuse.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * JZ4780 EFUSE Memory Support driver
10 * Currently supports JZ4780 efuse which has 8K programmable bit.
11 * Efuse is separated into seven segments as below:
13 * -----------------------------------------------------------------------
15 * -----------------------------------------------------------------------
27 #include <linux/nvmem-provider.h>
72 struct jz4780_efuse *efuse = context; in jz4780_efuse_read() local
75 size_t start = offset & ~(JZ_EFU_READ_SIZE - 1); in jz4780_efuse_read()
77 - offset); in jz4780_efuse_read()
[all …]
H A Dsprd-efuse.c1 // SPDX-License-Identifier: GPL-2.0
9 #include <linux/nvmem-provider.h>
39 * The Spreadtrum AP efuse contains 2 parts: normal efuse and secure efuse,
40 * and we can only access the normal efuse in kernel. So define the normal
52 * when reading or writing data to efuse memory, the controller can save double
79 * On Spreadtrum platform, we have multi-subsystems will access the unique
80 * efuse controller, so we need one hardware spinlock to synchronize between
83 static int sprd_efuse_lock(struct sprd_efuse *efuse) in sprd_efuse_lock() argument
87 mutex_lock(&efuse->mutex); in sprd_efuse_lock()
89 ret = hwspin_lock_timeout_raw(efuse->hwlock, in sprd_efuse_lock()
[all …]
/openbmc/u-boot/board/compulab/cl-som-am57x/
H A Dspl.c1 // SPDX-License-Identifier: GPL-2.0+
3 * SPL data and initialization for CompuLab CL-SOM-AM57x board
24 ((struct dmm_lisa_map_regs *) *dmm_lisa_regs)->dmm_lisa_map_3 = in emif_get_dmm_regs()
54 /* Ext phy ctrl regs 1-35 */
164 .mpu.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_MPU_NOM,
165 .mpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
172 .eve.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_DSPEVE_NOM,
173 .eve.efuse.reg[OPP_OD] = STD_FUSE_OPP_VMIN_DSPEVE_OD,
174 .eve.efuse.reg[OPP_HIGH] = STD_FUSE_OPP_VMIN_DSPEVE_HIGH,
175 .eve.efuse.reg_bits = DRA752_EFUSE_REGBITS,
[all …]
/openbmc/linux/drivers/net/wireless/realtek/rtw88/
H A Defuse.c1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /* Copyright(c) 2018-2019 Realtek Corporation
8 #include "efuse.h"
31 /* efuse header format
37 * word_en: 4 bits each word. 0 -> write; 1 -> not write
43 u32 physical_size = rtwdev->efuse.physical_size; in rtw_dump_logical_efuse_map()
44 u32 protect_size = rtwdev->efuse.protect_size; in rtw_dump_logical_efuse_map()
45 u32 logical_size = rtwdev->efuse.logical_size; in rtw_dump_logical_efuse_map()
52 for (phy_idx = 0; phy_idx < physical_size - protect_size;) { in rtw_dump_logical_efuse_map()
59 /* 2-byte header format */ in rtw_dump_logical_efuse_map()
[all …]
H A Dmain.c1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /* Copyright(c) 2018-2019 Realtek Corporation
16 #include "efuse.h"
159 .n_bitrates = ARRAY_SIZE(rtw_ratetable) - 4,
172 struct rtw_bf_info *bf_info = &rtwdev->bf_info; in rtw_dynamic_csi_rate()
176 if (rtwvif->bfee.role != RTW_BFEE_SU && in rtw_dynamic_csi_rate()
177 rtwvif->bfee.role != RTW_BFEE_MU) in rtw_dynamic_csi_rate()
180 rtw_chip_cfg_csi_rate(rtwdev, rtwdev->dm_info.min_rssi, in rtw_dynamic_csi_rate()
181 bf_info->cur_csi_rpt_rate, in rtw_dynamic_csi_rate()
184 if (new_csi_rate_idx != bf_info->cur_csi_rpt_rate) in rtw_dynamic_csi_rate()
[all …]
H A Dphy.h1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
2 /* Copyright(c) 2018-2019 Realtek Corporation
89 .size = ARRAY_SIZE(name), \
104 .size = ARRAY_SIZE(name), \
111 .size = ARRAY_SIZE(name), \
117 const struct rtw_chip_info *chip = rtwdev->chip; in rtw_get_rfe_def()
118 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw_get_rfe_def() local
121 if (chip->rfe_defs_size == 0) in rtw_get_rfe_def()
124 if (efuse->rfe_option < chip->rfe_defs_size) in rtw_get_rfe_def()
125 rfe_def = &chip->rfe_defs[efuse->rfe_option]; in rtw_get_rfe_def()
[all …]
/openbmc/qemu/hw/nvram/
H A Dxlnx-versal-efuse-cache.c26 #include "hw/nvram/xlnx-versal-efuse.h"
29 #include "hw/qdev-properties.h"
33 static uint64_t efuse_cache_read(void *opaque, hwaddr addr, unsigned size) in efuse_cache_read() argument
37 unsigned int w1 = QEMU_ALIGN_DOWN((addr + size - 1) * 8, 32); in efuse_cache_read()
43 ret = xlnx_versal_efuse_read_row(s->efuse, w1, NULL); in efuse_cache_read()
46 ret |= xlnx_versal_efuse_read_row(s->efuse, w0, NULL); in efuse_cache_read()
49 /* If 'addr' unaligned, the guest is always assumed to be little-endian. */ in efuse_cache_read()
59 unsigned size) in efuse_cache_write() argument
62 qemu_log_mask(LOG_GUEST_ERROR, "%s: efuse cache registers are read-only", in efuse_cache_write()
81 memory_region_init_io(&s->iomem, obj, &efuse_cache_ops, s, in efuse_cache_init()
[all …]
/openbmc/qemu/include/hw/nvram/
H A Dxlnx-efuse.h2 * QEMU model of the Xilinx eFuse core
30 #include "sysemu/block-backend.h"
31 #include "hw/qdev-core.h"
33 #define TYPE_XLNX_EFUSE "xlnx-efuse"
55 * @data: an array of 32-bit words for which the CRC should be computed
56 * @u32_cnt: the array size in number of 32-bit words
57 * @zpads: the number of 32-bit zeros prepended to @data before computation
59 * This function is used to compute the CRC for an array of 32-bit words,
60 * using a Xilinx-specific data padding.
62 * Returns: the computed 32-bit CRC
[all …]
/openbmc/linux/Documentation/devicetree/bindings/net/
H A Dkeystone-netcp.txt6 switch sub-module to send and receive packets. NetCP also includes a packet
13 includes a 3-port Ethernet switch sub-module capable of 10Gb/s and 1Gb/s rates
16 Keystone NetCP driver has a plug-in module architecture where each of the NetCP
17 sub-modules exist as a loadable kernel module which plug in to the netcp core.
18 These sub-modules are represented as "netcp-devices" in the dts bindings. It is
19 mandatory to have the ethernet switch sub-module for the ethernet interface to
20 be operational. Any other sub-module like the PA is optional.
24 -----------------------------
26 -----------------------------
28 |-> NetCP Devices -> |
[all …]
/openbmc/linux/Documentation/devicetree/bindings/soc/socionext/
H A Dsocionext,uniphier-soc-glue-debug.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/socionext/socionext,uniphier-soc-glue-debug.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Socionext UniPhier SoC-glue logic debug part
10 - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
13 SoC-glue logic debug part implemented on Socionext UniPhier SoCs is
20 - enum:
21 - socionext,uniphier-ld4-soc-glue-debug
22 - socionext,uniphier-pro4-soc-glue-debug
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Duniphier-pro5.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
5 // Copyright (C) 2015-2016 Socionext Inc.
9 compatible = "socionext,uniphier-pro5";
10 #address-cells = <1>;
11 #size-cells = <1>;
14 #address-cells = <1>;
15 #size-cells = <0>;
19 compatible = "arm,cortex-a9";
22 enable-method = "psci";
23 next-level-cache = <&l2>;
[all …]
/openbmc/linux/drivers/net/wireless/mediatek/mt76/mt7603/
H A Deeprom.c1 // SPDX-License-Identifier: ISC
21 return -ETIMEDOUT; in mt7603_efuse_read()
51 dev->mt76.otp.data = devm_kzalloc(dev->mt76.dev, len, GFP_KERNEL); in mt7603_efuse_init()
52 dev->mt76.otp.size = len; in mt7603_efuse_init()
53 if (!dev->mt76.otp.data) in mt7603_efuse_init()
54 return -ENOMEM; in mt7603_efuse_init()
56 buf = dev->mt76.otp.data; in mt7603_efuse_init()
67 mt7603_has_cal_free_data(struct mt7603_dev *dev, u8 *efuse) in mt7603_has_cal_free_data() argument
69 if (!efuse[MT_EE_TEMP_SENSOR_CAL]) in mt7603_has_cal_free_data()
72 if (get_unaligned_le16(efuse + MT_EE_TX_POWER_0_START_2G) == 0) in mt7603_has_cal_free_data()
[all …]

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